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Searched refs:ARM_CPU_MODE_USR (Results 1 – 2 of 2) sorted by relevance

/external/qemu/target-arm/
Dcpu.h336 ARM_CPU_MODE_USR = 0x10, enumerator
466 return (env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR ? 1 : 0; in cpu_mmu_index()
474 return (env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR; in is_cpu_user()
531 privmode = (env->uncached_cpsr & CPSR_M) != ARM_CPU_MODE_USR; in cpu_get_tb_cpu_state()
Dhelper.c279 env->uncached_cpsr = ARM_CPU_MODE_USR; in cpu_reset()
620 if (mode != ARM_CPU_MODE_USR) in switch_mode()
643 case ARM_CPU_MODE_USR: in bank_number()
864 && (env->uncached_cpsr & CPSR_M) != ARM_CPU_MODE_USR) { in do_interrupt()
880 && (env->uncached_cpsr & CPSR_M) != ARM_CPU_MODE_USR) { in do_interrupt()
1456 || (env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR) in HELPER()
1711 if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR) { in HELPER()
1717 if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR) { in HELPER()
1723 if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR) { in HELPER()
1964 || (env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR) in HELPER()
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