Searched refs:Bitfield (Results 1 – 14 of 14) sorted by relevance
| /external/clang/test/SemaCXX/ |
| D | member-init.cpp | 3 struct Bitfield { struct
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| /external/clang/test/CodeGenObjC/ |
| D | 2010-03-17-StructRef.m | 2 // Bitfield references must not touch memory outside of the enclosing
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| /external/clang/test/CodeGenCXX/ |
| D | temporaries.cpp | 634 namespace Bitfield { namespace
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| /external/llvm/test/CodeGen/AArch64/ |
| D | bitfield-insert.ll | 174 ; Bitfield insert where there's a left-over shr needed at the beginning
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| /external/clang/lib/Sema/ |
| D | SemaChecking.cpp | 4951 static bool AnalyzeBitFieldAssignment(Sema &S, FieldDecl *Bitfield, Expr *Init, in AnalyzeBitFieldAssignment() argument
4953 assert(Bitfield->isBitField()); in AnalyzeBitFieldAssignment()
4954 if (Bitfield->isInvalidDecl()) in AnalyzeBitFieldAssignment()
4958 if (Bitfield->getType()->isBooleanType()) in AnalyzeBitFieldAssignment()
4962 if (Bitfield->getBitWidth()->isValueDependent() || in AnalyzeBitFieldAssignment()
4963 Bitfield->getBitWidth()->isTypeDependent() || in AnalyzeBitFieldAssignment()
4975 unsigned FieldWidth = Bitfield->getBitWidthValue(S.Context); in AnalyzeBitFieldAssignment()
4982 TruncatedValue.setIsSigned(Bitfield->getType()->isSignedIntegerType()); in AnalyzeBitFieldAssignment()
5012 if (FieldDecl *Bitfield = E->getLHS()->getSourceBitField()) { in AnalyzeAssignment() local
5013 if (AnalyzeBitFieldAssignment(S, Bitfield, E->getRHS(), in AnalyzeAssignment()
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| /external/chromium_org/chrome/common/metrics/proto/ |
| D | perf_data.proto | 55 // Bitfield that indicates whether reads on the counter will return the
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUInstructions.td | 355 // Bitfield extract patterns
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 2967 SDValue Bitfield = LHS.getOperand(0); in tryCombineToBFI() local
2968 if (getLSBForBFI(DAG, DL, VT, Bitfield, LHSMask) != -1) { in tryCombineToBFI()
2977 Bitfield = RHS.getOperand(0); in tryCombineToBFI()
2978 int32_t LSB = getLSBForBFI(DAG, DL, VT, Bitfield, RHSMask); in tryCombineToBFI()
2986 LHS.getOperand(0), Bitfield, in tryCombineToBFI()
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| D | AArch64InstrFormats.td | 198 // Format for Bitfield instructions
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| D | AArch64InstrInfo.td | 979 // Bitfield
4579 // Bitfield patterns
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 446 struct BitfieldOp Bitfield; member
519 Bitfield = o.Bitfield; in ARMOperand()
1589 unsigned lsb = Bitfield.LSB; in addBitfieldOperands()
1590 unsigned width = Bitfield.Width; in addBitfieldOperands()
2308 Op->Bitfield.LSB = LSB; in CreateBitfield()
2309 Op->Bitfield.Width = Width; in CreateBitfield()
2547 OS << "<bitfield " << "lsb: " << Bitfield.LSB in print()
2548 << ", width: " << Bitfield.Width << ">"; in print()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMScheduleSwift.td | 1217 // 4.2.8 Bitfield
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| D | ARMInstrInfo.td | 723 let Name = "Bitfield";
3462 // A8.6.18 BFI - Bitfield insert (Encoding A1)
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| D | ARMInstrThumb2.td | 2344 // A8.6.18 BFI - Bitfield insert (Encoding T1)
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