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Searched refs:BuildMI (Results 1 – 25 of 130) sorted by relevance

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/external/llvm/lib/Target/Hexagon/
DHexagonExpandPredSpillCode.cpp98 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
101 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::ADD_rr), in runOnMachineFunction()
104 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::TFR_RsPd), in runOnMachineFunction()
106 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
111 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::ADD_ri), in runOnMachineFunction()
113 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::TFR_RsPd), in runOnMachineFunction()
115 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
122 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Hexagon::TFR_RsPd), in runOnMachineFunction()
124 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
142 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
[all …]
DHexagonSplitConst32AndConst64.cpp88 BuildMI (*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
90 BuildMI (*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
101 BuildMI (*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
103 BuildMI (*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
114 BuildMI (*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
116 BuildMI (*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
127 BuildMI (*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
129 BuildMI (*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
146 BuildMI (*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
149 BuildMI (*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
[all …]
DHexagonSplitTFRCondSets.cpp114 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Opc1), in runOnMachineFunction()
118 BuildMI(*MBB, MII, MI->getDebugLoc(), TII->get(Opc2), in runOnMachineFunction()
133 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
138 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
143 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
159 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
164 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
173 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
189 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
192 BuildMI(*MBB, MII, MI->getDebugLoc(), in runOnMachineFunction()
[all …]
DHexagonRegisterInfo.cpp177 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex()
179 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex()
183 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex()
206 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex()
208 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex()
212 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex()
238 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex()
240 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex()
247 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex()
257 BuildMI(*MI.getParent(), II, MI.getDebugLoc(), in eliminateFrameIndex()
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp141 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
145 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
150 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate()
154 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate()
159 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate()
163 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORIS), DstReg) in HandleVRSaveUpdate()
167 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) in HandleVRSaveUpdate()
415 BuildMI(MBB, MBBI, dl, TII.get(PPC::MFLR8), PPC::X0); in emitPrologue()
419 BuildMI(MBB, MBBI, dl, TII.get(PPC::MFCR8), PPC::X12); in emitPrologue()
425 BuildMI(MBB, MBBI, dl, TII.get(PPC::STD)) in emitPrologue()
[all …]
DPPCFastISel.cpp136 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(PPC::LDtocCPT), in PPCMaterializeFP()
143 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(PPC::ADDIStocHA), in PPCMaterializeFP()
145 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), DestReg) in PPCMaterializeFP()
165 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in PPCMaterialize32BitInt()
171 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in PPCMaterialize32BitInt()
174 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in PPCMaterialize32BitInt()
179 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in PPCMaterialize32BitInt()
219 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(PPC::RLDICR), in PPCMaterialize64BitInt()
227 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(PPC::ORIS8), in PPCMaterialize64BitInt()
234 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(PPC::ORI8), in PPCMaterialize64BitInt()
[all …]
DPPCRegisterInfo.cpp286 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), Reg) in lowerDynamicAlloc()
290 BuildMI(MBB, II, dl, TII.get(PPC::LD), Reg) in lowerDynamicAlloc()
294 BuildMI(MBB, II, dl, TII.get(PPC::LWZ), Reg) in lowerDynamicAlloc()
311 BuildMI(MBB, II, dl, TII.get(PPC::LI8), NegSizeReg) in lowerDynamicAlloc()
316 BuildMI(MBB, II, dl, TII.get(PPC::AND8), NegSizeReg) in lowerDynamicAlloc()
322 BuildMI(MBB, II, dl, TII.get(PPC::STDUX), PPC::X1) in lowerDynamicAlloc()
326 BuildMI(MBB, II, dl, TII.get(PPC::ADDI8), MI.getOperand(0).getReg()) in lowerDynamicAlloc()
336 BuildMI(MBB, II, dl, TII.get(PPC::LI), NegSizeReg) in lowerDynamicAlloc()
341 BuildMI(MBB, II, dl, TII.get(PPC::AND), NegSizeReg) in lowerDynamicAlloc()
347 BuildMI(MBB, II, dl, TII.get(PPC::STWUX), PPC::R1) in lowerDynamicAlloc()
[all …]
/external/llvm/lib/Target/R600/
DSILowerControlFlow.cpp138 BuildMI(*From.getParent(), &From, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ)) in Skip()
155 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ)) in SkipIfDead()
160 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::EXP)) in SkipIfDead()
172 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::S_ENDPGM)); in SkipIfDead()
181 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_AND_SAVEEXEC_B64), Reg) in If()
184 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), Reg) in If()
199 BuildMI(MBB, MBB.getFirstNonPHI(), DL, in Else()
203 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), AMDGPU::EXEC) in Else()
219 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst) in Break()
234 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst) in IfBreak()
[all …]
/external/llvm/lib/Target/Mips/
DMipsLongBranch.cpp225 MachineInstrBuilder MIB = BuildMI(MBB, Br, DL, NewDesc); in replaceBranch()
288 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
290 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)).addReg(Mips::RA) in expandToLongBranch()
294 .append(BuildMI(*MF, DL, TII->get(Mips::BAL_BR)).addMBB(BalTgtMBB)) in expandToLongBranch()
295 .append(BuildMI(*MF, DL, TII->get(Mips::LUi), Mips::AT).addImm(Hi)); in expandToLongBranch()
299 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::AT) in expandToLongBranch()
301 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) in expandToLongBranch()
303 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA) in expandToLongBranch()
307 .append(BuildMI(*MF, DL, TII->get(Mips::JR)).addReg(Mips::AT)) in expandToLongBranch()
308 .append(BuildMI(*MF, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
[all …]
DMips16InstrInfo.cpp91 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc)); in copyPhysReg()
112 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)). in storeRegToStack()
129 BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(Offset) in loadRegFromStack()
180 BuildMI(MBB, I, DL, get(Mips::SaveRaF16)).addImm(FrameSize); in makeFrame()
185 BuildMI(MBB, I, DL, get(Mips::SaveRaF16)). addImm(Base); in makeFrame()
199 MachineInstrBuilder MIB1 = BuildMI(MBB, I, DL, get(Mips::SwRxSpImmX16), in makeFrame()
203 MachineInstrBuilder MIB2 = BuildMI(MBB, I, DL, get(Mips::SwRxSpImmX16), in makeFrame()
207 MachineInstrBuilder MIB3 = BuildMI(MBB, I, DL, get(Mips::SwRxSpImmX16), in makeFrame()
222 BuildMI(MBB, I, DL, get(Mips::RestoreRaF16)).addImm(FrameSize); in restoreFrame()
231 BuildMI(MBB, I, DL, get(Mips::RestoreRaF16)). addImm(Base); in restoreFrame()
[all …]
/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h223 inline MachineInstrBuilder BuildMI(MachineFunction &MF, in BuildMI() function
232 inline MachineInstrBuilder BuildMI(MachineFunction &MF, in BuildMI() function
244 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
255 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
266 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
273 return BuildMI(BB, MII, DL, MCID, DestReg); in BuildMI()
277 return BuildMI(BB, MII, DL, MCID, DestReg); in BuildMI()
284 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
294 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
304 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, in BuildMI() function
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/external/llvm/lib/Target/Sparc/
DSparcInstrInfo.cpp197 BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(Opcode)) in AnalyzeBranch()
199 BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(SP::BA)) in AnalyzeBranch()
232 BuildMI(&MBB, DL, get(SP::BA)).addMBB(TBB); in InsertBranch()
240 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC); in InsertBranch()
242 BuildMI(&MBB, DL, get(SP::FBCOND)).addMBB(TBB).addImm(CC); in InsertBranch()
246 BuildMI(&MBB, DL, get(SP::BA)).addMBB(FBB); in InsertBranch()
277 BuildMI(MBB, I, DL, get(SP::ORrr), DestReg).addReg(SP::G0) in copyPhysReg()
280 BuildMI(MBB, I, DL, get(SP::FMOVS), DestReg) in copyPhysReg()
284 BuildMI(MBB, I, DL, get(SP::FMOVD), DestReg) in copyPhysReg()
296 MovMI = BuildMI(MBB, I, DL, get(SP::FMOVS), Dst).addReg(Src); in copyPhysReg()
[all …]
DSparcFrameLowering.cpp60 BuildMI(MBB, MBBI, dl, TII.get(SAVEri), SP::O6) in emitPrologue()
66 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi); in emitPrologue()
68 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1) in emitPrologue()
70 BuildMI(MBB, MBBI, dl, TII.get(SAVErr), SP::O6) in emitPrologue()
87 BuildMI(MBB, I, DL, TII.get(SP::ADDri), SP::O6).addReg(SP::O6) in eliminateCallFramePseudoInstr()
104 BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0) in emitEpilogue()
117 BuildMI(MBB, MBBI, dl, TII.get(SP::ADDri), SP::O6) in emitEpilogue()
123 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi); in emitEpilogue()
125 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1) in emitEpilogue()
127 BuildMI(MBB, MBBI, dl, TII.get(SP::ADDrr), SP::O6) in emitEpilogue()
/external/llvm/lib/Target/MSP430/
DMSP430FrameLowering.cpp66 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r)) in emitPrologue()
70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW) in emitPrologue()
98 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SPW) in emitPrologue()
135 BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::FPW); in emitEpilogue()
156 BuildMI(MBB, MBBI, DL, in emitEpilogue()
160 BuildMI(MBB, MBBI, DL, in emitEpilogue()
170 BuildMI(MBB, MBBI, DL, TII.get(MSP430::ADD16ri), MSP430::SPW) in emitEpilogue()
199 BuildMI(MBB, MI, DL, TII.get(MSP430::PUSH16r)) in spillCalleeSavedRegisters()
220 BuildMI(MBB, MI, DL, TII.get(MSP430::POP16r), CSI[i].getReg()); in restoreCalleeSavedRegisters()
247 New = BuildMI(MF, Old->getDebugLoc(), in eliminateCallFramePseudoInstr()
[all …]
/external/llvm/lib/Target/X86/
DX86FrameLowering.cpp174 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc)) in emitSPUpdate()
186 MI = addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr), in emitSPUpdate()
189 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) in emitSPUpdate()
711 BuildMI(MBB, MBBI, DL, in emitPrologue()
755 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r)) in emitPrologue()
762 BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)) in emitPrologue()
777 BuildMI(MBB, MBBI, DL, in emitPrologue()
785 BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)) in emitPrologue()
816 BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)).addSym(Label); in emitPrologue()
837 BuildMI(MBB, MBBI, DL, in emitPrologue()
[all …]
/external/llvm/lib/Target/NVPTX/
DNVPTXInstrInfo.cpp43 BuildMI(MBB, I, DL, get(NVPTX::IMOV32rr), DestReg) in copyPhysReg()
46 BuildMI(MBB, I, DL, get(NVPTX::IMOV1rr), DestReg) in copyPhysReg()
49 BuildMI(MBB, I, DL, get(NVPTX::FMOV32rr), DestReg) in copyPhysReg()
52 BuildMI(MBB, I, DL, get(NVPTX::IMOV16rr), DestReg) in copyPhysReg()
55 BuildMI(MBB, I, DL, get(NVPTX::IMOV64rr), DestReg) in copyPhysReg()
58 BuildMI(MBB, I, DL, get(NVPTX::FMOV64rr), DestReg) in copyPhysReg()
259 BuildMI(&MBB, DL, get(NVPTX::GOTO)).addMBB(TBB); in InsertBranch()
261 BuildMI(&MBB, DL, get(NVPTX::CBranch)).addReg(Cond[0].getReg()) in InsertBranch()
267 BuildMI(&MBB, DL, get(NVPTX::CBranch)).addReg(Cond[0].getReg()).addMBB(TBB); in InsertBranch()
268 BuildMI(&MBB, DL, get(NVPTX::GOTO)).addMBB(FBB); in InsertBranch()
DNVPTXFrameLowering.cpp46 MachineInstr *MI = BuildMI( in emitPrologue()
49 BuildMI(MBB, MI, dl, tm.getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR_64), in emitPrologue()
53 MachineInstr *MI = BuildMI( in emitPrologue()
56 BuildMI(MBB, MI, dl, tm.getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR), in emitPrologue()
/external/llvm/lib/Target/XCore/
DXCoreRegisterInfo.cpp172 BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg) in eliminateFrameIndex()
177 BuildMI(MBB, II, dl, TII.get(XCore::STW_l3r)) in eliminateFrameIndex()
183 BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg) in eliminateFrameIndex()
193 BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg) in eliminateFrameIndex()
198 BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus)) in eliminateFrameIndex()
204 BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg) in eliminateFrameIndex()
222 BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg) in eliminateFrameIndex()
227 BuildMI(MBB, II, dl, TII.get(NewOpcode)) in eliminateFrameIndex()
233 BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg) in eliminateFrameIndex()
254 BuildMI(MBB, I, dl, TII.get(Opcode), DstReg).addImm(Value); in loadConstant()
DXCoreFrameLowering.cpp55 BuildMI(MBB, I, dl, TII.get(Opcode), DstReg) in loadFromStack()
70 BuildMI(MBB, I, dl, TII.get(Opcode)) in storeToStack()
130 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize); in emitPrologue()
136 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel); in emitPrologue()
146 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLRLabel); in emitPrologue()
158 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveR10Label); in emitPrologue()
162 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr) in emitPrologue()
167 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel); in emitPrologue()
185 BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)) in emitEpilogue()
226 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize); in emitEpilogue()
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.cpp49 BuildMI(MBB, I, DL, get(AArch64::ADDxxi_lsl0_s), DestReg) in copyPhysReg()
55 BuildMI(MBB, I, DL, get(AArch64::ADDwwi_lsl0_s), DestReg) in copyPhysReg()
62 BuildMI(MBB, I, DL, get(AArch64::MSRix)) in copyPhysReg()
68 BuildMI(MBB, I, DL, get(AArch64::MRSxi), DestReg) in copyPhysReg()
80 BuildMI(MBB, I, DL, get(AArch64::FMOVss), DestReg) in copyPhysReg()
85 BuildMI(MBB, I, DL, get(AArch64::FMOVdd), DestReg) in copyPhysReg()
98 BuildMI(MBB, I, DL, get(AArch64::LSFP128_PreInd_STR), AArch64::XSP) in copyPhysReg()
103 BuildMI(MBB, I, DL, get(AArch64::LSFP128_PostInd_LDR), DestReg) in copyPhysReg()
113 BuildMI(MBB, I, DL, get(Opc), DestReg) in copyPhysReg()
298 BuildMI(&MBB, DL, get(AArch64::Bimm)).addMBB(TBB); in InsertBranch()
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DFastISel.cpp232 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in materializeRegForValue()
575 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in SelectCall()
653 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in SelectCall()
657 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in SelectCall()
674 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall()
679 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall()
683 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall()
687 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in SelectCall()
692 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, IsIndirect, in SelectCall()
804 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), in SelectBitCast()
[all …]
/external/llvm/lib/Target/ARM/
DARMFastISel.cpp299 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg)); in FastEmitInst_()
310 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg) in FastEmitInst_r()
313 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in FastEmitInst_r()
315 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in FastEmitInst_r()
330 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg) in FastEmitInst_rr()
334 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in FastEmitInst_rr()
337 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in FastEmitInst_rr()
353 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg) in FastEmitInst_rrr()
358 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) in FastEmitInst_rrr()
362 AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, in FastEmitInst_rrr()
[all …]
/external/mesa3d/src/gallium/drivers/radeon/
DR600ISelLowering.cpp65 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::MOV)) in EmitInstrWithCustomInserter()
76 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::MOV)) in EmitInstrWithCustomInserter()
88 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::MOV)) in EmitInstrWithCustomInserter()
101 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::COPY)) in EmitInstrWithCustomInserter()
129 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::MOV_IMM_I32), in EmitInstrWithCustomInserter()
134 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::LSHR_eg), NewAddr) in EmitInstrWithCustomInserter()
138 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI->getOpcode())) in EmitInstrWithCustomInserter()
160 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SET_GRADIENTS_H), t0) in EmitInstrWithCustomInserter()
164 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SET_GRADIENTS_V), t1) in EmitInstrWithCustomInserter()
168 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SAMPLE_G)) in EmitInstrWithCustomInserter()
[all …]
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
DR600ISelLowering.cpp65 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::MOV)) in EmitInstrWithCustomInserter()
76 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::MOV)) in EmitInstrWithCustomInserter()
88 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::MOV)) in EmitInstrWithCustomInserter()
101 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::COPY)) in EmitInstrWithCustomInserter()
129 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::MOV_IMM_I32), in EmitInstrWithCustomInserter()
134 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::LSHR_eg), NewAddr) in EmitInstrWithCustomInserter()
138 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI->getOpcode())) in EmitInstrWithCustomInserter()
160 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SET_GRADIENTS_H), t0) in EmitInstrWithCustomInserter()
164 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SET_GRADIENTS_V), t1) in EmitInstrWithCustomInserter()
168 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::TEX_SAMPLE_G)) in EmitInstrWithCustomInserter()
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DSIISelLowering.cpp82 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::V_MOV_B32_e64)) in EmitInstrWithCustomInserter()
97 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::V_MOV_B32_e64)) in EmitInstrWithCustomInserter()
112 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::V_MOV_B32_e64)) in EmitInstrWithCustomInserter()
145 BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::S_WAITCNT)) in AppendS_WAITCNT()
161 BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::S_MOV_B32), M0) in LowerSI_INTERP()
164 BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_INTERP_P1_F32), tmp) in LowerSI_INTERP()
170 BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_INTERP_P2_F32)) in LowerSI_INTERP()
191 BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::S_MOV_B32), M0) in LowerSI_INTERP_CONST()
194 BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_INTERP_MOV_F32)) in LowerSI_INTERP_CONST()
207 BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_CMPX_LE_F32_e32), in LowerSI_KIL()
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