Searched refs:CRn (Results 1 – 5 of 5) sorted by relevance
/external/llvm/lib/Target/AArch64/Utils/ |
D | AArch64BaseInfo.cpp | 786 uint32_t Op0 = 3, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in fromString() local 789 Ops[2].getAsInteger(10, CRn); in fromString() 792 Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2; in fromString() 816 uint32_t CRn = (Bits >> 7) & 0xf; in toString() local 822 if (Op0 != 3 || (CRn != 11 && CRn != 15)) { in toString() 827 assert(Op0 == 3 && (CRn == 11 || CRn == 15) && "Invalid generic sysreg"); in toString() 830 return "s3_" + utostr(Op1) + "_c" + utostr(CRn) in toString()
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 3846 : T2Cop<Op, oops, iops, opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2", 3857 bits<4> CRn; 3864 let Inst{19-16} = CRn; 3892 (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn, 3894 [(int_arm_mcr imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn, 3896 def : t2InstAlias<"mcr${p} $cop, $opc1, $Rt, $CRn, $CRm", 3897 (t2MCR p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn, 3900 (outs), (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn, 3902 [(int_arm_mcr2 imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn, 3904 def : t2InstAlias<"mcr2${p} $cop, $opc1, $Rt, $CRn, $CRm", [all …]
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D | ARMInstrInfo.td | 4468 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2), 4469 NoItinerary, "cdp", "\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2", 4470 [(int_arm_cdp imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn, 4473 bits<4> CRn; 4484 let Inst{19-16} = CRn; 4489 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2), 4490 NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2", 4491 [(int_arm_cdp2 imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn, 4495 bits<4> CRn; 4506 let Inst{19-16} = CRn; [all …]
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 4102 // * There are ~1000 generic names S3_<op1>_<CRn>_<CRm>_<Op2> which have an 4158 // When <CRn> is specified, an assembler should accept something like "C4", not 4185 let CRn = 0b0010; 4204 let CRn = crn; 4225 (ins uimm3:$Op1, CRx:$CRn, CRx:$CRm, 4227 "sys\t$Op1, $CRn, $CRm, $Op2, $Rt", 4234 def : InstAlias<"sys $Op1, $CRn, $CRm, $Op2", 4235 (SYSiccix uimm3:$Op1, CRx:$CRn, CRx:$CRm, uimm3:$Op2, XZR)>; 4246 let CRn = SysOp{10-7}; 4268 (ins uimm3:$Op1, CRx:$CRn, CRx:$CRm, uimm3:$Op2), [all …]
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D | AArch64InstrFormats.td | 893 bits<4> CRn; 902 let Inst{15-12} = CRn;
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