| /external/llvm/test/Transforms/InstCombine/ |
| D | ffs-1.ll | 105 ; CHECK-NEXT: [[CTTZ:%[a-z0-9]+]] = call i32 @llvm.cttz.i32(i32 %x, i1 false)
106 ; CHECK-NEXT: [[INC:%[a-z0-9]+]] = add i32 [[CTTZ]], 1
116 ; CHECK-LINUX-NEXT: [[CTTZ:%[a-z0-9]+]] = call i32 @llvm.cttz.i32(i32 %x, i1 false)
117 ; CHECK-LINUX-NEXT: [[INC:%[a-z0-9]+]] = add i32 [[CTTZ]], 1
127 ; CHECK-LINUX-NEXT: [[CTTZ:%[a-z0-9]+]] = call i64 @llvm.cttz.i64(i64 %x, i1 false)
128 ; CHECK-LINUX-NEXT: [[INC:%[a-z0-9]+]] = add i64 [[CTTZ]], 1
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 309 BSWAP, CTTZ, CTLZ, CTPOP, enumerator
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 273 case ISD::CTTZ: return "cttz"; in getOperationName()
|
| D | LegalizeVectorTypes.cpp | 70 case ISD::CTTZ: in ScalarizeVectorResult()
523 case ISD::CTTZ: in SplitVectorResult()
1068 case ISD::CTTZ: in SplitVectorOperand()
1497 case ISD::CTTZ: in WidenVectorResult()
|
| D | LegalizeVectorOps.cpp | 214 case ISD::CTTZ: in LegalizeOp()
|
| D | LegalizeDAG.cpp | 2622 return DAG.getNode(ISD::CTTZ, dl, Op.getValueType(), Op); in ExpandBitCount()
2623 case ISD::CTTZ: { in ExpandBitCount()
2737 case ISD::CTTZ: in ExpandNode()
3737 case ISD::CTTZ: in PromoteNode()
3747 if (Node->getOpcode() == ISD::CTTZ) { in PromoteNode()
|
| D | LegalizeIntegerTypes.cpp | 63 case ISD::CTTZ: Res = PromoteIntRes_CTTZ(N); break; in PromoteIntegerResult()
333 if (N->getOpcode() == ISD::CTTZ) { in PromoteIntRes_CTTZ()
1117 case ISD::CTTZ: ExpandIntRes_CTTZ(N, Lo, Hi); break; in ExpandIntegerResult()
|
| D | SelectionDAG.cpp | 1908 case ISD::CTTZ: in ComputeMaskedBits()
2459 case ISD::CTTZ: in getNode()
|
| D | DAGCombiner.cpp | 1135 case ISD::CTTZ: return visitCTTZ(N); in visit()
4111 return DAG.getNode(ISD::CTTZ, SDLoc(N), VT, N0); in visitCTTZ()
|
| D | SelectionDAGBuilder.cpp | 4985 setValue(&I, DAG.getNode(CI->isZero() ? ISD::CTTZ : ISD::CTTZ_ZERO_UNDEF, in visitIntrinsicCall()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 122 setOperationAction(ISD::CTTZ, MVT::i8, Expand); in MSP430TargetLowering()
123 setOperationAction(ISD::CTTZ, MVT::i16, Expand); in MSP430TargetLowering()
|
| /external/llvm/lib/Target/R600/ |
| D | AMDILISelLowering.cpp | 144 setOperationAction(ISD::CTTZ, VT, Expand); in InitAMDILLowering()
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 230 setOperationAction(ISD::CTTZ, MVT::i16, Expand); in NVPTXTargetLowering()
231 setOperationAction(ISD::CTTZ, MVT::i32, Expand); in NVPTXTargetLowering()
232 setOperationAction(ISD::CTTZ, MVT::i64, Expand); in NVPTXTargetLowering()
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 157 setOperationAction(ISD::CTTZ, VT, Expand); in InitAMDILLowering()
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 157 setOperationAction(ISD::CTTZ, VT, Expand); in InitAMDILLowering()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1405 setOperationAction(ISD::CTTZ , MVT::i32, Expand); in HexagonTargetLowering()
1406 setOperationAction(ISD::CTTZ , MVT::i64, Expand); in HexagonTargetLowering()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 353 def cttz : SDNode<"ISD::CTTZ" , SDTIntUnaryOp>;
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 309 setOperationAction(ISD::CTTZ, MVT::i32, Expand); in MipsTargetLowering()
310 setOperationAction(ISD::CTTZ, MVT::i64, Expand); in MipsTargetLowering()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1335 setOperationAction(ISD::CTTZ , MVT::i32, Expand); in SparcTargetLowering()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 178 setOperationAction(ISD::CTTZ , MVT::i32 , Expand); in PPCTargetLowering()
182 setOperationAction(ISD::CTTZ , MVT::i64 , Expand); in PPCTargetLowering()
429 setOperationAction(ISD::CTTZ, VT, Expand); in PPCTargetLowering()
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 126 setOperationAction(ISD::CTTZ, VT, Expand); in SystemZTargetLowering()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 455 setOperationAction(ISD::CTTZ , MVT::i8 , Promote); in resetOperationActions()
456 AddPromotedToType (ISD::CTTZ , MVT::i8 , MVT::i32); in resetOperationActions()
465 setOperationAction(ISD::CTTZ , MVT::i16 , Custom); in resetOperationActions()
466 setOperationAction(ISD::CTTZ , MVT::i32 , Custom); in resetOperationActions()
468 setOperationAction(ISD::CTTZ , MVT::i64 , Custom); in resetOperationActions()
836 setOperationAction(ISD::CTTZ, VT, Expand); in resetOperationActions()
12857 case ISD::CTTZ: return LowerCTTZ(Op, DAG); in LowerOperation()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 675 setOperationAction(ISD::CTTZ, MVT::i32, Custom); in ARMTargetLowering()
5888 case ISD::CTTZ: return LowerCTTZ(Op.getNode(), DAG, Subtarget); in LowerOperation()
|