Searched refs:CUBE_CMD_1 (Results 1 – 8 of 8) sorted by relevance
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
| D | radeon_context.h | 156 #define CUBE_CMD_1 2 macro
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| D | radeon_state_init.c | 606 rmesa->hw.cube[0].cmd[CUBE_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_PP_CUBIC_OFFSETS_T0); in radeonInitState()
608 rmesa->hw.cube[1].cmd[CUBE_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_PP_CUBIC_OFFSETS_T1); in radeonInitState()
610 rmesa->hw.cube[2].cmd[CUBE_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_PP_CUBIC_OFFSETS_T2); in radeonInitState()
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| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_context.h | 156 #define CUBE_CMD_1 2 macro
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| D | radeon_state_init.c | 606 rmesa->hw.cube[0].cmd[CUBE_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_PP_CUBIC_OFFSETS_T0); in radeonInitState()
608 rmesa->hw.cube[1].cmd[CUBE_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_PP_CUBIC_OFFSETS_T1); in radeonInitState()
610 rmesa->hw.cube[2].cmd[CUBE_CMD_1] = cmdpkt(rmesa, RADEON_EMIT_PP_CUBIC_OFFSETS_T2); in radeonInitState()
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| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| D | r200_state_init.c | 787 rmesa->hw.cube[0].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_0); in r200InitState()
789 rmesa->hw.cube[1].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_1); in r200InitState()
791 rmesa->hw.cube[2].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_2); in r200InitState()
793 rmesa->hw.cube[3].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_3); in r200InitState()
795 rmesa->hw.cube[4].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_4); in r200InitState()
797 rmesa->hw.cube[5].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_5); in r200InitState()
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| D | r200_context.h | 181 #define CUBE_CMD_1 2 /* 5 registers follow */ macro
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| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
| D | r200_state_init.c | 787 rmesa->hw.cube[0].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_0); in r200InitState()
789 rmesa->hw.cube[1].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_1); in r200InitState()
791 rmesa->hw.cube[2].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_2); in r200InitState()
793 rmesa->hw.cube[3].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_3); in r200InitState()
795 rmesa->hw.cube[4].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_4); in r200InitState()
797 rmesa->hw.cube[5].cmd[CUBE_CMD_1] = cmdpkt(rmesa, R200_EMIT_PP_CUBIC_OFFSETS_5); in r200InitState()
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| D | r200_context.h | 181 #define CUBE_CMD_1 2 /* 5 registers follow */ macro
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