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Searched refs:ISA_MIPS64 (Results 1 – 3 of 3) sorted by relevance

/external/qemu/target-mips/
Dmips-defs.h26 #define ISA_MIPS64 0x00000080 macro
52 #define CPU_MIPS64 (CPU_MIPS5 | CPU_MIPS32 | ISA_MIPS64)
Dtranslate.c4076 check_insn(env, ctx, ISA_MIPS64); in gen_dmfc0()
4642 check_insn(env, ctx, ISA_MIPS64); in gen_dmtc0()
7824 check_insn(env, ctx, ISA_MIPS64); in decode_opc()
/external/qemu/
Dmips-dis.c578 #define ISA_MIPS64 (ISA_MIPS5 | INSN_ISA32 | INSN_ISA64) macro
581 #define ISA_MIPS64R2 (ISA_MIPS64 | INSN_ISA32R2 | INSN_ISA64R2)
3157 ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
3170 ISA_MIPS64 | INSN_MIPS3D | INSN_SB1,