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Searched refs:Instr (Results 1 – 25 of 70) sorted by relevance

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/external/mesa3d/src/gallium/drivers/radeon/
DAMDILUtilityFunctions.h18 #define ExpandCaseTo32bitIntTypes(Instr) \ argument
19 case Instr##_i32:
21 #define ExpandCaseTo32bitIntTruncTypes(Instr) \ argument
22 case Instr##_i32i8: \
23 case Instr##_i32i16:
25 #define ExpandCaseToIntTypes(Instr) \ argument
26 ExpandCaseTo32bitIntTypes(Instr)
28 #define ExpandCaseToIntTruncTypes(Instr) \ argument
29 ExpandCaseTo32bitIntTruncTypes(Instr)
31 #define ExpandCaseToFloatTypes(Instr) \ argument
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
DAMDILUtilityFunctions.h18 #define ExpandCaseTo32bitIntTypes(Instr) \ argument
19 case Instr##_i32:
21 #define ExpandCaseTo32bitIntTruncTypes(Instr) \ argument
22 case Instr##_i32i8: \
23 case Instr##_i32i16:
25 #define ExpandCaseToIntTypes(Instr) \ argument
26 ExpandCaseTo32bitIntTypes(Instr)
28 #define ExpandCaseToIntTruncTypes(Instr) \ argument
29 ExpandCaseTo32bitIntTruncTypes(Instr)
31 #define ExpandCaseToFloatTypes(Instr) \ argument
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/external/v8/src/arm/
Dconstants-arm.h185 typedef int32_t Instr; typedef
446 extern const Instr kPopInstruction;
450 extern const Instr kPushRegPattern;
454 extern const Instr kPopRegPattern;
457 extern const Instr kMovLrPc;
459 extern const Instr kLdrPCMask;
460 extern const Instr kLdrPCPattern;
462 extern const Instr kBlxRegMask;
464 extern const Instr kBlxRegPattern;
466 extern const Instr kMovMvnMask;
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Dassembler-arm.h427 bool is_single_instruction(Instr instr = 0) const;
602 extern const Instr kMovLrPc;
603 extern const Instr kLdrPCMask;
604 extern const Instr kLdrPCPattern;
605 extern const Instr kBlxRegMask;
606 extern const Instr kBlxRegPattern;
607 extern const Instr kBlxIp;
609 extern const Instr kMovMvnMask;
610 extern const Instr kMovMvnPattern;
611 extern const Instr kMovMvnFlip;
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Dassembler-arm.cc144 Instr* pc = reinterpret_cast<Instr*>(pc_); in PatchCode()
145 Instr* instr = reinterpret_cast<Instr*>(instructions); in PatchCode()
239 const Instr kPopInstruction =
244 const Instr kPushRegPattern =
248 const Instr kPopRegPattern =
251 const Instr kMovLrPc = al | MOV | kRegister_pc_Code | kRegister_lr_Code * B12;
253 const Instr kLdrPCMask = kCondMask | 15 * B24 | 7 * B20 | 15 * B16;
254 const Instr kLdrPCPattern = al | 5 * B24 | L | kRegister_pc_Code * B16;
256 const Instr kBlxRegMask =
258 const Instr kBlxRegPattern =
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Dassembler-arm-inl.h204 Instr current_instr = Assembler::instr_at(pc_); in IsPatchedReturnSequence()
205 Instr next_instr = Assembler::instr_at(pc_ + Assembler::kInstrSize); in IsPatchedReturnSequence()
223 Instr current_instr = Assembler::instr_at(pc_); in IsPatchedDebugBreakSlotSequence()
325 void Assembler::emit(Instr x) { in emit()
327 *reinterpret_cast<Instr*>(pc_) = x; in emit()
334 Instr instr = Memory::int32_at(target_pc); in target_address_address_at()
/external/chromium_org/v8/src/arm/
Dconstants-arm.h147 typedef int32_t Instr; typedef
438 extern const Instr kPopInstruction;
442 extern const Instr kPushRegPattern;
446 extern const Instr kPopRegPattern;
449 extern const Instr kMovLrPc;
451 extern const Instr kLdrPCMask;
452 extern const Instr kLdrPCPattern;
454 extern const Instr kVldrDPCMask;
455 extern const Instr kVldrDPCPattern;
457 extern const Instr kBlxRegMask;
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Dassembler-arm.h589 bool is_single_instruction(const Assembler* assembler, Instr instr = 0) const;
705 extern const Instr kMovLrPc;
706 extern const Instr kLdrPCMask;
707 extern const Instr kLdrPCPattern;
708 extern const Instr kBlxRegMask;
709 extern const Instr kBlxRegPattern;
710 extern const Instr kBlxIp;
712 extern const Instr kMovMvnMask;
713 extern const Instr kMovMvnPattern;
714 extern const Instr kMovMvnFlip;
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Dassembler-arm.cc305 Instr* pc = reinterpret_cast<Instr*>(pc_); in PatchCode()
306 Instr* instr = reinterpret_cast<Instr*>(instructions); in PatchCode()
462 const Instr kPopInstruction =
467 const Instr kPushRegPattern =
471 const Instr kPopRegPattern =
474 const Instr kMovLrPc = al | MOV | kRegister_pc_Code | kRegister_lr_Code * B12;
476 const Instr kLdrPCMask = 15 * B24 | 7 * B20 | 15 * B16;
477 const Instr kLdrPCPattern = 5 * B24 | L | kRegister_pc_Code * B16;
479 const Instr kVldrDPCMask = 15 * B24 | 3 * B20 | 15 * B16 | 15 * B8;
480 const Instr kVldrDPCPattern = 13 * B24 | L | kRegister_pc_Code * B16 | 11 * B8;
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Dassembler-arm-inl.h276 Instr current_instr = Assembler::instr_at(pc_); in IsPatchedReturnSequence()
277 Instr next_instr = Assembler::instr_at(pc_ + Assembler::kInstrSize); in IsPatchedReturnSequence()
287 Instr current_instr = Assembler::instr_at(pc_); in IsPatchedDebugBreakSlotSequence()
392 void Assembler::emit(Instr x) { in emit()
394 *reinterpret_cast<Instr*>(pc_) = x; in emit()
400 Instr instr = Memory::int32_at(pc); in target_pointer_address_at()
432 Instr candidate_instr(Memory::int32_at(candidate)); in target_address_from_return_address()
460 static Instr EncodeMovwImmediate(uint32_t immediate) { in EncodeMovwImmediate()
/external/chromium_org/v8/src/mips/
Dassembler-mips.h541 static const int kInstrSize = sizeof(Instr);
910 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } in instr_at()
911 static void instr_at_put(byte* pc, Instr instr) { in instr_at_put()
912 *reinterpret_cast<Instr*>(pc) = instr; in instr_at_put()
914 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } in instr_at()
915 void instr_at_put(int pos, Instr instr) { in instr_at_put()
916 *reinterpret_cast<Instr*>(buffer_ + pos) = instr; in instr_at_put()
920 static bool IsBranch(Instr instr);
921 static bool IsBeq(Instr instr);
922 static bool IsBne(Instr instr);
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Dassembler-mips.cc218 Instr* pc = reinterpret_cast<Instr*>(pc_); in PatchCode()
219 Instr* instr = reinterpret_cast<Instr*>(instructions); in PatchCode()
269 const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
272 const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
275 const Instr kPushRegPattern = SW | (kRegister_sp_Code << kRsShift)
278 const Instr kPopRegPattern = LW | (kRegister_sp_Code << kRsShift)
281 const Instr kLwRegFpOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
284 const Instr kSwRegFpOffsetPattern = SW | (kRegister_fp_Code << kRsShift)
287 const Instr kLwRegFpNegOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
290 const Instr kSwRegFpNegOffsetPattern = SW | (kRegister_fp_Code << kRsShift)
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Dconstants-mips.h173 typedef int32_t Instr; typedef
581 extern const Instr kPopInstruction;
583 extern const Instr kPushInstruction;
585 extern const Instr kPushRegPattern;
587 extern const Instr kPopRegPattern;
588 extern const Instr kLwRegFpOffsetPattern;
589 extern const Instr kSwRegFpOffsetPattern;
590 extern const Instr kLwRegFpNegOffsetPattern;
591 extern const Instr kSwRegFpNegOffsetPattern;
593 extern const Instr kRtMask;
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Dassembler-mips-inl.h326 Instr instr0 = Assembler::instr_at(pc_); in IsPatchedReturnSequence()
327 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize); in IsPatchedReturnSequence()
328 Instr instr2 = Assembler::instr_at(pc_ + 2 * Assembler::kInstrSize); in IsPatchedReturnSequence()
339 Instr current_instr = Assembler::instr_at(pc_); in IsPatchedDebugBreakSlotSequence()
415 void Assembler::emit(Instr x) { in emit()
419 *reinterpret_cast<Instr*>(pc_) = x; in emit()
/external/v8/src/mips/
Dassembler-mips.h593 static const int kInstrSize = sizeof(Instr);
952 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } in instr_at()
953 static void instr_at_put(byte* pc, Instr instr) { in instr_at_put()
954 *reinterpret_cast<Instr*>(pc) = instr; in instr_at_put()
956 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } in instr_at()
957 void instr_at_put(int pos, Instr instr) { in instr_at_put()
958 *reinterpret_cast<Instr*>(buffer_ + pos) = instr; in instr_at_put()
962 static bool IsBranch(Instr instr);
963 static bool IsBeq(Instr instr);
964 static bool IsBne(Instr instr);
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Dassembler-mips.cc190 Instr* pc = reinterpret_cast<Instr*>(pc_); in PatchCode()
191 Instr* instr = reinterpret_cast<Instr*>(instructions); in PatchCode()
240 const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
243 const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
246 const Instr kPushRegPattern = SW | (kRegister_sp_Code << kRsShift)
249 const Instr kPopRegPattern = LW | (kRegister_sp_Code << kRsShift)
252 const Instr kLwRegFpOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
255 const Instr kSwRegFpOffsetPattern = SW | (kRegister_fp_Code << kRsShift)
258 const Instr kLwRegFpNegOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
261 const Instr kSwRegFpNegOffsetPattern = SW | (kRegister_fp_Code << kRsShift)
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Dconstants-mips.h172 typedef int32_t Instr; typedef
570 extern const Instr kPopInstruction;
572 extern const Instr kPushInstruction;
574 extern const Instr kPushRegPattern;
576 extern const Instr kPopRegPattern;
577 extern const Instr kLwRegFpOffsetPattern;
578 extern const Instr kSwRegFpOffsetPattern;
579 extern const Instr kLwRegFpNegOffsetPattern;
580 extern const Instr kSwRegFpNegOffsetPattern;
582 extern const Instr kRtMask;
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Dassembler-mips-inl.h275 Instr instr0 = Assembler::instr_at(pc_); in IsPatchedReturnSequence()
276 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize); in IsPatchedReturnSequence()
277 Instr instr2 = Assembler::instr_at(pc_ + 2 * Assembler::kInstrSize); in IsPatchedReturnSequence()
288 Instr current_instr = Assembler::instr_at(pc_); in IsPatchedDebugBreakSlotSequence()
361 void Assembler::emit(Instr x) { in emit()
365 *reinterpret_cast<Instr*>(pc_) = x; in emit()
/external/llvm/lib/Target/R600/
DR600OptimizeVectorRegisters.cpp59 MachineInstr *Instr; member in __anonc979ecad0111::RegSeqInfo
62 RegSeqInfo(MachineRegisterInfo &MRI, MachineInstr *MI) : Instr(MI) { in RegSeqInfo()
64 for (unsigned i = 1, e = Instr->getNumOperands(); i < e; i+=2) { in RegSeqInfo()
65 MachineOperand &MO = Instr->getOperand(i); in RegSeqInfo()
66 unsigned Chan = Instr->getOperand(i + 1).getImm(); in RegSeqInfo()
76 return RSI.Instr == Instr; in operator ==()
176 unsigned Reg = RSI->Instr->getOperand(0).getReg(); in RebuildVector()
177 MachineBasicBlock::iterator Pos = RSI->Instr; in RebuildVector()
181 unsigned SrcVec = BaseRSI->Instr->getOperand(0).getReg(); in RebuildVector()
219 RSI->Instr->eraseFromParent(); in RebuildVector()
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/external/llvm/test/TableGen/
DPaste.td3 class Instr<int i> {
8 def Vx#NAME#PS : Instr<0>;
9 def Vx#NAME#PD : Instr<1>;
10 def Vy#NAME#PS : Instr<2>;
11 def Vy#NAME#PD : Instr<3>;
Dusevalname.td3 class Instr<list<dag> pat> {
18 def rri : Instr<[(set RC:$dst, (shufp:$src3
/external/llvm/lib/Transforms/Utils/
DBypassSlowDivision.cpp84 Instruction *Instr = J; in insertFastDiv() local
85 Value *Dividend = Instr->getOperand(0); in insertFastDiv()
86 Value *Divisor = Instr->getOperand(1); in insertFastDiv()
141 PHINode *QuoPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2); in insertFastDiv()
144 PHINode *RemPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2); in insertFastDiv()
150 Instr->replaceAllUsesWith(QuoPhi); in insertFastDiv()
152 Instr->replaceAllUsesWith(RemPhi); in insertFastDiv()
153 Instr->eraseFromParent(); in insertFastDiv()
192 Instruction *Instr = J; in reuseOrInsertFastDiv() local
193 DivOpInfo Key(UseSignedOp, Instr->getOperand(0), Instr->getOperand(1)); in reuseOrInsertFastDiv()
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/external/llvm/lib/MC/
DMCDwarf.cpp895 const MCCFIInstruction &Instr);
946 const MCCFIInstruction &Instr) { in EmitCFIInstruction() argument
950 switch (Instr.getOperation()) { in EmitCFIInstruction()
952 unsigned Reg1 = Instr.getRegister(); in EmitCFIInstruction()
953 unsigned Reg2 = Instr.getRegister2(); in EmitCFIInstruction()
965 unsigned Reg = Instr.getRegister(); in EmitCFIInstruction()
977 Instr.getOperation() == MCCFIInstruction::OpAdjustCfaOffset; in EmitCFIInstruction()
984 CFAOffset += Instr.getOffset(); in EmitCFIInstruction()
986 CFAOffset = -Instr.getOffset(); in EmitCFIInstruction()
1000 Streamer.AddComment(Twine("Reg ") + Twine(Instr.getRegister())); in EmitCFIInstruction()
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/external/llvm/include/llvm/CodeGen/
DScheduleDAG.h254 MachineInstr *Instr; // Alternatively, a MachineInstr.
312 : Node(node), Instr(0), OrigNode(0), SchedClass(0), NodeNum(nodenum),
326 : Node(0), Instr(instr), OrigNode(0), SchedClass(0), NodeNum(nodenum),
339 : Node(0), Instr(0), OrigNode(0), SchedClass(0), NodeNum(BoundaryID),
362 assert(!Instr && "Setting SDNode of SUnit with MachineInstr!");
369 assert(!Instr && "Reading SDNode of SUnit with MachineInstr!");
375 bool isInstr() const { return Instr; }
381 Instr = MI;
388 return Instr;
/external/llvm/lib/IR/
DCore.cpp1694 Instruction *Instr = unwrap<Instruction>(Inst); in LLVMGetNextInstruction() local
1695 BasicBlock::iterator I = Instr; in LLVMGetNextInstruction()
1696 if (++I == Instr->getParent()->end()) in LLVMGetNextInstruction()
1702 Instruction *Instr = unwrap<Instruction>(Inst); in LLVMGetPreviousInstruction() local
1703 BasicBlock::iterator I = Instr; in LLVMGetPreviousInstruction()
1704 if (I == Instr->getParent()->begin()) in LLVMGetPreviousInstruction()
1730 unsigned LLVMGetInstructionCallConv(LLVMValueRef Instr) { in LLVMGetInstructionCallConv() argument
1731 Value *V = unwrap(Instr); in LLVMGetInstructionCallConv()
1739 void LLVMSetInstructionCallConv(LLVMValueRef Instr, unsigned CC) { in LLVMSetInstructionCallConv() argument
1740 Value *V = unwrap(Instr); in LLVMSetInstructionCallConv()
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