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Searched refs:IsN64 (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp36 IsN64(tm.getSubtarget<MipsSubtarget>().isABI_N64()) {} in MipsSEInstrInfo()
189 Opc = IsN64 ? Mips::SW_P8 : Mips::SW; in storeRegToStack()
191 Opc = IsN64 ? Mips::SD_P8 : Mips::SD; in storeRegToStack()
193 Opc = IsN64 ? Mips::STORE_AC64_P8 : Mips::STORE_AC64; in storeRegToStack()
195 Opc = IsN64 ? Mips::STORE_AC_DSP_P8 : Mips::STORE_AC_DSP; in storeRegToStack()
197 Opc = IsN64 ? Mips::STORE_AC128_P8 : Mips::STORE_AC128; in storeRegToStack()
199 Opc = IsN64 ? Mips::STORE_CCOND_DSP_P8 : Mips::STORE_CCOND_DSP; in storeRegToStack()
201 Opc = IsN64 ? Mips::SWC1_P8 : Mips::SWC1; in storeRegToStack()
205 Opc = IsN64 ? Mips::SDC164_P8 : Mips::SDC164; in storeRegToStack()
222 Opc = IsN64 ? Mips::LW_P8 : Mips::LW; in loadRegFromStack()
[all …]
DMipsRegisterInfo.cpp211 bool IsN64 = Subtarget.isABI_N64(); in getFrameRegister() local
216 return TFI->hasFP(MF) ? (IsN64 ? Mips::FP_64 : Mips::FP) : in getFrameRegister()
217 (IsN64 ? Mips::SP_64 : Mips::SP); in getFrameRegister()
DMipsISelLowering.cpp218 HasMips64(Subtarget->hasMips64()), IsN64(Subtarget->isABI_N64()), in MipsTargetLowering()
399 setStackPointerRegisterToSaveRestore(IsN64 ? Mips::SP_64 : Mips::SP); in MipsTargetLowering()
401 setExceptionPointerRegister(IsN64 ? Mips::A0_64 : Mips::A0); in MipsTargetLowering()
402 setExceptionSelectorRegister(IsN64 ? Mips::A1_64 : Mips::A1); in MipsTargetLowering()
926 LL = IsN64 ? Mips::LL_P8 : Mips::LL; in emitAtomicBinary()
927 SC = IsN64 ? Mips::SC_P8 : Mips::SC; in emitAtomicBinary()
934 LL = IsN64 ? Mips::LLD_P8 : Mips::LLD; in emitAtomicBinary()
935 SC = IsN64 ? Mips::SCD_P8 : Mips::SCD; in emitAtomicBinary()
1011 unsigned LL = IsN64 ? Mips::LL_P8 : Mips::LL; in emitAtomicBinaryPartword()
1012 unsigned SC = IsN64 ? Mips::SC_P8 : Mips::SC; in emitAtomicBinaryPartword()
[all …]
DMips64InstrInfo.td41 def _P8 : Atomic2Ops<Op, GPR64, GPR64>, Requires<[IsN64, HasStdEnc]>;
48 Requires<[IsN64, HasStdEnc]>;
170 let Predicates = [IsN64, HasStdEnc], isCodeGenOnly = 1 in {
260 let Predicates = [IsN64, HasStdEnc] in {
319 Requires<[IsN64, HasStdEnc]>;
DMipsSEInstrInfo.h24 bool IsN64; variable
DMipsInstrInfo.td170 def IsN64 : Predicate<"Subtarget.isABI_N64()">,
480 Requires<[IsN64, HasStdEnc]> {
493 Requires<[IsN64, HasStdEnc]> {
521 Requires<[IsN64, HasStdEnc]> {
531 Requires<[IsN64, HasStdEnc]> {
794 def _P8 : Atomic2Ops<Op, GPR32, GPR64>, Requires<[IsN64, HasStdEnc]>;
806 Requires<[IsN64, HasStdEnc]>;
982 let Predicates = [IsN64, HasStdEnc], DecoderNamespace = "Mips64" in {
1269 let Predicates = [IsN64, HasStdEnc] in {
1279 let Predicates = [IsN64, HasStdEnc] in {
[all …]
DMipsInstrFPU.td356 let Predicates = [IsN64, HasStdEnc], DecoderNamespace = "Mips64" in {
414 let Predicates = [IsN64, HasStdEnc], isCodeGenOnly=1 in {
614 let Predicates = [IsN64, HasStdEnc] in {
DMipsISelLowering.h330 bool HasMips64, IsN64, IsO32; variable
DMipsSEISelLowering.cpp558 unsigned T9Reg = IsN64 ? Mips::T9_64 : Mips::T9; in getOpndList()
/external/llvm/include/llvm/MC/
DMCELFObjectWriter.h52 const unsigned IsN64 : 1; variable
58 bool IsN64=false);
95 bool isN64() const { return IsN64; } in isN64()
/external/llvm/lib/MC/
DMCELFObjectTargetWriter.cpp24 IsN64(IsN64_){ in MCELFObjectTargetWriter()