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Searched refs:LR (Results 1 – 25 of 486) sorted by relevance

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/external/bison/tests/
Dreduce.at468 [[canonical LR]], [[]],
476 // Conflict resolution renders state 12 unreachable for canonical LR(1). We
497 Bison and Menhir accept non-LR(1) grammars with conflict resolution. Pager
498 designed his algorithm only for LR(1) grammars. */
581 ]AT_COND_CASE([[canonical LR]], [['a']],
607 'a' shift, and go to state ]AT_COND_CASE([[canonical LR]], [[17]],
611 ]AT_COND_CASE([[canonical LR]], [[$end]],
617 7 c: A .]AT_COND_CASE([[canonical LR]], [[ [$end]]])[
619 ]AT_COND_CASE([[canonical LR]], [[$end]],
625 3 S: 'c' c .]AT_COND_CASE([[canonical LR]], [[ [$end]]])[
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/external/llvm/include/llvm/CodeGen/
DLiveInterval.h109 bool operator<(const LiveRange &LR) const {
110 return start < LR.start || (start == LR.start && end < LR.end);
112 bool operator==(const LiveRange &LR) const {
113 return start == LR.start && end == LR.end;
122 raw_ostream& operator<<(raw_ostream& os, const LiveRange &LR);
125 inline bool operator<(SlotIndex V, const LiveRange &LR) {
126 return V < LR.start;
129 inline bool operator<(const LiveRange &LR, SlotIndex V) {
130 return LR.start < V;
377 iterator addRange(LiveRange LR) {
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/external/clang/lib/StaticAnalyzer/Checkers/
DPointerArithChecker.cpp44 const MemRegion *LR = LV.getAsRegion(); in checkPreStmt() local
46 if (!LR || !RV.isConstant()) in checkPreStmt()
51 if (isa<VarRegion>(LR) || isa<CodeTextRegion>(LR) || in checkPreStmt()
52 isa<CompoundLiteralRegion>(LR)) { in checkPreStmt()
DPointerSubChecker.cpp47 const MemRegion *LR = LV.getAsRegion(); in checkPreStmt() local
50 if (!(LR && RR)) in checkPreStmt()
53 const MemRegion *BaseLR = LR->getBaseRegion(); in checkPreStmt()
/external/clang/test/PCH/
Dcxx-reference.h3 typedef char (&LR);
10 LR &lrlr = c;
11 LR &&rrlr = c;
/external/llvm/lib/CodeGen/
DLiveInterval.cpp284 LiveInterval::addRangeFrom(LiveRange LR, iterator From) { in addRangeFrom() argument
285 SlotIndex Start = LR.start, End = LR.end; in addRangeFrom()
292 if (LR.valno == B->valno) { in addRangeFrom()
309 if (LR.valno == it->valno) { in addRangeFrom()
329 return ranges.insert(it, LR); in addRangeFrom()
541 iterator LR = I++; in MergeValueNumberInto() local
542 if (LR->valno != V1) continue; // Not a V1 LiveRange. in MergeValueNumberInto()
546 if (LR != begin()) { in MergeValueNumberInto()
547 iterator Prev = LR-1; in MergeValueNumberInto()
548 if (Prev->valno == V2 && Prev->end == LR->start) { in MergeValueNumberInto()
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DRegAllocFast.cpp233 void RAFast::addKillFlag(const LiveReg &LR) { in addKillFlag() argument
234 if (!LR.LastUse) return; in addKillFlag()
235 MachineOperand &MO = LR.LastUse->getOperand(LR.LastOpNum); in addKillFlag()
236 if (MO.isUse() && !LR.LastUse->isRegTiedToDefOperand(LR.LastOpNum)) { in addKillFlag()
237 if (MO.getReg() == LR.PhysReg) in addKillFlag()
240 LR.LastUse->addRegisterKilled(LR.PhysReg, TRI, true); in addKillFlag()
277 LiveReg &LR = *LRI; in spillVirtReg() local
278 assert(PhysRegState[LR.PhysReg] == LRI->VirtReg && "Broken RegState mapping"); in spillVirtReg()
280 if (LR.Dirty) { in spillVirtReg()
283 bool SpillKill = LR.LastUse != MI; in spillVirtReg()
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DExecutionDepsFix.cpp578 const LiveReg &LR = LiveRegs[rx]; in visitSoftInstr() local
580 if (!LR.Value->getCommonDomains(available)) { in visitSoftInstr()
588 if (LR.Def < i->Def) { in visitSoftInstr()
590 Regs.insert(i, LR); in visitSoftInstr()
594 Regs.push_back(LR); in visitSoftInstr()
/external/clang/test/Lexer/
Dstring_concat.cpp18 …const char* f = u8"abc" LR"(abc)"; // expected-error {{unsupported non-standard concatenation of s… in f()
27 …const char16_t* l = u"abc" LR"(abc)"; // expected-error {{unsupported non-standard concatenation o… in f()
36 …const char32_t* r = U"abc" LR"(abc)"; // expected-error {{unsupported non-standard concatenation o… in f()
Dstring-literal-encoding.c12 … wchar_t const *d = LR"(�����)"; // expected-error {{illegal character encoding in string literal}} in f()
26 …wchar_t const *d = LR"(foo �����)"; // expected-error {{illegal character encoding in string liter… in g()
/external/llvm/test/CodeGen/R600/
Dpredicates.ll26 ; CHECK: LSH{{[LR] \* T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
27 ; CHECK: LSH{{[LR] \* T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
80 ; CHECK: LSH{{[LR] \* T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
81 ; CHECK: LSH{{[LR] \* T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
/external/valgrind/main/coregrind/m_dispatch/
Ddispatch-s390x-linux.S54 #undef LR
55 #define LR S390_REGNO_LINK_REGISTER macro
172 br LR
/external/llvm/lib/Target/XCore/
DXCoreFrameLowering.cpp125 MBB.addLiveIn(XCore::LR); in emitPrologue()
141 storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4, dl, TII); in emitPrologue()
142 MBB.addLiveIn(XCore::LR); in emitPrologue()
215 loadFromStack(MBB, MBBI, XCore::LR, LRSpillOffset, dl, TII); in emitEpilogue()
359 bool LRUsed = MF.getRegInfo().isPhysRegUsed(XCore::LR); in processFunctionBeforeCalleeSavedScan()
363 MF.getRegInfo().setPhysRegUnused(XCore::LR); in processFunctionBeforeCalleeSavedScan()
DXCoreRegisterInfo.td41 def LR : Ri<15, "lr">, DwarfRegNum<[15]>;
57 R11, CP, DP, SP, LR)> {
DXCoreRegisterInfo.cpp41 : XCoreGenRegisterInfo(XCore::LR) { in XCoreRegisterInfo()
66 XCore::R8, XCore::R9, XCore::R10, XCore::LR, in getCalleeSavedRegs()
79 Reserved.set(XCore::LR); in getReservedRegs()
/external/valgrind/main/VEX/orig_ppc32/
Ddate.orig27 15: PUTL t10, LR
37 0: GETL LR, t0
197 1: PUTL t0, LR
207 0: GETL LR, t0
219 8: PUTL t4, LR
229 0: GETL LR, t0
231 2: PUTL t2, LR
241 0: GETL LR, t0
1016 13: PUTL t8, LR
1026 0: GETL LR, t0
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Dreturn0.orig27 15: PUTL t10, LR
37 0: GETL LR, t0
197 1: PUTL t0, LR
207 0: GETL LR, t0
219 8: PUTL t4, LR
229 0: GETL LR, t0
231 2: PUTL t2, LR
241 0: GETL LR, t0
1016 13: PUTL t8, LR
1026 0: GETL LR, t0
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/external/antlr/antlr-3.4/tool/src/main/resources/org/antlr/tool/templates/dot/
Dnfa.st2 rankdir=LR;
/external/llvm/lib/Target/ARM/
DARMFrameLowering.cpp182 case ARM::LR: in emitPrologue()
609 if (Reg == ARM::LR) { in emitPushInst()
675 if (Reg == ARM::LR && !isTailCall && !isVarArg && STI.hasV5TOps()) { in emitPopInst()
709 Regs[0] = ARM::LR; in emitPopInst()
1180 MRI.setPhysRegUsed(ARM::LR); in processFunctionBeforeCalleeSavedScan()
1218 if (Reg == ARM::LR) in processFunctionBeforeCalleeSavedScan()
1226 case ARM::LR: in processFunctionBeforeCalleeSavedScan()
1245 case ARM::LR: in processFunctionBeforeCalleeSavedScan()
1296 MRI.setPhysRegUsed(ARM::LR); in processFunctionBeforeCalleeSavedScan()
1299 UnspilledCS1GPRs.end(), (unsigned)ARM::LR)); in processFunctionBeforeCalleeSavedScan()
[all …]
DARMCallingConv.td194 def CSR_AAPCS : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6, R5, R4,
201 def CSR_AAPCS_ThisReturn : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6,
207 def CSR_iOS : CalleeSavedRegs<(add LR, R7, R6, R5, R4, (sub CSR_AAPCS, R9))>;
209 def CSR_iOS_ThisReturn : CalleeSavedRegs<(add LR, R7, R6, R5, R4,
/external/clang/test/SemaCXX/
Dcxx0x-type-convert-construct.cpp14 …LRstr = LR"foo(a wide raw string)foo"; // expected-warning{{conversion from string literal to 'wch… in f()
/external/clang/test/CodeGen/
Dstring-literal-unicode-conversion.c61 wchar_t const *i = LR"(7Кошка)"; in f()
Dstring-literal.c86 const wchar_t *l = LR"bar(KL)bar"; in main()
/external/bison/data/
DREADME22 A Generalized LR C parser based on Bison's LALR(1) tables.
25 A Generalized LR C++ parser. Actually a C++ wrapper around glr.c.
/external/chromium_org/third_party/tcmalloc/vendor/doc/
Dthreadheap.dot2 rankdir=LR

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