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1 
2 /*---------------------------------------------------------------*/
3 /*--- begin                                 guest_mips_defs.h ---*/
4 /*---------------------------------------------------------------*/
5 
6 /*
7    This file is part of Valgrind, a dynamic binary instrumentation
8    framework.
9 
10    Copyright (C) 2010-2012 RT-RK
11       mips-valgrind@rt-rk.com
12 
13    This program is free software; you can redistribute it and/or
14    modify it under the terms of the GNU General Public License as
15    published by the Free Software Foundation; either version 2 of the
16    License, or (at your option) any later version.
17 
18    This program is distributed in the hope that it will be useful, but
19    WITHOUT ANY WARRANTY; without even the implied warranty of
20    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
21    General Public License for more details.
22 
23    You should have received a copy of the GNU General Public License
24    along with this program; if not, write to the Free Software
25    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
26    02111-1307, USA.
27 
28    The GNU General Public License is contained in the file COPYING.
29 */
30 
31 /* Only to be used within the guest-mips directory. */
32 
33 #ifndef __VEX_GUEST_MIPS_DEFS_H
34 #define __VEX_GUEST_MIPS_DEFS_H
35 
36 /*---------------------------------------------------------*/
37 /*--- mips to IR conversion                             ---*/
38 /*---------------------------------------------------------*/
39 
40 /* Convert one MIPS insn to IR.  See the type DisOneInstrFn in
41    bb_to_IR.h. */
42 extern DisResult disInstr_MIPS ( IRSB*        irbb,
43                                  Bool         (*resteerOkFn) (void *, Addr64),
44                                  Bool         resteerCisOk,
45                                  void*        callback_opaque,
46                                  UChar*       guest_code,
47                                  Long         delta,
48                                  Addr64       guest_IP,
49                                  VexArch      guest_arch,
50                                  VexArchInfo* archinfo,
51                                  VexAbiInfo*  abiinfo,
52                                  Bool         host_bigendian );
53 
54 /* Used by the optimiser to specialise calls to helpers. */
55 extern IRExpr *guest_mips32_spechelper(HChar * function_name, IRExpr ** args,
56                                        IRStmt ** precedingStmts,
57                                        Int n_precedingStmts);
58 
59 /* Describes to the optimser which part of the guest state require
60    precise memory exceptions.  This is logically part of the guest
61    state description. */
62 extern Bool guest_mips32_state_requires_precise_mem_exns(Int, Int);
63 
64 extern VexGuestLayout mips32Guest_layout;
65 
66 /*---------------------------------------------------------*/
67 /*--- mips guest helpers                                 ---*/
68 /*---------------------------------------------------------*/
69 
70 extern UInt mips32_dirtyhelper_mfc0(UInt rd, UInt sel);
71 
72 extern void mips32_dirtyhelper_sync(UInt sync);
73 
74 /*---------------------------------------------------------*/
75 /*--- Condition code stuff                              ---*/
76 /*---------------------------------------------------------*/
77 
78 /* Defines conditions which we can ask for (MIPS MIPS 2e page A3-6) */
79 
80 typedef enum {
81    MIPSCondEQ = 0,      /* equal                         : Z=1 */
82    MIPSCondNE = 1,      /* not equal                     : Z=0 */
83 
84    MIPSCondHS = 2,      /* >=u (higher or same)          : C=1 */
85    MIPSCondLO = 3,      /* <u  (lower)                   : C=0 */
86 
87    MIPSCondMI = 4,      /* minus (negative)              : N=1 */
88    MIPSCondPL = 5,      /* plus (zero or +ve)            : N=0 */
89 
90    MIPSCondVS = 6,      /* overflow                      : V=1 */
91    MIPSCondVC = 7,      /* no overflow                   : V=0 */
92 
93    MIPSCondHI = 8,      /* >u   (higher)                 : C=1 && Z=0 */
94    MIPSCondLS = 9,      /* <=u  (lower or same)          : C=0 || Z=1 */
95 
96    MIPSCondGE = 10,  /* >=s (signed greater or equal) : N=V */
97    MIPSCondLT = 11,  /* <s  (signed less than)        : N!=V */
98 
99    MIPSCondGT = 12,  /* >s  (signed greater)          : Z=0 && N=V */
100    MIPSCondLE = 13,  /* <=s (signed less or equal)    : Z=1 || N!=V */
101 
102    MIPSCondAL = 14,  /* always (unconditional)        : 1 */
103    MIPSCondNV = 15      /* never (unconditional):        : 0 */
104        /* NB: MIPS have deprecated the use of the NV condition code.
105           You are now supposed to use MOV R0,R0 as a noop rather than
106           MOVNV R0,R0 as was previously recommended.  Future processors
107           may have the NV condition code reused to do other things.  */
108 } MIPSCondcode;
109 
110 #endif            /* __VEX_GUEST_MIPS_DEFS_H */
111 
112 /*---------------------------------------------------------------*/
113 /*--- end                                   guest_mips_defs.h ---*/
114 /*---------------------------------------------------------------*/
115