Searched refs:Mask2 (Results 1 – 6 of 6) sorted by relevance
/external/llvm/lib/Transforms/InstCombine/ |
D | InstCombineSimplifyDemanded.cpp | 727 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); in SimplifyDemandedUseBits() local 728 if (SimplifyDemandedBits(I->getOperandUse(0), Mask2, in SimplifyDemandedUseBits()
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/external/llvm/lib/Transforms/Vectorize/ |
D | BBVectorize.cpp | 2761 std::vector<Constant*> Mask1(numElemI), Mask2(numElemI); in replaceOutputsOfPair() local 2764 Mask2[v] = ConstantInt::get(Type::getInt32Ty(Context), numElemJ+v); in replaceOutputsOfPair() 2777 std::vector<Constant*> Mask1(numElemJ), Mask2(numElemJ); in replaceOutputsOfPair() local 2780 Mask2[v] = ConstantInt::get(Type::getInt32Ty(Context), numElemI+v); in replaceOutputsOfPair() 2784 ConstantVector::get( Mask2), in replaceOutputsOfPair()
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/external/llvm/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 1021 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local 1086 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in emitAtomicBinaryPartword() 1129 .addReg(OldVal).addReg(Mask2); in emitAtomicBinaryPartword() 1264 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local 1336 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in emitAtomicCmpSwapPartword() 1364 .addReg(OldVal).addReg(Mask2); in emitAtomicCmpSwapPartword()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 3574 SDValue Mask2 = DAG.getConstant(0x7fffffff, MVT::i32); in LowerFCOPYSIGN() local 3578 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN() 3587 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN() 8493 unsigned Mask2 = N11C->getZExtValue(); in PerformORCombine() local 8498 (Mask == ~Mask2)) { in PerformORCombine() 8505 unsigned amt = countTrailingZeros(Mask2); in PerformORCombine() 8514 (~Mask == Mask2)) { in PerformORCombine() 8518 (Mask2 == 0xffff || Mask2 == 0xffff0000)) in PerformORCombine() 8525 DAG.getConstant(Mask2, MVT::i32)); in PerformORCombine() 8585 unsigned Mask2 = N11C->getZExtValue(); in PerformBFICombine() local [all …]
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 6792 int Mask2[] = { -1, -1, -1, -1 }; in LowerVECTOR_SHUFFLE_128v4() local 6798 Mask2[i] = Idx; in LowerVECTOR_SHUFFLE_128v4() 6801 return DAG.getVectorShuffle(VT, dl, V1, V1, &Mask2[0]); in LowerVECTOR_SHUFFLE_128v4() 9149 SDValue Mask2 = DAG.getLoad(VT, dl, DAG.getEntryNode(), CPIdx, in LowerFCOPYSIGN() local 9152 SDValue Val = DAG.getNode(X86ISD::FAND, dl, VT, Op0, Mask2); in LowerFCOPYSIGN()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 2057 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); in ComputeMaskedBits() local
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