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Searched refs:NON_EXTLOAD (Results 1 – 20 of 20) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h688 NON_EXTLOAD = 0, enumerator
DSelectionDAGNodes.h1855 return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD &&
1863 cast<LoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp297 Extension = ISD::NON_EXTLOAD; in SelectToLitPool()
306 Extension = ISD::NON_EXTLOAD; in SelectToLitPool()
/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp305 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD) in isValidIndexedLoad()
DMSP430ISelLowering.cpp1004 if (LD->getExtensionType() != ISD::NON_EXTLOAD) in getPostIndexedAddressParts()
/external/llvm/lib/Target/SystemZ/
DSystemZOperators.td135 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp157 if (LD->getMemoryVT().isVector() && ExtType != ISD::NON_EXTLOAD) { in LegalizeOp()
DLegalizeFloatTypes.cpp503 if (L->getExtensionType() == ISD::NON_EXTLOAD) { in SoftenFloatRes_LOAD()
515 NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD, in SoftenFloatRes_LOAD()
DDAGCombiner.cpp2618 case ISD::NON_EXTLOAD: B = true; break; in visitAND()
5125 ISD::LoadExtType ExtType = ISD::NON_EXTLOAD; in ReduceLoadWidth()
5223 if (LN0->getExtensionType() != ISD::NON_EXTLOAD && in ReduceLoadWidth()
5249 if (ExtType == ISD::NON_EXTLOAD) in ReduceLoadWidth()
7469 if (LD->getExtensionType() == ISD::NON_EXTLOAD) { in visitLOAD()
8221 if (Ld->getExtensionType() != ISD::NON_EXTLOAD) in MergeConsecutiveStores()
9738 if (LLD->getExtensionType() == ISD::NON_EXTLOAD) { in SimplifySelectOps()
DSelectionDAG.cpp4426 ExtType = ISD::NON_EXTLOAD; in getLoad()
4427 } else if (ExtType == ISD::NON_EXTLOAD) { in getLoad()
4476 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, in getLoad()
DLegalizeDAG.cpp531 if (HiExtType == ISD::NON_EXTLOAD) in ExpandUnalignedLoad()
873 if (ExtType == ISD::NON_EXTLOAD) { in LegalizeLoadOps()
DTargetLowering.cpp1194 if (Lod->getExtensionType() != ISD::NON_EXTLOAD) in SimplifySetCC()
DLegalizeVectorTypes.cpp2105 if (ExtType != ISD::NON_EXTLOAD) in WidenVecRes_LOAD()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td611 return cast<LoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp377 assert(LD->getExtensionType() == ISD::NON_EXTLOAD && in LowerLOAD()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp1176 assert(LD->getExtensionType() == ISD::NON_EXTLOAD); in LowerLOADi1()
/external/llvm/lib/Target/X86/
DX86InstrInfo.td725 if (ExtType == ISD::NON_EXTLOAD)
743 if (ExtType == ISD::NON_EXTLOAD)
DX86ISelDAGToDAG.cpp411 LD->getExtensionType() != ISD::NON_EXTLOAD) in isCalleeLoad()
DX86ISelLowering.cpp17292 !DCI.isBeforeLegalizeOps() && !IsAligned && Ext == ISD::NON_EXTLOAD) { in PerformLOADCombine()
18455 if (LD->getExtensionType() == ISD::NON_EXTLOAD /*&& in IsDesirableToPromoteOp()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp1994 if ((VT == MVT::i64) && (ExtType == ISD::NON_EXTLOAD)) { in lowerLOAD()