| /external/llvm/test/CodeGen/Mips/ |
| D | atomic.ll | 127 ; CHECK-EL: or $[[R14:[0-9]+]], $[[R13]], $[[R12]]
128 ; CHECK-EL: sc $[[R14]], 0($[[R2]])
129 ; CHECK-EL: beqz $[[R14]], $[[BB0]]
153 ; CHECK-EB: or $[[R14:[0-9]+]], $[[R13]], $[[R12]]
154 ; CHECK-EB: sc $[[R14]], 0($[[R2]])
155 ; CHECK-EB: beqz $[[R14]], $[[BB0]]
184 ; CHECK-EL: or $[[R14:[0-9]+]], $[[R13]], $[[R12]]
185 ; CHECK-EL: sc $[[R14]], 0($[[R2]])
186 ; CHECK-EL: beqz $[[R14]], $[[BB0]]
210 ; CHECK-EB: or $[[R14:[0-9]+]], $[[R13]], $[[R12]]
[all …]
|
| /external/kernel-headers/original/asm-x86/ |
| D | ptrace-abi.h | 29 #define R14 8 macro
|
| /external/valgrind/main/VEX/auxprogs/ |
| D | genoffsets.c | 114 GENOFFSET(AMD64,amd64,R14); in foo()
157 GENOFFSET(ARM,arm,R14); in foo()
|
| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 94 case X86::EDI: case X86::R14: return 4; in getCompactUnwindRegNum()
580 case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14: in getX86SubSuperRegister()
617 case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14: in getX86SubSuperRegister()
653 case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14: in getX86SubSuperRegister()
689 case X86::R14B: case X86::R14W: case X86::R14D: case X86::R14: in getX86SubSuperRegister()
690 return X86::R14; in getX86SubSuperRegister()
|
| D | X86CallingConv.td | 312 CCAssignToReg<[R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15]>>,
547 def CSR_64 : CalleeSavedRegs<(add RBX, R12, R13, R14, R15, RBP)>;
552 def CSR_Win64 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, R13, R14, R15,
556 R11, R12, R13, R14, R15, RBP,
561 R13, R14, R15,
565 R12, R13, R14, R15,
|
| D | X86RegisterInfo.td | 146 def R14 : X86Reg<"r14", 14, [R14D]>, DwarfRegNum<[14, -2, -2]>;
308 // R12, R13, R14, and R15 for X86-64) are callee-save registers.
340 RBX, R14, R15, R12, R13, RBP, RSP, RIP)>;
|
| D | X86FrameLowering.cpp | 376 X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 in getCompactUnwindRegNum()
1385 return Primary ? X86::R14 : X86::R13; in GetScratchRegister()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430CallingConv.td | 19 // i16 are returned in registers R15, R14, R13, R12
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.td | 78 def R14 : Ri<14, "r14">, DwarfRegNum<[14]>;
110 def D7 : Rd<14, "r15:14", [R14, R15]>, DwarfRegNum<[46]>;
|
| /external/valgrind/main/coregrind/m_sigframe/ |
| D | sigframe-arm-linux.c | 152 SC2(lr,R14); in synth_ucontext()
331 REST(lr,R14); in VG_()
|
| D | sigframe-amd64-linux.c | 351 SC2(r14,R14); in synth_ucontext()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.td | 111 def CSR_Darwin32 : CalleeSavedRegs<(add R13, R14, R15, R16, R17, R18, R19, R20,
120 def CSR_SVR432 : CalleeSavedRegs<(add R14, R15, R16, R17, R18, R19, R20,
|
| D | PPCFrameLowering.h | 204 {PPC::R14, -72}, in getCalleeSavedSpillSlots()
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 175 ENTRY(R14) \
193 ENTRY(R14) \
|
| /external/llvm/test/CodeGen/X86/ |
| D | ghc-cc64.ll | 9 @r2 = external global i64 ; assigned to register: R14
|
| D | optimize-max-3.ll | 49 ; CHECK-NEXT: cmpl [[R14:%[a-z0-9]+]], [[BX]]
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDILRegisterInfo.td | 36 def R14 : AMDILReg<14, "r14">, DwarfRegNum<[14]>;
|
| /external/llvm/lib/Target/R600/ |
| D | AMDILRegisterInfo.td | 36 def R14 : AMDILReg<14, "r14">, DwarfRegNum<[14]>;
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILRegisterInfo.td | 36 def R14 : AMDILReg<14, "r14">, DwarfRegNum<[14]>;
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZRegisterInfo.td | 83 /// together with R14 and R15 in one prolog instruction.
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 669 case X86::R12: case X86::R13: case X86::R14: case X86::R15: in isX86_64ExtendedReg()
|
| /external/libvpx/libvpx/third_party/x86inc/ |
| D | x86inc.asm | 413 DECLARE_REG 13, R14, R14D, R14W, R14B, 112
490 DECLARE_REG 13, R14, R14D, R14W, R14B, 64
|
| /external/valgrind/main/VEX/orig_ppc32/ |
| D | return0.orig | 6175 21: GETL R14, t16
6205 43: PUTL t34, R14
6379 161: GETL R14, t128
6421 191: GETL R14, t152
6428 196: GETL R14, t156
6435 201: GETL R14, t160
6442 206: GETL R14, t164
8843 0: GETL R14, t0
9176 0: GETL R14, t0
9208 22: GETL R14, t20
[all …]
|
| D | date.orig | 6175 21: GETL R14, t16
6205 43: PUTL t34, R14
6379 161: GETL R14, t128
6421 191: GETL R14, t152
6428 196: GETL R14, t156
6435 201: GETL R14, t160
6442 206: GETL R14, t164
8843 0: GETL R14, t0
9176 0: GETL R14, t0
9208 22: GETL R14, t20
[all …]
|
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 38 PPC::R12, PPC::R13, PPC::R14, PPC::R15,
49 PPC::R12, PPC::R13, PPC::R14, PPC::R15,
|