/external/ppp/pppd/ |
D | sha1.c | 39 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro 83 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1_Transform() 84 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1_Transform() 85 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1_Transform() 86 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1_Transform() 87 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1_Transform()
|
/external/chromium_org/third_party/libjingle/source/talk/base/ |
D | sha1.cc | 134 #define R4(v, w, x, y, z, i) \ macro 193 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform() 194 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform() 195 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform() 196 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform() 197 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
|
/external/valgrind/main/none/tests/ |
D | sha1_test.c | 97 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro 142 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform() 143 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform() 144 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform() 145 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform() 146 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
|
/external/wpa_supplicant_8/src/crypto/ |
D | sha1-internal.c | 150 #define R4(v,w,x,y,z,i) \ macro 208 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform() 209 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform() 210 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform() 211 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform() 212 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
|
/external/chromium_org/third_party/smhasher/src/ |
D | sha1.cpp | 111 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro 149 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1_Transform() 150 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1_Transform() 151 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1_Transform() 152 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1_Transform() 153 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1_Transform()
|
/external/llvm/test/CodeGen/Mips/ |
D | atomic.ll | 116 ; CHECK-EL: sll $[[R4:[0-9]+]], $[[R3]], 3 118 ; CHECK-EL: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]] 120 ; CHECK-EL: sllv $[[R9:[0-9]+]], $4, $[[R4]] 132 ; CHECK-EL: srlv $[[R16:[0-9]+]], $[[R15]], $[[R4]] 141 ; CHECK-EB: xori $[[R4:[0-9]+]], $[[R3]], 3 142 ; CHECK-EB: sll $[[R5:[0-9]+]], $[[R4]], 3 173 ; CHECK-EL: sll $[[R4:[0-9]+]], $[[R3]], 3 175 ; CHECK-EL: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]] 177 ; CHECK-EL: sllv $[[R9:[0-9]+]], $4, $[[R4]] 189 ; CHECK-EL: srlv $[[R16:[0-9]+]], $[[R15]], $[[R4]] [all …]
|
D | 2010-07-20-Switch.ll | 22 ; PIC-O32: lw $[[R4:[0-9]+]], %lo($JTI0_0)($[[R2]]) 23 ; PIC-O32: addu $[[R5:[0-9]+]], $[[R4:[0-9]+]] 28 ; N64: ld $[[R4:[0-9]+]], %got_ofst($JTI0_0)($[[R2]]) 29 ; N64: daddu $[[R5:[0-9]+]], $[[R4:[0-9]+]]
|
D | mips64imm.ll | 40 ; CHECK: dsll $[[R4:[0-9]+]], $[[R3]], 17 41 ; CHECK: daddiu ${{[0-9]+}}, $[[R4]], 13398
|
/external/bison/doc/figs/ |
D | example-reduce.dot | 9 1 -> "1R4" [label="[\";\"]" style=solid] 10 "1R4" [style=filled shape=diamond fillcolor=yellowgreen label="R4"]
|
D | example.dot | 18 1 -> "1R4" [label="[\".\"]", style=solid] 19 "1R4" [label="R4", fillcolor=3, shape=diamond, style=filled]
|
/external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/lc3b/tests/ |
D | lc3b-mp22NC.asm | 16 ADD R4, R2, -4 18 STB R7, R4, 0 28 ADD R4, R2, -10 31 STB R7, R4, 0 46 AND R4, R4, 0 48 ADD R4, R4, -1 53 ADD R3, R3, R4
|
/external/llvm/lib/Target/ARM/ |
D | ARMFrameLowering.cpp | 178 case ARM::R4: in emitPrologue() 309 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::R4) in emitPrologue() 312 TII.get(ARM::t2BICri), ARM::R4) in emitPrologue() 313 .addReg(ARM::R4, RegState::Kill) in emitPrologue() 316 .addReg(ARM::R4, RegState::Kill)); in emitPrologue() 406 assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) && in emitEpilogue() 408 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 412 .addReg(ARM::R4)); in emitEpilogue() 777 AddDefaultCC(AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc), ARM::R4) in emitAlignedDPRCS2Spills() 784 AddDefaultCC(AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc), ARM::R4) in emitAlignedDPRCS2Spills() [all …]
|
D | ARMCallingConv.td | 98 // Pass in STG registers: Base, Sp, Hp, R1, R2, R3, R4, SpLim 99 CCIfType<[i32], CCAssignToReg<[R4, R5, R6, R7, R8, R9, R10, R11]>> 194 def CSR_AAPCS : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6, R5, R4, 202 R5, R4, (sequence "D%u", 15, 8), 206 // Also save R7-R4 first to match the stack frame fixed spill areas. 207 def CSR_iOS : CalleeSavedRegs<(add LR, R7, R6, R5, R4, (sub CSR_AAPCS, R9))>; 209 def CSR_iOS_ThisReturn : CalleeSavedRegs<(add LR, R7, R6, R5, R4,
|
/external/llvm/test/CodeGen/ARM/ |
D | fast-isel-call.ll | 102 ; ARM: movw [[R4:l?r[0-9]*]], #40 108 ; ARM: and [[R4]], [[R4]], #255 109 ; ARM: str [[R4]], [sp] 110 ; ARM: and [[R4]], [[R5]], #255 111 ; ARM: str [[R4]], [sp, #4] 127 ; THUMB: movw [[R4:l?r[0-9]*]], #40 128 ; THUMB: movt [[R4]], #0 135 ; THUMB: and [[R4]], [[R4]], #255 136 ; THUMB: str.w [[R4]], [sp] 137 ; THUMB: and [[R4]], [[R5]], #255 [all …]
|
D | 2013-04-21-AAPCS-VA-C.1.cp.ll | 3 ;Check that after %C was sent to stack, we set Next Core Register Number to R4. 21 double %C, ; --> SP, NCRN := R4
|
D | 2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll | 2 ;Check case when NSAA != 0, and NCRN < R4, NCRN+ParamSize > R4
|
D | 2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll | 2 ;Check case when NSAA != 0, and NCRN < R4, NCRN+ParamSize < R4
|
/external/llvm/test/CodeGen/SPARC/ |
D | blockaddr.ll | 37 ; abs64: sllx [[R3]], 32, [[R4:%[gilo][0-7]]] 48 ; v8pic32: add [[R3]], %lo([[BLK]]), %[[R4:[gilo][0-7]]] 50 ; v8pic32: ld [%[[R2]]+%[[R4]]], %o0 59 ; v9pic32: add [[R3]], %lo([[BLK]]), %[[R4:[gilo][0-7]]] 61 ; v9pic32: ldx [%[[R2]]+%[[R4]]], %o0
|
/external/llvm/lib/Target/XCore/ |
D | XCoreRegisterInfo.td | 30 def R4 : Ri< 4, "r4">, DwarfRegNum<[4]>; 49 R4, R5, R6, R7, R8, R9, R10, 56 R4, R5, R6, R7, R8, R9, R10,
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonCallingConv.td | 20 CCIfType<[i32, f32], CCAssignToReg<[R0, R1, R2, R3, R4, R5]>>, 30 CCIfType<[f32, i32, i16, i8], CCAssignToReg<[R0, R1, R2, R3, R4, R5]>>,
|
/external/llvm/test/TableGen/ |
D | ForeachLoop.td | 37 // CHECK: def R4 38 // CHECK: string Name = "R4";
|
D | ForeachList.td | 61 // CHECK: def R4 62 // CHECK: string Name = "R4";
|
/external/llvm/test/CodeGen/PowerPC/ |
D | rlwimi-and.ll | 35 ; CHECK-DAG: rlwinm [[R4:[0-9]+]], [[R3]], 0, 23, 23 36 ; CHECK: rlwimi [[R4]], [[R2]], 0,
|
/external/valgrind/main/VEX/orig_ppc32/ |
D | return0.orig | 10 4: PUTL t2, R4 20 10: GETL R4, t6 267 18: PUTL t12, R4 285 30: GETL R4, t22 392 28: PUTL t18, R4 595 1: GETL R4, t2 735 8: PUTL t6, R4 739 10: GETL R4, t8 1001 4: PUTL t2, R4 1062 5: GETL R4, t4 [all …]
|
/external/llvm/include/llvm/Support/ |
D | MathExtras.h | 229 #define R4(n) R2(n), R2(n + 2 * 16), R2(n + 1 * 16), R2(n + 3 * 16) macro 230 #define R6(n) R4(n), R4(n + 2 * 4), R4(n + 1 * 4), R4(n + 3 * 4)
|