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Searched refs:SMUL_LOHI (Results 1 – 24 of 24) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h181 SMUL_LOHI, UMUL_LOHI, enumerator
DSelectionDAG.h934 case ISD::SMUL_LOHI:
/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp92 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom); in MipsSETargetLowering()
145 case ISD::SMUL_LOHI: return lowerMulDiv(Op, MipsISD::Mult, true, true, DAG); in LowerOperation()
186 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) in selectMADD()
262 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) in selectMSUB()
DMips16ISelDAGToDAG.cpp288 case ISD::SMUL_LOHI: in selectNode()
/external/llvm/lib/Target/R600/
DAMDILISelLowering.cpp109 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
137 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
153 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
DAMDILISelLowering.cpp120 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
148 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
168 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDILISelLowering.cpp120 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
148 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
168 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp161 case ISD::SMUL_LOHI: return "smul_lohi"; in getOperationName()
DTargetLowering.cpp2492 else if (IsAfterLegalization ? isOperationLegal(ISD::SMUL_LOHI, VT) : in BuildSDIV()
2493 isOperationLegalOrCustom(ISD::SMUL_LOHI, VT)) in BuildSDIV()
2494 Q = SDValue(DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(VT, VT), in BuildSDIV()
DLegalizeDAG.cpp3354 ISD::SMUL_LOHI; in ExpandNode()
3377 bool HasSMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::SMUL_LOHI, VT); in ExpandNode()
3383 OpToUse = ISD::SMUL_LOHI; in ExpandNode()
3387 OpToUse = ISD::SMUL_LOHI; in ExpandNode()
3460 { ISD::MULHS, ISD::SMUL_LOHI, ISD::SIGN_EXTEND }}; in ExpandNode()
DLegalizeIntegerTypes.cpp1921 bool HasSMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::SMUL_LOHI, NVT); in ExpandIntRes_MUL()
1953 Lo = DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(NVT, NVT), LL, RL); in ExpandIntRes_MUL()
DDAGCombiner.cpp1121 case ISD::SMUL_LOHI: return visitSMUL_LOHI(N); in visit()
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp102 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom); in XCoreTargetLowering()
182 case ISD::SMUL_LOHI: return LowerSMUL_LOHI(Op, DAG); in LowerOperation()
517 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::SMUL_LOHI && in LowerSMUL_LOHI()
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp146 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Expand); in MSP430TargetLowering()
151 setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand); in MSP430TargetLowering()
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp1079 case ISD::SMUL_LOHI: in MatchAddressRecursively()
2263 case ISD::SMUL_LOHI: in Select()
2268 bool isSigned = Opcode == ISD::SMUL_LOHI; in Select()
DX86ISelLowering.cpp830 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in resetOperationActions()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1426 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in HexagonTargetLowering()
1428 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in HexagonTargetLowering()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp171 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in SystemZTargetLowering()
172 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in SystemZTargetLowering()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td322 def smullohi : SDNode<"ISD::SMUL_LOHI" , SDTIntBinHiLoOp, [SDNPCommutative]>;
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp1353 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in SparcTargetLowering()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp653 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in ARMTargetLowering()
7989 V->getOpcode() == ISD::SMUL_LOHI) in findMUL_LOHI()
8035 AddcOp0->getOpcode() != ISD::SMUL_LOHI && in AddCombineTo64bitMLAL()
8037 AddcOp1->getOpcode() != ISD::SMUL_LOHI) in AddCombineTo64bitMLAL()
8073 unsigned FinalOpc = (Opc == ISD::SMUL_LOHI) ? ARMISD::SMLAL : ARMISD::UMLAL; in AddCombineTo64bitMLAL()
DARMISelDAGToDAG.cpp2787 case ISD::SMUL_LOHI: { in Select()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp117 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in PPCTargetLowering()
119 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in PPCTargetLowering()
421 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in PPCTargetLowering()
/external/llvm/docs/
DCodeGenerator.rst1067 multiple values (e.g. ``SMUL_LOHI``, ``LOAD``, ``CALL``, etc). This is the