/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 181 SMUL_LOHI, UMUL_LOHI, enumerator
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D | SelectionDAG.h | 934 case ISD::SMUL_LOHI:
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/external/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 92 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom); in MipsSETargetLowering() 145 case ISD::SMUL_LOHI: return lowerMulDiv(Op, MipsISD::Mult, true, true, DAG); in LowerOperation() 186 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) in selectMADD() 262 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) in selectMSUB()
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D | Mips16ISelDAGToDAG.cpp | 288 case ISD::SMUL_LOHI: in selectNode()
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/external/llvm/lib/Target/R600/ |
D | AMDILISelLowering.cpp | 109 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering() 137 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering() 153 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
D | AMDILISelLowering.cpp | 120 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering() 148 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering() 168 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDILISelLowering.cpp | 120 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering() 148 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering() 168 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 161 case ISD::SMUL_LOHI: return "smul_lohi"; in getOperationName()
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D | TargetLowering.cpp | 2492 else if (IsAfterLegalization ? isOperationLegal(ISD::SMUL_LOHI, VT) : in BuildSDIV() 2493 isOperationLegalOrCustom(ISD::SMUL_LOHI, VT)) in BuildSDIV() 2494 Q = SDValue(DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(VT, VT), in BuildSDIV()
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D | LegalizeDAG.cpp | 3354 ISD::SMUL_LOHI; in ExpandNode() 3377 bool HasSMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::SMUL_LOHI, VT); in ExpandNode() 3383 OpToUse = ISD::SMUL_LOHI; in ExpandNode() 3387 OpToUse = ISD::SMUL_LOHI; in ExpandNode() 3460 { ISD::MULHS, ISD::SMUL_LOHI, ISD::SIGN_EXTEND }}; in ExpandNode()
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D | LegalizeIntegerTypes.cpp | 1921 bool HasSMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::SMUL_LOHI, NVT); in ExpandIntRes_MUL() 1953 Lo = DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(NVT, NVT), LL, RL); in ExpandIntRes_MUL()
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D | DAGCombiner.cpp | 1121 case ISD::SMUL_LOHI: return visitSMUL_LOHI(N); in visit()
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/external/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.cpp | 102 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom); in XCoreTargetLowering() 182 case ISD::SMUL_LOHI: return LowerSMUL_LOHI(Op, DAG); in LowerOperation() 517 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::SMUL_LOHI && in LowerSMUL_LOHI()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 146 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Expand); in MSP430TargetLowering() 151 setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand); in MSP430TargetLowering()
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/external/llvm/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 1079 case ISD::SMUL_LOHI: in MatchAddressRecursively() 2263 case ISD::SMUL_LOHI: in Select() 2268 bool isSigned = Opcode == ISD::SMUL_LOHI; in Select()
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D | X86ISelLowering.cpp | 830 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in resetOperationActions()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1426 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in HexagonTargetLowering() 1428 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in HexagonTargetLowering()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 171 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in SystemZTargetLowering() 172 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in SystemZTargetLowering()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 322 def smullohi : SDNode<"ISD::SMUL_LOHI" , SDTIntBinHiLoOp, [SDNPCommutative]>;
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 1353 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in SparcTargetLowering()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 653 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in ARMTargetLowering() 7989 V->getOpcode() == ISD::SMUL_LOHI) in findMUL_LOHI() 8035 AddcOp0->getOpcode() != ISD::SMUL_LOHI && in AddCombineTo64bitMLAL() 8037 AddcOp1->getOpcode() != ISD::SMUL_LOHI) in AddCombineTo64bitMLAL() 8073 unsigned FinalOpc = (Opc == ISD::SMUL_LOHI) ? ARMISD::SMLAL : ARMISD::UMLAL; in AddCombineTo64bitMLAL()
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D | ARMISelDAGToDAG.cpp | 2787 case ISD::SMUL_LOHI: { in Select()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 117 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in PPCTargetLowering() 119 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in PPCTargetLowering() 421 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in PPCTargetLowering()
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/external/llvm/docs/ |
D | CodeGenerator.rst | 1067 multiple values (e.g. ``SMUL_LOHI``, ``LOAD``, ``CALL``, etc). This is the
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