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/external/llvm/test/Analysis/CostModel/X86/
Duitofp.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
10 ; SSE2: uitofpv2i8v2double
11 ; SSE2: cost of 20 {{.*}} uitofp
12 ; SSE2-CODEGEN: uitofpv2i8v2double
13 ; SSE2-CODEGEN: movapd LCPI
14 ; SSE2-CODEGEN: subpd
15 ; SSE2-CODEGEN: addpd
21 ; SSE2: uitofpv4i8v4double
22 ; SSE2: cost of 40 {{.*}} uitofp
[all …]
Dtestshiftashr.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2: shift2i16
8 ; SSE2: cost of 20 {{.*}} ashr
9 ; SSE2-CODEGEN: shift2i16
10 ; SSE2-CODEGEN: sarq %cl
19 ; SSE2: shift4i16
20 ; SSE2: cost of 40 {{.*}} ashr
21 ; SSE2-CODEGEN: shift4i16
22 ; SSE2-CODEGEN: sarl %cl
[all …]
Dtestshiftshl.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2: shift2i16
8 ; SSE2: cost of 20 {{.*}} shl
9 ; SSE2-CODEGEN: shift2i16
10 ; SSE2-CODEGEN: shlq %cl
19 ; SSE2: shift4i16
20 ; SSE2: cost of 10 {{.*}} shl
21 ; SSE2-CODEGEN: shift4i16
22 ; SSE2-CODEGEN: pmuludq
[all …]
Dtestshiftlshr.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2: shift2i16
8 ; SSE2: cost of 20 {{.*}} lshr
9 ; SSE2-CODEGEN: shift2i16
10 ; SSE2-CODEGEN: shrq %cl
19 ; SSE2: shift4i16
20 ; SSE2: cost of 40 {{.*}} lshr
21 ; SSE2-CODEGEN: shift4i16
22 ; SSE2-CODEGEN: shrl %cl
[all …]
Dsitofp.ll1 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
4 ; SSE2: sitofpv2i8v2double
5 ; SSE2: cost of 20 {{.*}} sitofp
11 ; SSE2: sitofpv4i8v4double
12 ; SSE2: cost of 40 {{.*}} sitofp
18 ; SSE2: sitofpv8i8v8double
19 ; SSE2: cost of 80 {{.*}} sitofp
25 ; SSE2: sitofpv16i8v16double
26 ; SSE2: cost of 160 {{.*}} sitofp
32 ; SSE2: sitofpv32i8v32double
[all …]
Ddiv.ll1 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
6 ; SSE2: div_sse
7 ; SSE2: cost of 320 {{.*}} sdiv
9 ; SSE2: cost of 160 {{.*}} sdiv
11 ; SSE2: cost of 80 {{.*}} sdiv
13 ; SSE2: cost of 40 {{.*}} sdiv
17 ; SSE2: div_avx
/external/llvm/test/CodeGen/X86/
Dmemcpy-2.ll1 …s -mattr=+sse2 -mtriple=i686-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=SSE2-Darwin
2 …%s -mattr=+sse2 -mtriple=i686-pc-mingw32 -mcpu=core2 | FileCheck %s -check-prefix=SSE2-Mingw32
12 ; SSE2-Darwin-LABEL: t1:
13 ; SSE2-Darwin: movsd _.str+16, %xmm0
14 ; SSE2-Darwin: movsd %xmm0, 16(%esp)
15 ; SSE2-Darwin: movaps _.str, %xmm0
16 ; SSE2-Darwin: movaps %xmm0
17 ; SSE2-Darwin: movb $0, 24(%esp)
19 ; SSE2-Mingw32-LABEL: t1:
20 ; SSE2-Mingw32: movsd _.str+16, %xmm0
[all …]
Dvec_setcc.ll1 …llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse2 | FileCheck %s -check-prefix=SSE2
9 ; SSE2-LABEL: v16i8_icmp_uge:
10 ; SSE2: pmaxub %xmm0, %xmm1
11 ; SSE2: pcmpeqb %xmm1, %xmm0
26 ; SSE2-LABEL: v16i8_icmp_ule:
27 ; SSE2: pminub %xmm0, %xmm1
28 ; SSE2: pcmpeqb %xmm1, %xmm0
44 ; SSE2-LABEL: v8i16_icmp_uge:
45 ; SSE2: movdqa {{.*}}(%rip), %xmm2
47 ; SSE2: pxor %xmm1, %xmm2
[all …]
Davx-sext.ll3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=pentium4 | FileCheck %s -check-prefix=SSE2
31 ; SSE2: load_sext_test1
32 ; SSE2: movq
33 ; SSE2: punpcklwd %xmm{{.*}}, %xmm{{.*}}
34 ; SSE2: psrad $16
35 ; SSE2: ret
52 ; SSE2: load_sext_test2
53 ; SSE2: movl
54 ; SSE2: psrad $24
55 ; SSE2: ret
[all …]
Dviabs.ll1 ; RUN: llc < %s -march=x86-64 -mcpu=x86-64 | FileCheck %s -check-prefix=SSE2
6 ; SSE2-LABEL: test1:
7 ; SSE2: movdqa
8 ; SSE2: psrad $31
9 ; SSE2-NEXT: padd
10 ; SSE2-NEXT: pxor
11 ; SSE2-NEXT: ret
27 ; SSE2-LABEL: test2:
28 ; SSE2: movdqa
29 ; SSE2: psrad $31
[all …]
Dvec_compare-sse4.ll1 ; RUN: llc < %s -march=x86 -mattr=-sse3,+sse2 | FileCheck %s -check-prefix=SSE2
12 ; SSE2-LABEL: test1:
13 ; SSE2-NOT: pcmpgtq
14 ; SSE2: ret
28 ; SSE2-LABEL: test2:
29 ; SSE2-NOT: pcmpeqq
30 ; SSE2: ret
Dmemset-sse-stack-realignment.ll6 ; RUN: llc < %s -mtriple=i386-pc-mingw32 -mcpu=yonah | FileCheck %s -check-prefix=SSE2
26 ; SSE2-LABEL: test1:
27 ; SSE2: andl $-16
28 ; SSE2: movl %esp, %esi
29 ; SSE2: movaps
59 ; SSE2-LABEL: test2:
60 ; SSE2: andl $-16
61 ; SSE2: movl %esp, %esi
62 ; SSE2: movaps
Dfast-isel-fneg.ll2 ; RUN: llc < %s -fast-isel -march=x86 -mattr=+sse2 | FileCheck --check-prefix=SSE2 %s
4 ; SSE2: xor
5 ; SSE2: xor
6 ; SSE2-NOT: xor
Dvec_splat.ll1 ; RUN: llc < %s -march=x86 -mcpu=pentium4 -mattr=+sse2 | FileCheck %s -check-prefix=SSE2
14 ; SSE2-LABEL: test_v4sf:
15 ; SSE2: pshufd $0
29 ; SSE2-LABEL: test_v2sd:
30 ; SSE2: shufpd $0
Dpsubus.ll1 ; RUN: llc -mcpu=core2 < %s | FileCheck %s -check-prefix=SSE2
28 ; SSE2: @test1
29 ; SSE2: psubusw LCPI0_0(%rip), %xmm0
58 ; SSE2: @test2
59 ; SSE2: psubusw LCPI1_0(%rip), %xmm0
90 ; SSE2: @test3
91 ; SSE2: psubusw %xmm0, %xmm1
120 ; SSE2: @test4
121 ; SSE2: psubusb LCPI3_0(%rip), %xmm0
150 ; SSE2: @test5
[all …]
/external/pixman/pixman/
DMakefile.win3212 SSE2_VAR = $(SSE2)
51 ifneq ($(SSE2),off)
52 ifneq ($(SSE2),on)
53 ifneq ($(SSE2),)
54 @echo "Invalid specified SSE option : "$(SSE2)"."
/external/chromium_org/v8/src/ia32/
Dassembler-ia32.cc66 if (CpuFeatures::IsSupported(SSE2)) { in NumAllocatableRegisters()
75 if (CpuFeatures::IsSupported(SSE2)) { in NumRegisters()
84 if (CpuFeatures::IsSupported(SSE2)) { in AllocationIndexToString()
112 probed_features |= static_cast<uint64_t>(1) << SSE2; in Probe()
347 if (!CpuFeatures::IsSupported(SSE2)) { in Nop()
1941 ASSERT(IsEnabled(SSE2)); in cvttss2si()
1951 ASSERT(IsEnabled(SSE2)); in cvttsd2si()
1961 ASSERT(IsEnabled(SSE2)); in cvtsd2si()
1971 ASSERT(IsEnabled(SSE2)); in cvtsi2sd()
1981 ASSERT(IsEnabled(SSE2)); in cvtss2sd()
[all …]
Ddeoptimizer-ia32.cc212 if (!CpuFeatures::IsSupported(SSE2)) return; in CopyDoubleRegisters()
235 Builtins::Name name = CpuFeatures::IsSupported(SSE2) ? in NotifyStubFailureBuiltin()
252 if (CpuFeatures::IsSupported(SSE2)) { in Generate()
253 CpuFeatureScope scope(masm(), SSE2); in Generate()
303 if (CpuFeatures::IsSupported(SSE2)) { in Generate()
304 CpuFeatureScope scope(masm(), SSE2); in Generate()
390 if (CpuFeatures::IsSupported(SSE2)) { in Generate()
391 CpuFeatureScope scope(masm(), SSE2); in Generate()
Dlithium-gap-resolver-ia32.cc321 if (CpuFeatures::IsSupported(SSE2)) { in EmitMove()
322 CpuFeatureScope scope(cgen_->masm(), SSE2); in EmitMove()
354 if (CpuFeatures::IsSupported(SSE2)) { in EmitMove()
355 CpuFeatureScope scope(cgen_->masm(), SSE2); in EmitMove()
374 if (CpuFeatures::IsSupported(SSE2)) { in EmitMove()
375 CpuFeatureScope scope(cgen_->masm(), SSE2); in EmitMove()
471 CpuFeatureScope scope(cgen_->masm(), SSE2); in EmitSwap()
480 CpuFeatureScope scope(cgen_->masm(), SSE2); in EmitSwap()
493 CpuFeatureScope scope(cgen_->masm(), SSE2); in EmitSwap()
/external/chromium_org/v8/test/cctest/
Dtest-assembler-ia32.cc164 if (!CpuFeatures::IsSupported(SSE2)) return; in TEST()
172 CHECK(CpuFeatures::IsSupported(SSE2)); in TEST()
173 { CpuFeatureScope fscope(&assm, SSE2); in TEST()
200 if (!CpuFeatures::IsSupported(SSE2)) return; in TEST()
208 CHECK(CpuFeatures::IsSupported(SSE2)); in TEST()
209 CpuFeatureScope fscope(&assm, SSE2); in TEST()
259 if (!CpuFeatures::IsSupported(SSE2)) return; in TEST()
266 CpuFeatureScope fscope(&assm, SSE2); in TEST()
305 if (!CpuFeatures::IsSupported(SSE2)) return; in TEST()
311 CpuFeatureScope fscope(&assm, SSE2); in TEST()
[all …]
/external/v8/test/cctest/
Dtest-assembler-ia32.cc171 if (!CpuFeatures::IsSupported(SSE2)) return; in TEST()
178 CHECK(CpuFeatures::IsSupported(SSE2)); in TEST()
179 { CpuFeatures::Scope fscope(SSE2); in TEST()
206 if (!CpuFeatures::IsSupported(SSE2)) return; in TEST()
213 CHECK(CpuFeatures::IsSupported(SSE2)); in TEST()
214 CpuFeatures::Scope fscope(SSE2); in TEST()
263 if (!CpuFeatures::IsSupported(SSE2)) return; in TEST()
266 CHECK(CpuFeatures::IsSupported(SSE2)); in TEST()
267 CpuFeatures::Scope fscope(SSE2); in TEST()
309 if (!CpuFeatures::IsSupported(SSE2)) return; in TEST()
[all …]
/external/v8/src/ia32/
Dassembler-ia32.cc409 if (!CpuFeatures::IsSupported(SSE2)) { in Nop()
1922 ASSERT(CpuFeatures::IsEnabled(SSE2)); in cvttss2si()
1932 ASSERT(CpuFeatures::IsEnabled(SSE2)); in cvttsd2si()
1942 ASSERT(CpuFeatures::IsEnabled(SSE2)); in cvtsi2sd()
1952 ASSERT(CpuFeatures::IsEnabled(SSE2)); in cvtss2sd()
1962 ASSERT(CpuFeatures::IsEnabled(SSE2)); in cvtsd2ss()
1972 ASSERT(CpuFeatures::IsEnabled(SSE2)); in addsd()
1982 ASSERT(CpuFeatures::IsEnabled(SSE2)); in mulsd()
1992 ASSERT(CpuFeatures::IsEnabled(SSE2)); in subsd()
2002 ASSERT(CpuFeatures::IsEnabled(SSE2)); in divsd()
[all …]
/external/chromium_org/third_party/skia/gyp/
Dopts.gyp5 # gcc lameness is that, in order to compile SSE2 intrinsics code, it
7 # emit SSE2 instructions even for scalar code, such as the CPUID
8 # test used to test for the presence of SSE2. So that, and all other
14 # SSE2, Linux x86_64 has SSE2 by definition, and MSC will happily emit
15 # SSE2 from instrinsics, while generating plain ol' 386 for everything
115 # to compile the SSE2 code with -mssse3 which would potentially allow
/external/skia/gyp/
Dopts.gyp5 # gcc lameness is that, in order to compile SSE2 intrinsics code, it
7 # emit SSE2 instructions even for scalar code, such as the CPUID
8 # test used to test for the presence of SSE2. So that, and all other
14 # SSE2, Linux x86_64 has SSE2 by definition, and MSC will happily emit
15 # SSE2 from instrinsics, while generating plain ol' 386 for everything
115 # to compile the SSE2 code with -mssse3 which would potentially allow
/external/eigen/test/eigen2/
Dtestsuite.cmake21 # - EIGEN_EXPLICIT_VECTORIZATION: novec, SSE2, Altivec
22 # default: SSE2 for x86_64 systems, novec otherwise
47 # $COMMON-gcc-4.3.2,EIGEN_CXX=g++-4.3,EIGEN_EXPLICIT_VECTORIZATION=SSE2
182 if(EIGEN_EXPLICIT_VECTORIZATION MATCHES SSE2)
190 else(EIGEN_EXPLICIT_VECTORIZATION MATCHES SSE2)
191 …GEN_EXPLICIT_VECTORIZATION (${EIGEN_EXPLICIT_VECTORIZATION}), must be: novec, SSE2, SSE3, Altivec")
192 endif(EIGEN_EXPLICIT_VECTORIZATION MATCHES SSE2)

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