| /external/chromium_org/v8/src/mips/ |
| D | constants-mips.cc | 230 case TEQ: in IsTrap()
273 case TEQ: in InstructionType()
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| D | disasm-mips.cc | 294 case TEQ: in PrintCode()
745 case TEQ: in DecodeTypeRegister()
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| D | constants-mips.h | 346 TEQ = ((6 << 3) + 4), enumerator
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| D | simulator-mips.cc | 1897 case TEQ: in ConfigureTypeRegister()
2305 case TEQ: in DecodeTypeRegister()
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| D | assembler-mips.cc | 1532 SPECIAL | TEQ | rs.code() << kRsShift | rt.code() << kRtShift | code << 6; in teq()
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| /external/v8/src/mips/ |
| D | constants-mips.cc | 226 case TEQ: in IsTrap()
269 case TEQ: in InstructionType()
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| D | disasm-mips.cc | 297 case TEQ: in PrintCode()
735 case TEQ: in DecodeTypeRegister()
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| D | constants-mips.h | 341 TEQ = ((6 << 3) + 4), enumerator
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| D | simulator-mips.cc | 1853 case TEQ: in ConfigureTypeRegister()
2232 case TEQ: in DecodeTypeRegister()
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| D | assembler-mips.cc | 1525 SPECIAL | TEQ | rs.code() << kRsShift | rt.code() << kRtShift | code << 6; in teq()
|
| /external/tremolo/Tremolo/ |
| D | mdctARM.s | 69 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
74 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
79 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
84 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
100 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
137 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
142 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
147 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
152 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
169 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
[all …]
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| D | mdctLARM.s | 69 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
74 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
79 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
84 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
100 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
137 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
142 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
147 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
152 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
169 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
[all …]
|
| /external/v8/src/arm/ |
| D | constants-arm.h | 200 TEQ = 9 << 21, // Test Equivalence. enumerator
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| D | disasm-arm.cc | 867 case TEQ: { in DecodeType01()
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| D | simulator-arm.cc | 2373 case TEQ: { in DecodeType01()
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| D | assembler-arm.cc | 1128 addrmod1(cond | TEQ | S, src1, r0, src2); in teq()
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| /external/chromium_org/v8/src/arm/ |
| D | constants-arm.h | 162 TEQ = 9 << 21, // Test Equivalence. enumerator
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| D | disasm-arm.cc | 924 case TEQ: { in DecodeType01()
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| D | simulator-arm.cc | 2394 case TEQ: { in DecodeType01()
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| D | assembler-arm.cc | 1400 addrmod1(cond | TEQ | S, src1, r0, src2); in teq()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.td | 968 def TEQ : TEQ_FT<"teq", GPR32Opnd>, TEQ_FM<0x34>;
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| D | MipsISelLowering.cpp | 782 MIB = BuildMI(MBB, llvm::next(I), MI->getDebugLoc(), TII.get(Mips::TEQ)) in expandPseudoDIV()
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2044 # TEQ
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| D | thumb2.txt | 2283 # TEQ
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| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2544 @ TEQ
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