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Searched refs:Tmp1 (Results 1 – 22 of 22) sorted by relevance

/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp578 SDValue Tmp1 = Vec; in PerformInsertVectorEltInMemory() local
588 EVT VT = Tmp1.getValueType(); in PerformInsertVectorEltInMemory()
597 SDValue Ch = DAG.getStore(DAG.getEntryNode(), dl, Tmp1, StackPtr, in PerformInsertVectorEltInMemory()
1502 SDValue Tmp1 = Node->getOperand(0); in ExpandFCOPYSIGN() local
1553 SDValue AbsVal = DAG.getNode(ISD::FABS, dl, Tmp1.getValueType(), Tmp1); in ExpandFCOPYSIGN()
1568 SDValue Tmp1 = SDValue(Node, 0); in ExpandDYNAMIC_STACKALLOC() local
1571 SDValue Chain = Tmp1.getOperand(0); in ExpandDYNAMIC_STACKALLOC()
1586 Tmp1 = DAG.getNode(ISD::SUB, dl, VT, SP, Size); // Value in ExpandDYNAMIC_STACKALLOC()
1587 Chain = DAG.getCopyToReg(Chain, dl, SPReg, Tmp1); // Output chain in ExpandDYNAMIC_STACKALLOC()
1593 Results.push_back(Tmp1); in ExpandDYNAMIC_STACKALLOC()
[all …]
DLegalizeFloatTypes.cpp1295 SDValue Tmp1, Tmp2, Tmp3; in FloatExpandSetCCOperands() local
1296 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), in FloatExpandSetCCOperands()
1300 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
1301 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), in FloatExpandSetCCOperands()
1305 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
1306 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3); in FloatExpandSetCCOperands()
DLegalizeVectorOps.cpp278 SDValue Tmp1 = TLI.LowerOperation(Op, DAG); in LegalizeOp() local
279 if (Tmp1.getNode()) { in LegalizeOp()
280 Result = Tmp1; in LegalizeOp()
DLegalizeIntegerTypes.cpp2570 SDValue Tmp1, Tmp2; in IntegerExpandSetCCOperands() local
2571 Tmp1 = TLI.SimplifySetCC(getSetCCResultType(LHSLo.getValueType()), in IntegerExpandSetCCOperands()
2573 if (!Tmp1.getNode()) in IntegerExpandSetCCOperands()
2574 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()), in IntegerExpandSetCCOperands()
2583 ConstantSDNode *Tmp1C = dyn_cast<ConstantSDNode>(Tmp1.getNode()); in IntegerExpandSetCCOperands()
2606 NewLHS = DAG.getSelect(dl, Tmp1.getValueType(), in IntegerExpandSetCCOperands()
2607 NewLHS, Tmp1, Tmp2); in IntegerExpandSetCCOperands()
/external/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp106 Value *Tmp1 = Builder.CreateAShr(Divisor, ThirtyOne); in generateSignedDivisionCode() local
109 Value *Tmp3 = Builder.CreateXor(Tmp1, Divisor); in generateSignedDivisionCode()
110 Value *U_Dvsr = Builder.CreateSub(Tmp3, Tmp1); in generateSignedDivisionCode()
111 Value *Q_Sgn = Builder.CreateXor(Tmp1, Tmp); in generateSignedDivisionCode()
213 Value *Tmp1 = Builder.CreateCall2(CTLZi32, Dividend, True); in generateUnsignedDivisionCode() local
214 Value *SR = Builder.CreateSub(Tmp0, Tmp1); in generateUnsignedDivisionCode()
/external/llvm/lib/CodeGen/
DIntrinsicLowering.cpp176 Value *Tmp1 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
180 V = Builder.CreateOr(Tmp1, Tmp2, "bswap.i16"); in LowerBSWAP()
190 Value *Tmp1 = Builder.CreateLShr(V,ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
199 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or2"); in LowerBSWAP()
220 Value* Tmp1 = Builder.CreateLShr(V, in LowerBSWAP() local
250 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or4"); in LowerBSWAP()
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
DAMDGPUISelLowering.cpp244 SDValue Tmp1 = DAG.getNode(ISD::AND, DL, VT, Remainder_GE_Den, in LowerUDIVREM() local
258 SDValue Div = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, VT), in LowerUDIVREM()
274 SDValue Rem = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, VT), in LowerUDIVREM()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUISelLowering.cpp244 SDValue Tmp1 = DAG.getNode(ISD::AND, DL, VT, Remainder_GE_Den, in LowerUDIVREM() local
258 SDValue Div = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, VT), in LowerUDIVREM()
274 SDValue Rem = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, VT), in LowerUDIVREM()
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp1567 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in SelectAtomic64() local
1568 if (!SelectAddr(Node, In1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) in SelectAtomic64()
1572 const SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, In2L, In2H, Chain}; in SelectAtomic64()
1768 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in SelectAtomicLoadArith() local
1769 if (!SelectAddr(Node, Ptr, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) in SelectAtomicLoadArith()
1841 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Chain }; in SelectAtomicLoadArith()
1844 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Val, Chain }; in SelectAtomicLoadArith()
2317 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
2318 bool foldedLoad = TryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2321 foldedLoad = TryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
[all …]
DX86ISelLowering.cpp8308 SDValue Tmp1 = isSRA ? DAG.getNode(ISD::SRA, dl, VT, ShOpHi, in LowerShiftParts() local
8329 SDValue Ops1[4] = { Tmp3, Tmp1, CC, Cond }; in LowerShiftParts()
12552 SDValue Tmp1; in LowerSIGN_EXTEND_INREG() local
12556 Tmp1 = LowerVectorIntExtend(Op00, DAG); in LowerSIGN_EXTEND_INREG()
12557 if (Tmp1.getNode()) { in LowerSIGN_EXTEND_INREG()
12558 SDValue Tmp1Op0 = Tmp1.getOperand(0); in LowerSIGN_EXTEND_INREG()
12565 Tmp1 = getTargetVShiftNode(X86ISD::VSHLI, dl, VT, Op0, ShAmt, DAG); in LowerSIGN_EXTEND_INREG()
12566 return getTargetVShiftNode(X86ISD::VSRAI, dl, VT, Tmp1, ShAmt, DAG); in LowerSIGN_EXTEND_INREG()
/external/llvm/lib/Target/R600/
DAMDGPUISelLowering.cpp403 SDValue Tmp1 = DAG.getNode(ISD::AND, DL, VT, Remainder_GE_Den, in LowerUDIVREM() local
417 SDValue Div = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, VT), in LowerUDIVREM()
433 SDValue Rem = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, VT), in LowerUDIVREM()
/external/clang/lib/StaticAnalyzer/Core/
DCheckerManager.cpp108 ExplodedNodeSet Tmp1, Tmp2; in expandGraphWithCheckers() local
116 CurrSet = (PrevSet == &Tmp1) ? &Tmp2 : &Tmp1; in expandGraphWithCheckers()
/external/clang/lib/CodeGen/
DCGExprComplex.cpp579 llvm::Value *Tmp1 = Builder.CreateFMul(LHSr, RHSr); // a*c in EmitBinDiv() local
581 llvm::Value *Tmp3 = Builder.CreateFAdd(Tmp1, Tmp2); // ac+bd in EmitBinDiv()
595 llvm::Value *Tmp1 = Builder.CreateMul(LHSr, RHSr); // a*c in EmitBinDiv() local
597 llvm::Value *Tmp3 = Builder.CreateAdd(Tmp1, Tmp2); // ac+bd in EmitBinDiv()
/external/webrtc/src/modules/audio_coding/codecs/isac/main/source/
Dstructs.h251 double Tmp1[MAXFFTSIZE]; member
Dfft.c338 …if (fftstate->Tmp0 == NULL || fftstate->Tmp1 == NULL || fftstate->Tmp2 == NULL || fftstate->Tmp3 =… in FFTRADIX()
345 Itmp = (REAL *) fftstate->Tmp1; in FFTRADIX()
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp442 SDValue Tmp1, Tmp2; in SelectBitfieldInsert() local
1357 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local
1360 return CurDAG->getMachineNode(Opc3, dl, VT, SDValue(Tmp1, 0), in Select()
1371 SDNode *Tmp1 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); in Select() local
1374 return CurDAG->getMachineNode(Opc2, dl, VT, SDValue(Tmp1, 0), in Select()
DPPCISelLowering.cpp5019 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSHL_PARTS() local
5022 SDValue Tmp3 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Tmp1); in LowerSHL_PARTS()
5048 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSRL_PARTS() local
5051 SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1); in LowerSRL_PARTS()
5076 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT, in LowerSRA_PARTS() local
5079 SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1); in LowerSRA_PARTS()
/external/llvm/lib/Target/Hexagon/
DHexagonHardwareLoops.cpp1432 SmallVector<MachineOperand,2> Tmp1; in createPreheaderForLoop() local
1435 if (TII->AnalyzeBranch(*Latch, TB, FB, Tmp1, false)) in createPreheaderForLoop()
1441 bool NotAnalyzed = TII->AnalyzeBranch(*PB, TB, FB, Tmp1, false); in createPreheaderForLoop()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp3513 SDValue Tmp1 = Op.getOperand(1); in LowerFCOPYSIGN() local
3516 EVT SrcVT = Tmp1.getValueType(); in LowerFCOPYSIGN()
3534 Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1); in LowerFCOPYSIGN()
3536 Tmp1 = DAG.getNode(ARMISD::VSHL, dl, OpVT, in LowerFCOPYSIGN()
3537 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
3540 Tmp1 = DAG.getNode(ARMISD::VSHRu, dl, MVT::v1i64, in LowerFCOPYSIGN()
3541 DAG.getNode(ISD::BITCAST, dl, MVT::v1i64, Tmp1), in LowerFCOPYSIGN()
3544 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); in LowerFCOPYSIGN()
3553 DAG.getNode(ISD::AND, dl, OpVT, Tmp1, Mask), in LowerFCOPYSIGN()
3568 Tmp1 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
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/external/llvm/lib/Support/
DAPInt.cpp784 unsigned Tmp1 = unsigned(VAL >> 16); in byteSwap() local
785 Tmp1 = ByteSwap_32(Tmp1); in byteSwap()
788 return APInt(BitWidth, (uint64_t(Tmp2) << 32) | Tmp1); in byteSwap()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp1294 SDValue Tmp1 = ST->getChain(); in LowerSTOREi1() local
1302 SDValue Result = DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2, in LowerSTOREi1()
/external/llvm/docs/
DCodingStandards.rst817 Tire Tmp1 = M.makeTire(); // Bad -- 'Tmp1' provides no information.