/external/llvm/lib/CodeGen/ |
D | IntrinsicLowering.cpp | 184 Value *Tmp4 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 24), in LowerBSWAP() local 198 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or1"); in LowerBSWAP() 200 V = Builder.CreateOr(Tmp4, Tmp2, "bswap.i32"); in LowerBSWAP() 212 Value* Tmp4 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local 235 Tmp4 = Builder.CreateAnd(Tmp4, in LowerBSWAP() 249 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or3"); in LowerBSWAP() 252 Tmp4 = Builder.CreateOr(Tmp4, Tmp2, "bswap.or6"); in LowerBSWAP() 253 V = Builder.CreateOr(Tmp8, Tmp4, "bswap.i64"); in LowerBSWAP()
|
/external/llvm/lib/Transforms/Utils/ |
D | IntegerDivision.cpp | 113 Value *Tmp4 = Builder.CreateXor(Q_Mag, Q_Sgn); in generateSignedDivisionCode() local 114 Value *Q = Builder.CreateSub(Tmp4, Q_Sgn); in generateSignedDivisionCode() 241 Value *Tmp4 = Builder.CreateAdd(Divisor, NegOne); in generateUnsignedDivisionCode() local 272 Value *Tmp9 = Builder.CreateSub(Tmp4, Tmp7); in generateUnsignedDivisionCode()
|
/external/llvm/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 1567 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in SelectAtomic64() local 1568 if (!SelectAddr(Node, In1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) in SelectAtomic64() 1572 const SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, In2L, In2H, Chain}; in SelectAtomic64() 1768 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in SelectAtomicLoadArith() local 1769 if (!SelectAddr(Node, Ptr, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) in SelectAtomicLoadArith() 1841 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Chain }; in SelectAtomicLoadArith() 1844 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Val, Chain }; in SelectAtomicLoadArith() 2317 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local 2318 bool foldedLoad = TryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select() 2321 foldedLoad = TryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select() [all …]
|
/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 2506 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local 2514 Tmp4 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(24, SHVT)); in ExpandBSWAP() 2520 Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp3); in ExpandBSWAP() 2522 return DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp2); in ExpandBSWAP() 2528 Tmp4 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(8, SHVT)); in ExpandBSWAP() 2535 Tmp4 = DAG.getNode(ISD::AND, dl, VT, Tmp4, DAG.getConstant(255ULL<<24, VT)); in ExpandBSWAP() 2540 Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp3); in ExpandBSWAP() 2543 Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp2); in ExpandBSWAP() 2544 return DAG.getNode(ISD::OR, dl, VT, Tmp8, Tmp4); in ExpandBSWAP() 2732 SDValue Tmp1, Tmp2, Tmp3, Tmp4; in ExpandNode() local [all …]
|
/external/clang/lib/CodeGen/ |
D | CGExprComplex.cpp | 583 llvm::Value *Tmp4 = Builder.CreateFMul(RHSr, RHSr); // c*c in EmitBinDiv() local 585 llvm::Value *Tmp6 = Builder.CreateFAdd(Tmp4, Tmp5); // cc+dd in EmitBinDiv() 599 llvm::Value *Tmp4 = Builder.CreateMul(RHSr, RHSr); // c*c in EmitBinDiv() local 601 llvm::Value *Tmp6 = Builder.CreateAdd(Tmp4, Tmp5); // cc+dd in EmitBinDiv()
|
/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 5023 SDValue Tmp4 = DAG.getNode(ISD::OR , dl, VT, Tmp2, Tmp3); in LowerSHL_PARTS() local 5027 SDValue OutHi = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6); in LowerSHL_PARTS() 5052 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in LowerSRL_PARTS() local 5056 SDValue OutLo = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6); in LowerSRL_PARTS() 5080 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); in LowerSRA_PARTS() local 5086 Tmp4, Tmp6, ISD::SETLE); in LowerSRA_PARTS()
|