| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 236 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, in getCastInstrCost()
239 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
241 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 }, in getCastInstrCost()
243 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
245 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 }, in getCastInstrCost()
247 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, in getCastInstrCost()
249 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, in getCastInstrCost()
251 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 }, in getCastInstrCost()
253 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 }, in getCastInstrCost()
255 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 }, in getCastInstrCost()
[all …]
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| D | ARMISelLowering.cpp | 110 setOperationAction(ISD::UINT_TO_FP, VT, Custom); in addTypeForNEON()
115 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in addTypeForNEON()
560 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom); in ARMTargetLowering()
862 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in ARMTargetLowering()
3478 case ISD::UINT_TO_FP: in LowerVectorINT_TO_FP()
3480 Opc = ISD::UINT_TO_FP; in LowerVectorINT_TO_FP()
3501 case ISD::UINT_TO_FP: in LowerINT_TO_FP()
5870 case ISD::UINT_TO_FP: return LowerINT_TO_FP(Op, DAG); in LowerOperation()
9352 (OpOpcode != ISD::SINT_TO_FP && OpOpcode != ISD::UINT_TO_FP)) in PerformVDIVCombine()
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| /external/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 370 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 2*10 }, in getCastInstrCost()
371 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v4i32, 4*10 }, in getCastInstrCost()
372 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v8i16, 8*10 }, in getCastInstrCost()
373 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v16i8, 16*10 }, in getCastInstrCost()
379 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v2i64, 15 }, in getCastInstrCost()
380 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 15 }, in getCastInstrCost()
381 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v8i16, 15 }, in getCastInstrCost()
382 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v16i8, 8 }, in getCastInstrCost()
425 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i1, 6 }, in getCastInstrCost()
426 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 5 }, in getCastInstrCost()
[all …]
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| D | X86ISelLowering.cpp | 312 setOperationAction(ISD::UINT_TO_FP , MVT::i1 , Promote); in resetOperationActions()
313 setOperationAction(ISD::UINT_TO_FP , MVT::i8 , Promote); in resetOperationActions()
314 setOperationAction(ISD::UINT_TO_FP , MVT::i16 , Promote); in resetOperationActions()
317 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote); in resetOperationActions()
318 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom); in resetOperationActions()
322 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom); in resetOperationActions()
325 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom); in resetOperationActions()
854 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in resetOperationActions()
1024 setOperationAction(ISD::UINT_TO_FP, MVT::v4i8, Custom); in resetOperationActions()
1025 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom); in resetOperationActions()
[all …]
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| /external/llvm/test/CodeGen/R600/ |
| D | dagcombiner-bug-illegal-vec4-int-to-fp.ll | 7 ; ISD::UINT_TO_FP and ISD::SINT_TO_FP opcodes.
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 368 UINT_TO_FP, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 255 case ISD::UINT_TO_FP: in LegalizeOp()
269 case ISD::UINT_TO_FP: in LegalizeOp()
292 else if (Node->getOpcode() == ISD::UINT_TO_FP) in LegalizeOp()
363 unsigned Opc = Op.getOpcode() == ISD::UINT_TO_FP ? ISD::ZERO_EXTEND : in PromoteVectorOpINT_TO_FP()
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| D | LegalizeDAG.cpp | 1173 case ISD::UINT_TO_FP: in LegalizeOp()
2361 SDValue Fcvt = DAG.getNode(ISD::UINT_TO_FP, dl, MVT::f64, Trunc); in ExpandLegalINT_TO_FP()
2366 SDValue Fcvt2 = DAG.getNode(ISD::UINT_TO_FP, dl, MVT::f64, Lo); in ExpandLegalINT_TO_FP()
2445 if (TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, NewInTy)) { in PromoteLegalINT_TO_FP()
2446 OpToUse = ISD::UINT_TO_FP; in PromoteLegalINT_TO_FP()
2908 case ISD::UINT_TO_FP: in ExpandNode()
3728 if (Node->getOpcode() == ISD::UINT_TO_FP || in PromoteNode()
3778 case ISD::UINT_TO_FP: in PromoteNode()
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| D | SelectionDAGDumper.cpp | 222 case ISD::UINT_TO_FP: return "uint_to_fp"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 92 case ISD::UINT_TO_FP: in ScalarizeVectorResult()
549 case ISD::UINT_TO_FP: in SplitVectorResult()
1075 case ISD::UINT_TO_FP: in SplitVectorOperand()
1490 case ISD::UINT_TO_FP: in WidenVectorResult()
2267 case ISD::UINT_TO_FP: in WidenVectorOperand()
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| D | LegalizeFloatTypes.cpp | 99 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break; in SoftenFloatResult()
826 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break; in ExpandFloatResult()
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| D | DAGCombiner.cpp | 1157 case ISD::UINT_TO_FP: return visitUINT_TO_FP(N); in visit()
6469 TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, OpVT)) { in visitSINT_TO_FP()
6472 return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), VT, N0); in visitSINT_TO_FP()
6521 return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), VT, N0); in visitUINT_TO_FP()
6525 if (!TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, OpVT) && in visitUINT_TO_FP()
8982 (Opc == ISD::UINT_TO_FP || Opc == ISD::SINT_TO_FP)) { in reduceBuildVecConvertToConvertBuildVec()
9005 assert((Opcode == ISD::UINT_TO_FP || Opcode == ISD::SINT_TO_FP) in reduceBuildVecConvertToConvertBuildVec()
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| D | LegalizeIntegerTypes.cpp | 803 case ISD::UINT_TO_FP: Res = PromoteIntOp_UINT_TO_FP(N); break; in PromoteIntegerOperand()
2481 case ISD::UINT_TO_FP: Res = ExpandIntOp_UINT_TO_FP(N); break; in ExpandIntegerOperand()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1144 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote); in HexagonTargetLowering()
1149 setOperationAction(ISD::UINT_TO_FP, MVT::i8, Promote); in HexagonTargetLowering()
1154 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Promote); in HexagonTargetLowering()
1159 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Legal); in HexagonTargetLowering()
1164 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Legal); in HexagonTargetLowering()
1179 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in HexagonTargetLowering()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 117 setOperationAction(ISD::UINT_TO_FP, VT, Expand); in AMDGPUTargetLowering()
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| D | R600ISelLowering.cpp | 1389 if (Arg.getOpcode() == ISD::UINT_TO_FP && Arg.getValueType() == MVT::f64) { in PerformDAGCombine()
1390 return DAG.getNode(ISD::UINT_TO_FP, SDLoc(N), N->getValueType(0), in PerformDAGCombine()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | R600ISelLowering.cpp | 412 ConversionOp = ISD::UINT_TO_FP; in LowerSELECT_CC()
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | R600ISelLowering.cpp | 412 ConversionOp = ISD::UINT_TO_FP; in LowerSELECT_CC()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 249 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in AArch64TargetLowering()
250 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in AArch64TargetLowering()
251 setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom); in AArch64TargetLowering()
2650 case ISD::UINT_TO_FP: return LowerINT_TO_FP(Op, DAG, false); in LowerOperation()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 221 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in PPCTargetLowering()
321 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in PPCTargetLowering()
339 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in PPCTargetLowering()
345 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); in PPCTargetLowering()
457 setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal); in PPCTargetLowering()
4818 (Op.getOpcode() == ISD::UINT_TO_FP ? in LowerINT_TO_FP()
4820 (Op.getOpcode() == ISD::UINT_TO_FP ? in LowerINT_TO_FP()
4907 Ld = DAG.getMemIntrinsicNode(Op.getOpcode() == ISD::UINT_TO_FP ? in LowerINT_TO_FP()
5749 case ISD::UINT_TO_FP: in LowerOperation()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1224 case UIToFP: return ISD::UINT_TO_FP; in InstructionOpcodeToISD()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 158 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Promote); in SystemZTargetLowering()
159 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in SystemZTargetLowering()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 392 def uint_to_fp : SDNode<"ISD::UINT_TO_FP" , SDTIntToFPOp>;
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 302 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in MipsTargetLowering()
303 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); in MipsTargetLowering()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1280 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in SparcTargetLowering()
|