| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 93 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Custom); in MipsSETargetLowering()
146 case ISD::UMUL_LOHI: return lowerMulDiv(Op, MipsISD::Multu, true, true, DAG); in LowerOperation()
186 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) in selectMADD()
212 MultOpc = MultOpc == ISD::UMUL_LOHI ? MipsISD::MAddu : MipsISD::MAdd; in selectMADD()
262 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) in selectMSUB()
288 MultOpc = MultOpc == ISD::UMUL_LOHI ? MipsISD::MSubu : MipsISD::MSub; in selectMSUB()
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| D | Mips16ISelDAGToDAG.cpp | 289 case ISD::UMUL_LOHI: { in selectNode()
290 MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::MultuRxRy16 : Mips::MultRxRy16); in selectNode()
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| /external/llvm/lib/Target/Sparc/ |
| D | README.txt | 10 * Add support for isel'ing UMUL_LOHI instead of marking it as Expand.
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| D | SparcISelLowering.cpp | 1352 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); in SparcTargetLowering()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 181 SMUL_LOHI, UMUL_LOHI, enumerator
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| D | SelectionDAG.h | 935 case ISD::UMUL_LOHI:
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| /external/llvm/lib/Target/R600/ |
| D | AMDILISelLowering.cpp | 110 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in InitAMDILLowering()
138 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in InitAMDILLowering()
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 121 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in InitAMDILLowering()
149 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in InitAMDILLowering()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 121 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in InitAMDILLowering()
149 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in InitAMDILLowering()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 162 case ISD::UMUL_LOHI: return "umul_lohi"; in getOperationName()
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| D | TargetLowering.cpp | 2568 else if (IsAfterLegalization ? isOperationLegal(ISD::UMUL_LOHI, VT) : in BuildUDIV()
2569 isOperationLegalOrCustom(ISD::UMUL_LOHI, VT)) in BuildUDIV()
2570 Q = SDValue(DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(VT, VT), Q, in BuildUDIV()
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| D | LegalizeDAG.cpp | 3353 unsigned ExpandOpcode = Node->getOpcode() == ISD::MULHU ? ISD::UMUL_LOHI : in ExpandNode()
3378 bool HasUMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::UMUL_LOHI, VT); in ExpandNode()
3385 OpToUse = ISD::UMUL_LOHI; in ExpandNode()
3389 OpToUse = ISD::UMUL_LOHI; in ExpandNode()
3459 { { ISD::MULHU, ISD::UMUL_LOHI, ISD::ZERO_EXTEND }, in ExpandNode()
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| D | LegalizeIntegerTypes.cpp | 1922 bool HasUMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::UMUL_LOHI, NVT); in ExpandIntRes_MUL()
1938 Lo = DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(NVT, NVT), LL, RL); in ExpandIntRes_MUL()
1966 SDValue UMulLOHI = DAG.getNode(ISD::UMUL_LOHI, dl, in ExpandIntRes_MUL()
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| D | DAGCombiner.cpp | 1122 case ISD::UMUL_LOHI: return visitUMUL_LOHI(N); in visit()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 103 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Custom); in XCoreTargetLowering()
183 case ISD::UMUL_LOHI: return LowerUMUL_LOHI(Op, DAG); in LowerOperation()
534 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::UMUL_LOHI && in LowerUMUL_LOHI()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 147 setOperationAction(ISD::UMUL_LOHI, MVT::i8, Expand); in MSP430TargetLowering()
152 setOperationAction(ISD::UMUL_LOHI, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1425 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); in HexagonTargetLowering()
1429 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); in HexagonTargetLowering()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 173 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); in SystemZTargetLowering()
174 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Custom); in SystemZTargetLowering()
1646 case ISD::UMUL_LOHI: in LowerOperation()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 1080 case ISD::UMUL_LOHI: in MatchAddressRecursively()
2264 case ISD::UMUL_LOHI: { in Select()
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| D | X86ISelLowering.cpp | 831 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in resetOperationActions()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 323 def umullohi : SDNode<"ISD::UMUL_LOHI" , SDTIntBinHiLoOp, [SDNPCommutative]>;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 116 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); in PPCTargetLowering()
118 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); in PPCTargetLowering()
420 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in PPCTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 652 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); in ARMTargetLowering()
7988 if (V->getOpcode() == ISD::UMUL_LOHI || in findMUL_LOHI()
8034 if (AddcOp0->getOpcode() != ISD::UMUL_LOHI && in AddCombineTo64bitMLAL()
8036 AddcOp1->getOpcode() != ISD::UMUL_LOHI && in AddCombineTo64bitMLAL()
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| D | ARMISelDAGToDAG.cpp | 2771 case ISD::UMUL_LOHI: { in Select()
|