/external/guava/guava/src/com/google/common/util/concurrent/ |
D | AtomicLongMap.java | 14 import java.util.concurrent.atomic.AtomicLong; 68 AtomicLong atomic = map.get(key); in get() local 69 return atomic == null ? 0L : atomic.get(); in get() 92 AtomicLong atomic = map.get(key); in addAndGet() local 93 if (atomic == null) { in addAndGet() 94 atomic = map.putIfAbsent(key, new AtomicLong(delta)); in addAndGet() 95 if (atomic == null) { in addAndGet() 102 long oldValue = atomic.get(); in addAndGet() 105 if (map.replace(key, atomic, new AtomicLong(delta))) { in addAndGet() 113 if (atomic.compareAndSet(oldValue, newValue)) { in addAndGet() [all …]
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/external/llvm/test/Transforms/DeadStoreElimination/ |
D | atomic.ll | 6 ; Sanity tests for atomic stores. 8 ; atomic ops, just some transformations are not allowed across them. 22 store atomic i32 0, i32* @y unordered, align 4 34 %x = load atomic i32* @y seq_cst, align 4 39 ; DSE across seq_cst store (store before atomic store must not be removed) 43 ; CHECK: store atomic i32 2 46 store atomic i32 2, i32* @y seq_cst, align 4 54 ; CHECK-NOT: store atomic 57 store atomic i32 0, i32* @x unordered, align 4 62 ; DSE unordered store overwriting non-atomic store (allowed) [all …]
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/external/llvm/test/Assembler/ |
D | atomic.ll | 2 ; Basic smoke test for atomic operations. 5 ; CHECK: load atomic i32* %x unordered, align 4 6 load atomic i32* %x unordered, align 4 7 ; CHECK: load atomic volatile i32* %x singlethread acquire, align 4 8 load atomic volatile i32* %x singlethread acquire, align 4 9 ; CHECK: store atomic i32 3, i32* %x release, align 4 10 store atomic i32 3, i32* %x release, align 4 11 ; CHECK: store atomic volatile i32 3, i32* %x singlethread monotonic, align 4 12 store atomic volatile i32 3, i32* %x singlethread monotonic, align 4
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/external/llvm/test/Transforms/LICM/ |
D | atomics.ll | 10 %val = load atomic i32* %y unordered, align 4 18 ; CHECK: load atomic 30 %val = load atomic i32* %y monotonic, align 4 37 ; CHECK: load atomic 50 %vala = load atomic i32* %y monotonic, align 4 51 %valb = load atomic i32* %x unordered, align 4 58 ; CHECK: load atomic i32* %x unordered 69 %vala = load atomic i32* %y monotonic, align 4 70 store atomic i32 %vala, i32* %x unordered, align 4 77 ; CHECK: load atomic i32* %y monotonic [all …]
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/external/clang/test/SemaObjC/ |
D | conflict-atomic-property.m | 5 @property (nonatomic, assign, atomic) float dummy; // expected-error {{property attributes 'atomic'… 7 @property (atomic, assign) float d2; 9 @property (atomic, nonatomic, assign) float d4; // expected-error {{property attributes 'atomic' an…
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D | custom-atomic-property.m | 1 // RUN: %clang_cc1 -fsyntax-only -Wcustom-atomic-properties -verify -Wno-objc-root-class %s 8 …n 0;} // expected-warning {{atomic by default property 'myProp' has a user defined getter (propert… 9 …)e {} // expected-warning {{atomic by default property 'myProp' has a user defined setter (propert…
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D | warn-implicit-atomic-property.m | 1 // RUN: %clang_cc1 -fsyntax-only -Wimplicit-atomic-properties -fobjc-default-synthesize-properties … 6 @property (atomic, readwrite) int P1; // OK 11 @implementation Super // expected-warning {{property is assumed atomic when auto-synthesizing the p… 12 @synthesize P,P1,P2; // expected-warning {{property is assumed atomic by default}}
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D | property-in-class-extension-1.m | 52 @property (nonatomic, atomic, readonly) float propertyName; // expected-error {{property attributes… 56 @property (atomic, nonatomic, readonly, readwrite) float propertyName; // expected-error {{property… category 57 // expected-error {{property attributes 'atomic' and 'nonatomic' are mutually exclusive}}
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/external/llvm/test/CodeGen/ARM/ |
D | atomic-load-store.ll | 18 store atomic i32 %val1, i32* %ptr seq_cst, align 4 31 %val = load atomic i32* %ptr seq_cst, align 4 45 %val = load atomic i8* %ptr1 unordered, align 1 46 store atomic i8 %val, i8* %ptr2 unordered, align 1 54 %val = load atomic i8* %ptr1 seq_cst, align 1 55 store atomic i8 %val, i8* %ptr2 seq_cst, align 1 62 %1 = load atomic i64* %p seq_cst, align 8 69 store atomic i64 %v, i64* %p seq_cst, align 8
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D | copy-paired-reg.ll | 11 store atomic i64 0, i64* %c seq_cst, align 8 12 store atomic i64 0, i64* %d seq_cst, align 8 14 %e = load atomic i64* %d seq_cst, align 8
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D | swift-atomics.ll | 12 store atomic i32 %v, i32* %p release, align 4 30 store atomic i32 %v, i32* %p seq_cst, align 4 31 %val = load atomic i32* %p seq_cst, align 4 43 %val = load atomic i32* %addr acquire, align 4
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/external/llvm/test/Transforms/GVN/ |
D | atomic.ll | 15 store atomic i32 %x, i32* @x unordered, align 4 27 store atomic i32 %x, i32* @x seq_cst, align 4 39 %y = load atomic i32* @x unordered, align 4 46 ; GVN across acquire load (load after atomic load must not be removed) 49 ; CHECK: load atomic i32* @x 53 %y = load atomic i32* @x seq_cst, align 4 65 %x = load atomic i32* @x unordered, align 4 74 ; CHECK: load atomic i32* @x unordered 77 %x2 = load atomic i32* @x unordered, align 4
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/external/llvm/test/Transforms/SCCP/ |
D | atomic-load-store.ll | 3 ; This transformation is safe for atomic loads and stores; check that it works. 9 %V = load atomic i32* @G seq_cst, align 4 13 store atomic i32 17, i32* @G seq_cst, align 4 16 store atomic i32 123, i32* @G seq_cst, align 4 24 %V = load atomic i32* @C seq_cst, align 4
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/external/llvm/test/Transforms/InstCombine/ |
D | atomic.ll | 6 ; Check transforms involving atomic operations 10 ; CHECK: load atomic i8** %p monotonic, align 8 12 %r = load atomic i32** %c monotonic, align 8 18 ; CHECK: %x = load atomic i32* %p seq_cst, align 4 20 %x = load atomic i32* %p seq_cst, align 4
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/external/llvm/test/Transforms/Mem2Reg/ |
D | atomic.ll | 3 ; mem2reg is allowed with arbitrary atomic operations (although we only support 4 ; it for atomic load and store at the moment). 9 store atomic i32 %x, i32* %a seq_cst, align 4 10 %r = load atomic i32* %a seq_cst, align 4
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/external/llvm/test/Transforms/MemCpyOpt/ |
D | atomic.ll | 12 ; memcpyopt should not touch atomic ops 15 ; CHECK: store atomic 20 store atomic i32 0, i32* %gep1 unordered, align 4 30 ; CHECK-NEXT: store atomic 35 store atomic i32 0, i32* @x unordered, align 4
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/external/chromium_org/third_party/libjingle/source/talk/app/webrtc/objctests/ |
D | RTCSessionDescriptionSyncObserver.h | 40 @property(atomic, copy) NSString *error; 42 @property(atomic, strong) RTCSessionDescription *sessionDescription; 44 @property(atomic, assign) BOOL success;
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/external/llvm/docs/ |
D | Atomics.rst | 18 The atomic instructions are designed specifically to provide readable IR and 21 * The new C++0x ``<atomic>`` header. (`C++0x draft available here 32 * Other scenarios with atomic semantics, including ``static`` variables with 40 pair of volatile stores. On the other hand, a non-volatile non-atomic load can 49 .. _Optimization outside atomic: 51 Optimization outside atomic 61 instructions with atomic ordering involved, concurrency does not matter, with 104 various atomic instructions. The exact guarantees provided depend on the 107 ``load atomic`` and ``store atomic`` provide the same basic functionality as 108 non-atomic loads and stores, but provide additional guarantees in situations [all …]
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/external/chromium_org/native_client_sdk/src/doc/reference/ |
D | pnacl-c-cpp-language-support.rst | 44 atomic primitives (offered by `atomic intrinsics 50 Non-atomic memory accesses may be reordered, separated, elided or fused 54 As in C11/C++11 some atomic accesses may be implemented with locks on 60 C++11 header ``<atomic>``. 63 GCC-style ``__sync_*`` builtins, as well as through C11/C++11 atomic 74 * ``volatile`` and atomic operations are address-free (operations on the 85 at a later date. Note that using atomic operations which aren't 108 - Some accesses may not actually be atomic on certain platforms, 110 - An atomic memory location must always be accessed with atomic 113 - Not all memory orderings are valid for all atomic operations. [all …]
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D | pnacl-bitcode-abi.rst | 315 :ref:`pointer types <bitcode_pointertypes>`). The ``volatile`` and ``atomic`` 426 * ``llvm.nacl.atomic.store`` 427 * ``llvm.nacl.atomic.load`` 428 * ``llvm.nacl.atomic.rmw`` 429 * ``llvm.nacl.atomic.cmpxchg`` 430 * ``llvm.nacl.atomic.fence`` 431 * ``llvm.nacl.atomic.fence.all`` 432 * ``llvm.nacl.atomic.is.lock.free`` 434 See :ref:`atomic intrinsics <bitcode_atomicintrinsics>`. 472 declare iN @llvm.nacl.atomic.load.<size>( [all …]
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/external/llvm/test/CodeGen/X86/ |
D | atomic-load-store.ll | 7 store atomic i32 %val1, i32* %ptr seq_cst, align 4 14 store atomic i32 %val1, i32* %ptr release, align 4 21 %val = load atomic i32* %ptr seq_cst, align 4
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D | cmpxchg16b.ll | 13 ; FIXME: Handle 128-bit atomicrmw/load atomic/store atomic
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/external/llvm/test/Transforms/FunctionAttrs/ |
D | atomic.ll | 9 store atomic i32 %x, i32* %x.addr seq_cst, align 4 10 %r = load atomic i32* %x.addr seq_cst, align 4 18 %r = load atomic i32* %x seq_cst, align 4
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/external/llvm/test/CodeGen/SystemZ/ |
D | spill-01.ll | 243 ; Repeat f2 with atomic accesses. We shouldn't use MVC here. 257 %val0 = load atomic i32 *%ptr0 unordered, align 4 258 %val1 = load atomic i32 *%ptr1 unordered, align 4 259 %val2 = load atomic i32 *%ptr2 unordered, align 4 260 %val3 = load atomic i32 *%ptr3 unordered, align 4 261 %val4 = load atomic i32 *%ptr4 unordered, align 4 262 %val5 = load atomic i32 *%ptr5 unordered, align 4 263 %val6 = load atomic i32 *%ptr6 unordered, align 4 264 %val7 = load atomic i32 *%ptr7 unordered, align 4 265 %val8 = load atomic i32 *%ptr8 unordered, align 4 [all …]
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/external/clang/test/SemaCXX/ |
D | return.cpp | 58 _Atomic(int) atomic(); 62 atomic();
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