Searched refs:getSchedClass (Results 1 – 14 of 14) sorted by relevance
583 unsigned DefClass = get(DefNode->getMachineOpcode()).getSchedClass(); in getOperandLatency()586 unsigned UseClass = get(UseNode->getMachineOpcode()).getSchedClass(); in getOperandLatency()598 return ItinData->getStageLatency(get(N->getMachineOpcode()).getSchedClass()); in getInstrLatency()611 unsigned Class = MI->getDesc().getSchedClass(); in getNumMicroOps()642 return ItinData->getStageLatency(MI->getDesc().getSchedClass()); in getInstrLatency()651 unsigned DefClass = DefMI->getDesc().getSchedClass(); in hasLowDefLatency()662 unsigned DefClass = DefMI->getDesc().getSchedClass(); in getOperandLatency()663 unsigned UseClass = UseMI->getDesc().getSchedClass(); in getOperandLatency()710 unsigned DefClass = DefMI->getDesc().getSchedClass(); in computeOperandLatency()
80 int UOps = InstrItins.getNumMicroOps(MI->getDesc().getSchedClass()); in getNumMicroOps()106 unsigned SchedClass = MI->getDesc().getSchedClass(); in resolveSchedClass()169 unsigned DefClass = DefMI->getDesc().getSchedClass(); in computeOperandLatency()
133 unsigned idx = MCID->getSchedClass(); in getHazardType()193 unsigned idx = MCID->getSchedClass(); in EmitInstruction()
67 unsigned InsnClass = MID->getSchedClass(); in canReserveResources()79 unsigned InsnClass = MID->getSchedClass(); in reserveResources()
1463 const MCSchedClassDesc *SC = DAG->getSchedClass(&*I); in init()1800 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in bumpNode()1994 const MCSchedClassDesc *SC = DAG->getSchedClass(SU); in initResourceDelta()
318 CodeGenSchedClass &getSchedClass(unsigned Idx) { in getSchedClass() function322 const CodeGenSchedClass &getSchedClass(unsigned Idx) const { in getSchedClass() function
600 ", // " << j << " " << SchedModels.getSchedClass(j).Name << "\n"; in EmitItineraries()1154 assert(SchedModels.getSchedClass(0).Name == "NoInstrModel" in EmitSchedClassTables()1162 const CodeGenSchedClass &SchedClass = SchedModels.getSchedClass(SCIdx); in EmitSchedClassTables()1314 const CodeGenSchedClass &SC = SchedModels.getSchedClass(*VCI); in EmitSchedModelHelpers()1349 << SchedModels.getSchedClass(TI->ToClassIdx).Name << '\n'; in EmitSchedModelHelpers()
547 CodeGenSchedClass &SC = getSchedClass(SCIdx); in collectSchedClasses()1328 SchedModels.getSchedClass(FromClassIdx).Transitions.push_back(SCTrans); in inferFromTransitions()
26 IS = II->beginStage(QII->get(this->getOpcode()).getSchedClass()); in getUnits()
160 const MCSchedClassDesc *getSchedClass(SUnit *SU) const { in getSchedClass() function
551 unsigned getSchedClass() const { in getSchedClass() function
2394 int UOps = ItinData->getNumMicroOps(Desc.getSchedClass()); in getNumMicroOpsSwiftLdSt()2650 unsigned Class = Desc.getSchedClass(); in getNumMicroOps()2938 unsigned DefClass = DefMCID.getSchedClass(); in getOperandLatency()2939 unsigned UseClass = UseMCID.getSchedClass(); in getOperandLatency()3387 int Latency = ItinData->getOperandCycle(DefMCID.getSchedClass(), DefIdx); in getOperandLatency()3616 unsigned Class = MCID.getSchedClass(); in getInstrLatency()3646 return ItinData->getStageLatency(get(Opcode).getSchedClass()); in getInstrLatency()3683 unsigned DefClass = DefMI->getDesc().getSchedClass(); in hasLowDefLatency()
1168 Itins->getOperandCycle(MCID.getSchedClass(), 0) > 2) in getSchedulingPreference()
968 unsigned SchedClass = TID.getSchedClass(); in ignorePseudoInstruction()