/external/llvm/lib/Target/Hexagon/ |
D | HexagonVarargsCallingConvention.h | 57 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg, in CC_Hexagon32_VarArgs() 58 LocVT.getSimpleVT(), LocInfo)); in CC_Hexagon32_VarArgs() 69 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg, in CC_Hexagon32_VarArgs() 70 LocVT.getSimpleVT(), LocInfo)); in CC_Hexagon32_VarArgs() 92 State.addLoc(CCValAssign::getMem(ValNo, ValVT.getSimpleVT(), Offset3, in CC_Hexagon32_VarArgs() 93 LocVT.getSimpleVT(), LocInfo)); in CC_Hexagon32_VarArgs() 113 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg, in RetCC_Hexagon32_VarArgs() 114 LocVT.getSimpleVT(), LocInfo)); in RetCC_Hexagon32_VarArgs() 125 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg, in RetCC_Hexagon32_VarArgs() 126 LocVT.getSimpleVT(), LocInfo)); in RetCC_Hexagon32_VarArgs() [all …]
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D | HexagonCallingConvLower.cpp | 52 addLoc(CCValAssign::getMem(ValNo, ValVT.getSimpleVT(), Offset, in HandleByVal() 53 LocVT.getSimpleVT(), LocInfo)); in HandleByVal()
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D | HexagonISelLowering.cpp | 1497 return ((MTy1.getSimpleVT() == MVT::i64) && (MTy2.getSimpleVT() == MVT::i32)); in isTruncateFree() 1504 return ((VT1.getSimpleVT() == MVT::i64) && (VT2.getSimpleVT() == MVT::i32)); in isTruncateFree()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelDAGToDAG.cpp | 217 MVT SimpleVT = LoadedVT.getSimpleVT(); in SelectLoad() 252 MVT::SimpleValueType TargetVT = LD->getValueType(0).getSimpleVT().SimpleTy; in SelectLoad() 453 MVT SimpleVT = LoadedVT.getSimpleVT(); in SelectLoadVector() 495 switch (EltVT.getSimpleVT().SimpleTy) { in SelectLoadVector() 519 switch (EltVT.getSimpleVT().SimpleTy) { in SelectLoadVector() 549 switch (EltVT.getSimpleVT().SimpleTy) { in SelectLoadVector() 573 switch (EltVT.getSimpleVT().SimpleTy) { in SelectLoadVector() 604 switch (EltVT.getSimpleVT().SimpleTy) { in SelectLoadVector() 628 switch (EltVT.getSimpleVT().SimpleTy) { in SelectLoadVector() 651 switch (EltVT.getSimpleVT().SimpleTy) { in SelectLoadVector() [all …]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | FastISel.cpp | 148 MVT VT = RealVT.getSimpleVT(); in getRegForValue() 152 VT = TLI.getTypeToTransformTo(V->getContext(), VT).getSimpleVT(); in getRegForValue() 220 Reg = FastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, in materializeRegForValue() 298 IdxN = FastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, in getRegForGEPIndex() 303 IdxN = FastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, in getRegForGEPIndex() 387 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, in SelectBinaryOp() 389 VT.getSimpleVT()); in SelectBinaryOp() 423 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in SelectBinaryOp() 424 Op0IsKill, Imm, VT.getSimpleVT()); in SelectBinaryOp() 434 unsigned ResultReg = FastEmit_rf(VT.getSimpleVT(), VT.getSimpleVT(), in SelectBinaryOp() [all …]
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D | LegalizeDAG.cpp | 273 SVT = (MVT::SimpleValueType)(SVT.getSimpleVT().SimpleTy - 1); in ExpandConstantFP() 829 StVT.getSimpleVT())) { in LegalizeStoreOps() 1048 switch (TLI.getLoadExtAction(ExtType, SrcVT.getSimpleVT())) { in LegalizeLoadOps() 1972 switch (Node->getValueType(0).getSimpleVT().SimpleTy) { in ExpandFPLibCall() 1990 switch (Node->getValueType(0).getSimpleVT().SimpleTy) { in ExpandIntLibCall() 2005 switch (Node->getValueType(0).getSimpleVT().SimpleTy) { in isDivRemLibcallAvailable() 2052 switch (Node->getValueType(0).getSimpleVT().SimpleTy) { in ExpandDivRemLibCall() 2109 switch (Node->getValueType(0).getSimpleVT().SimpleTy) { in isSinCosLibcallAvailable() 2159 switch (Node->getValueType(0).getSimpleVT().SimpleTy) { in ExpandSinCosLibCall() 2385 switch (Op0.getValueType().getSimpleVT().SimpleTy) { in ExpandLegalINT_TO_FP() [all …]
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D | SelectionDAG.cpp | 673 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; in RemoveNodeFromCSEMaps() 674 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; in RemoveNodeFromCSEMaps() 1240 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= in getValueType() 1242 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); in getValueType() 1245 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; in getValueType() 3078 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && in getNode() 3089 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) in getNode() 3319 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && in getNode() 3329 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) in getNode() 3559 TLI.isSafeMemOpType(NewVT.getSimpleVT())) in FindOptimalMemOpLowering() [all …]
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D | LegalizeVectorOps.cpp | 168 switch (TLI.getTruncStoreAction(ValVT, StVT.getSimpleVT())) { in LegalizeOp() 358 MVT NVT = MVT::getVectorVT(EltVT.getSimpleVT(), NumElts); in PromoteVectorOpINT_TO_FP()
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/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 273 (unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassForVT)); in isTypeLegal() 274 return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != 0; in isTypeLegal() 412 unsigned I = (unsigned) VT.getSimpleVT().SimpleTy; in getOperationAction() 459 getLoadExtAction(ExtType, VT.getSimpleVT()) == Legal; in isLoadExtLegal() 476 getTruncStoreAction(ValVT.getSimpleVT(), MemVT.getSimpleVT()) == Legal; in isTruncStoreLegal() 493 (getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Legal || in isIndexedLoadLegal() 494 getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Custom); in isIndexedLoadLegal() 511 (getIndexedStoreAction(IdxMode, VT.getSimpleVT()) == Legal || in isIndexedStoreLegal() 512 getIndexedStoreAction(IdxMode, VT.getSimpleVT()) == Custom); in isIndexedStoreLegal() 587 return getValueType(Ty, AllowUnknown).getSimpleVT(); [all …]
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D | TargetCallingConv.h | 130 VT = vt.getSimpleVT(); in InputArg() 158 VT = vt.getSimpleVT(); in OutputArg()
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/external/llvm/lib/Target/ARM/ |
D | ARMTargetTransformInfo.cpp | 288 ISD, DstTy.getSimpleVT(), SrcTy.getSimpleVT()); in getCastInstrCost() 319 ISD, DstTy.getSimpleVT(), in getCastInstrCost() 320 SrcTy.getSimpleVT()); in getCastInstrCost() 352 ISD, DstTy.getSimpleVT(), in getCastInstrCost() 353 SrcTy.getSimpleVT()); in getCastInstrCost() 374 ISD, DstTy.getSimpleVT(), in getCastInstrCost() 375 SrcTy.getSimpleVT()); in getCastInstrCost() 417 ISD, SelCondTy.getSimpleVT(), in getCmpSelInstrCost() 418 SelValTy.getSimpleVT()); in getCmpSelInstrCost()
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D | ARMFastISel.cpp | 733 MVT VT = CEVT.getSimpleVT(); in TargetMaterializeConstant() 778 VT = evt.getSimpleVT(); in isTypeLegal() 1410 MVT SrcVT = SrcEVT.getSimpleVT(); in ARMEmitCmp() 1602 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP() 1819 MVT VT = FPVT.getSimpleVT(); in SelectBinaryFPOp() 1936 switch (static_cast<EVT>(ArgVT).getSimpleVT().SimpleTy) { in ProcessCallArgs() 2141 MVT RVVT = RVEVT.getSimpleVT(); in SelectRet() 2196 return ARMMaterializeGV(GV, LCREVT.getSimpleVT()); in getLibcallReg() 2761 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIntExt() 2762 MVT DestVT = DestEVT.getSimpleVT(); in SelectIntExt() [all …]
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D | ARMISelDAGToDAG.cpp | 1542 switch (LoadedVT.getSimpleVT().SimpleTy) { in SelectT2IndexedLoad() 1748 switch (VT.getSimpleVT().SimpleTy) { in SelectVLD() 1884 switch (VT.getSimpleVT().SimpleTy) { in SelectVST() 2045 switch (VT.getSimpleVT().SimpleTy) { in SelectVLDSTLane() 2158 switch (VT.getSimpleVT().SimpleTy) { in SelectVLDDup() 2505 switch (VT.getSimpleVT().SimpleTy) { in SelectCMOVOp() 2890 switch (VT.getSimpleVT().SimpleTy) { in Select() 2910 switch (VT.getSimpleVT().SimpleTy) { in Select() 2930 switch (VT.getSimpleVT().SimpleTy) { in Select()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelDAGToDAG.cpp | 310 switch (VT.getSimpleVT().SimpleTy) { in isValidIndexedLoad() 335 MVT VT = LD->getMemoryVT().getSimpleVT(); in SelectIndexedLoad() 364 MVT VT = LD->getMemoryVT().getSimpleVT(); in SelectIndexedBinOp()
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/external/llvm/lib/Target/X86/ |
D | X86FastISel.cpp | 157 VT = evt.getSimpleVT(); in isTypeLegal() 184 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitLoad() 242 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore() 303 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore() 338 unsigned RR = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, in X86FastEmitExtend() 808 SrcReg = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Op, in X86SelectRet() 876 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpOpcode() 893 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpImmediateOpcode() 1029 MVT SrcVT = TLI.getValueType(I->getOperand(0)->getType()).getSimpleVT(); in X86SelectZExt() 1059 ResultReg = FastEmit_r(MVT::i8, DstVT.getSimpleVT(), ISD::ZERO_EXTEND, in X86SelectZExt() [all …]
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D | X86ISelDAGToDAG.cpp | 1796 switch (NVT.getSimpleVT().SimpleTy) { in SelectAtomicLoadArith() 2205 switch (NVT.getSimpleVT().SimpleTy) { in Select() 2242 switch (NVT.getSimpleVT().SimpleTy) { in Select() 2271 switch (NVT.getSimpleVT().SimpleTy) { in Select() 2281 switch (NVT.getSimpleVT().SimpleTy) { in Select() 2418 switch (NVT.getSimpleVT().SimpleTy) { in Select() 2426 switch (NVT.getSimpleVT().SimpleTy) { in Select() 2437 switch (NVT.getSimpleVT().SimpleTy) { in Select() 2492 switch (NVT.getSimpleVT().SimpleTy) { in Select() 2612 switch (N0.getValueType().getSimpleVT().SimpleTy) { in Select() [all …]
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D | X86ISelLowering.cpp | 3830 MVT VT = SVOp->getValueType(0).getSimpleVT(); in Compact8x32ShuffleNode() 4075 MVT VT = SVOp->getValueType(0).getSimpleVT(); in getShuffleVPERM2X128Immediate() 4250 MVT VT = N->getValueType(0).getSimpleVT(); in isVEXTRACTIndex() 4268 MVT VT = N->getValueType(0).getSimpleVT(); in isVINSERTIndex() 4295 MVT VT = N->getValueType(0).getSimpleVT(); in getShuffleSHUFImmediate() 4325 MVT VT = N->getValueType(0).getSimpleVT(); in getShufflePSHUFHWImmediate() 4349 MVT VT = N->getValueType(0).getSimpleVT(); in getShufflePSHUFLWImmediate() 4373 MVT VT = SVOp->getValueType(0).getSimpleVT(); in getShufflePALIGNRImmediate() 4402 MVT VecVT = N->getOperand(0).getValueType().getSimpleVT(); in getExtractVEXTRACTImmediate() 4417 MVT VecVT = N->getValueType(0).getSimpleVT(); in getInsertVINSERTImmediate() [all …]
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D | X86TargetTransformInfo.cpp | 451 ISD, DstTy.getSimpleVT(), SrcTy.getSimpleVT()); in getCastInstrCost()
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/external/llvm/lib/Target/R600/ |
D | AMDILISelLowering.cpp | 228 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32 in isFPImmLegal() 229 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) { in isFPImmLegal() 238 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32 in ShouldShrinkFPConstant() 239 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) { in ShouldShrinkFPConstant()
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
D | AMDILISelLowering.cpp | 252 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32 in isFPImmLegal() 253 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) { in isFPImmLegal() 263 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32 in ShouldShrinkFPConstant() 264 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) { in ShouldShrinkFPConstant()
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDILISelLowering.cpp | 252 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32 in isFPImmLegal() 253 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) { in isFPImmLegal() 263 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32 in ShouldShrinkFPConstant() 264 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) { in ShouldShrinkFPConstant()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 798 MVT::SimpleValueType VT = VecVT.getSimpleVT().SimpleTy; in SelectSETCC() 826 if (VecVT.getSimpleVT().isFloatingPoint()) { in SelectSETCC() 1031 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select() 1043 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select() 1065 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select() 1078 switch (LoadedVT.getSimpleVT().SimpleTy) { in Select()
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D | PPCFastISel.cpp | 282 MVT VT = CEVT.getSimpleVT(); in TargetMaterializeConstant()
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/external/llvm/include/llvm/CodeGen/ |
D | ValueTypes.h | 604 MVT EltTy = getSimpleVT().getVectorElementType(); in changeVectorElementTypeToInteger() 724 MVT getSimpleVT() const { in getSimpleVT() function
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/external/llvm/utils/TableGen/ |
D | IntrinsicEmitter.cpp | 361 getSimpleVT().SimpleTy, Sig); in EncodeFixedType()
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