| /external/llvm/lib/CodeGen/ |
| D | CalcSpillWeights.cpp | 65 unsigned sub, hreg, hsub; in copyHint() local
68 hreg = mi->getOperand(1).getReg(); in copyHint()
72 hreg = mi->getOperand(0).getReg(); in copyHint()
76 if (!hreg) in copyHint()
79 if (TargetRegisterInfo::isVirtualRegister(hreg)) in copyHint()
80 return sub == hsub ? hreg : 0; in copyHint()
86 return rc->contains(hreg) ? hreg : 0; in copyHint()
89 return tri.getMatchingSuperReg(hreg, sub, rc); in copyHint()
|
| /external/valgrind/main/VEX/priv/ |
| D | host_generic_regs.c | 90 ppHReg(tab->hreg[i]); in ppHRegUsage()
106 if (tab->hreg[i] == reg) in addHRegUse()
111 tab->hreg[tab->n_used] = reg; in addHRegUse()
|
| D | host_generic_reg_alloc2.c | 157 if (reg_usage.hreg[i] == r) in instrMentionsReg()
549 vreg = reg_usage.hreg[j]; in doRegisterAllocation()
613 rreg = reg_usage.hreg[j]; in doRegisterAllocation()
1220 vreg = reg_usage.hreg[j]; in doRegisterAllocation()
1245 vassert(reg_usage.hreg[0] != reg_usage.hreg[1]); in doRegisterAllocation()
1274 vreg = reg_usage.hreg[j]; in doRegisterAllocation()
1381 if (rreg_state[k].vreg == reg_usage.hreg[m]) { in doRegisterAllocation()
|
| D | host_generic_regs.h | 160 HReg hreg[N_HREG_USAGE]; member
|
| D | host_s390_isel.c | 2725 HReg hreg, hregHI; in iselSB_S390() local
2772 hregHI = hreg = INVALID_HREG; in iselSB_S390()
2778 hreg = mkHReg(j++, HRcInt64, True); in iselSB_S390()
2782 hreg = mkHReg(j++, HRcInt64, True); in iselSB_S390()
2786 hreg = mkHReg(j++, HRcInt64, True); in iselSB_S390()
2792 hreg = mkHReg(j++, HRcFlt64, True); in iselSB_S390()
2796 hreg = mkHReg(j++, HRcFlt64, True); in iselSB_S390()
2806 env->vregmap[i] = hreg; in iselSB_S390()
|
| D | host_mips_isel.c | 3162 HReg hreg, hregHI; in iselSB_MIPS() local
3201 hregHI = hreg = INVALID_HREG; in iselSB_MIPS()
3207 hreg = mkHReg(j++, HRcInt32, True); in iselSB_MIPS()
3211 hreg = mkHReg(j++, HRcInt32, True); in iselSB_MIPS()
3217 hreg = mkHReg(j++, HRcInt64, True); in iselSB_MIPS()
3221 hreg = mkHReg(j++, HRcFlt32, True); in iselSB_MIPS()
3225 hreg = mkHReg(j++, HRcFlt64, True); in iselSB_MIPS()
3231 env->vregmap[i] = hreg; in iselSB_MIPS()
|
| D | host_x86_isel.c | 4240 HReg hreg, hregHI; in iselSB_X86() local
4280 hregHI = hreg = INVALID_HREG; in iselSB_X86()
4285 case Ity_I32: hreg = mkHReg(j++, HRcInt32, True); break; in iselSB_X86()
4286 case Ity_I64: hreg = mkHReg(j++, HRcInt32, True); in iselSB_X86()
4289 case Ity_F64: hreg = mkHReg(j++, HRcFlt64, True); break; in iselSB_X86()
4290 case Ity_V128: hreg = mkHReg(j++, HRcVec128, True); break; in iselSB_X86()
4294 env->vregmap[i] = hreg; in iselSB_X86()
|
| D | host_amd64_isel.c | 4199 HReg hreg, hregHI; in iselSB_AMD64() local
4237 hregHI = hreg = INVALID_HREG; in iselSB_AMD64()
4241 hreg = mkHReg(j++, HRcInt64, True); in iselSB_AMD64()
4244 hreg = mkHReg(j++, HRcInt64, True); in iselSB_AMD64()
4250 hreg = mkHReg(j++, HRcVec128, True); in iselSB_AMD64()
4253 hreg = mkHReg(j++, HRcVec128, True); in iselSB_AMD64()
4260 env->vregmap[i] = hreg; in iselSB_AMD64()
|
| D | host_arm_isel.c | 6171 HReg hreg, hregHI; in iselSB_ARM() local
6207 hregHI = hreg = INVALID_HREG; in iselSB_ARM()
6212 case Ity_I32: hreg = mkHReg(j++, HRcInt32, True); break; in iselSB_ARM()
6215 hreg = mkHReg(j++, HRcFlt64, True); in iselSB_ARM()
6218 hreg = mkHReg(j++, HRcInt32, True); in iselSB_ARM()
6221 case Ity_F32: hreg = mkHReg(j++, HRcFlt32, True); break; in iselSB_ARM()
6222 case Ity_F64: hreg = mkHReg(j++, HRcFlt64, True); break; in iselSB_ARM()
6223 case Ity_V128: hreg = mkHReg(j++, HRcVec128, True); break; in iselSB_ARM()
6227 env->vregmap[i] = hreg; in iselSB_ARM()
|
| D | host_x86_defs.c | 2761 HReg r = u.hreg[j]; in emit_X86Instr()
|
| /external/pixman/pixman/ |
| D | pixman-region.c | 1590 region_type_t *hreg; /* ri[j_half].reg */ in validate() local
1767 hreg = &ri[j + half].reg; in validate()
1769 if (!pixman_op (reg, reg, hreg, pixman_region_union_o, TRUE, TRUE)) in validate()
1772 if (hreg->extents.x1 < reg->extents.x1) in validate()
1773 reg->extents.x1 = hreg->extents.x1; in validate()
1775 if (hreg->extents.y1 < reg->extents.y1) in validate()
1776 reg->extents.y1 = hreg->extents.y1; in validate()
1778 if (hreg->extents.x2 > reg->extents.x2) in validate()
1779 reg->extents.x2 = hreg->extents.x2; in validate()
1781 if (hreg->extents.y2 > reg->extents.y2) in validate()
[all …]
|