| /external/kernel-headers/original/linux/ |
| D | irq.h | 89 unsigned int (*startup)(unsigned int irq);
90 void (*shutdown)(unsigned int irq);
91 void (*enable)(unsigned int irq);
92 void (*disable)(unsigned int irq);
94 void (*ack)(unsigned int irq);
95 void (*mask)(unsigned int irq);
96 void (*mask_ack)(unsigned int irq);
97 void (*unmask)(unsigned int irq);
98 void (*eoi)(unsigned int irq);
100 void (*end)(unsigned int irq);
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| D | interrupt.h | 74 int irq; member
103 extern void disable_irq_nosync(unsigned int irq);
104 extern void disable_irq(unsigned int irq);
105 extern void enable_irq(unsigned int irq);
118 static inline void disable_irq_nosync_lockdep(unsigned int irq) in disable_irq_nosync_lockdep() argument
120 disable_irq_nosync(irq); in disable_irq_nosync_lockdep()
126 static inline void disable_irq_lockdep(unsigned int irq) in disable_irq_lockdep() argument
128 disable_irq(irq); in disable_irq_lockdep()
134 static inline void enable_irq_lockdep(unsigned int irq) in enable_irq_lockdep() argument
139 enable_irq(irq); in enable_irq_lockdep()
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| D | kernel_stat.h | 22 cputime64_t irq; member
44 static inline int kstat_irqs(int irq) in kstat_irqs() argument
49 sum += kstat_cpu(cpu).irqs[irq]; in kstat_irqs()
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| /external/kernel-headers/original/asm-mips/ |
| D | irq.h | 19 static inline int irq_canonicalize(int irq) in irq_canonicalize() argument
21 return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq); in irq_canonicalize()
24 #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ argument
32 extern int setup_irq_smtc(unsigned int irq, struct irqaction * new,
35 static inline void smtc_im_ack_irq(unsigned int irq) in smtc_im_ack_irq() argument
37 if (irq_hwmask[irq] & ST0_IM) in smtc_im_ack_irq()
38 set_c0_status(irq_hwmask[irq] & ST0_IM); in smtc_im_ack_irq()
43 static inline void smtc_im_ack_irq(unsigned int irq) in smtc_im_ack_irq() argument
52 extern void plat_set_irq_affinity(unsigned int irq, cpumask_t affinity);
53 extern void smtc_forward_irq(unsigned int irq);
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| D | i8259.h | 40 extern int i8259A_irq_pending(unsigned int irq);
41 extern void make_8259A_irq(unsigned int irq);
52 int irq; in i8259_irq() local
58 irq = inb(PIC_MASTER_CMD) & 7; in i8259_irq()
59 if (irq == PIC_CASCADE_IR) { in i8259_irq()
65 irq = (inb(PIC_SLAVE_CMD) & 7) + 8; in i8259_irq()
68 if (unlikely(irq == 7)) { in i8259_irq()
78 irq = -1; in i8259_irq()
83 return likely(irq >= 0) ? irq + I8259A_IRQ_BASE : irq; in i8259_irq()
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| /external/qemu/hw/ |
| D | arm_gic.c | 52 #define GIC_SET_ENABLED(irq) s->irq_state[irq].enabled = 1 argument
53 #define GIC_CLEAR_ENABLED(irq) s->irq_state[irq].enabled = 0 argument
54 #define GIC_TEST_ENABLED(irq) s->irq_state[irq].enabled argument
55 #define GIC_SET_PENDING(irq, cm) s->irq_state[irq].pending |= (cm) argument
56 #define GIC_CLEAR_PENDING(irq, cm) s->irq_state[irq].pending &= ~(cm) argument
57 #define GIC_TEST_PENDING(irq, cm) ((s->irq_state[irq].pending & (cm)) != 0) argument
58 #define GIC_SET_ACTIVE(irq, cm) s->irq_state[irq].active |= (cm) argument
59 #define GIC_CLEAR_ACTIVE(irq, cm) s->irq_state[irq].active &= ~(cm) argument
60 #define GIC_TEST_ACTIVE(irq, cm) ((s->irq_state[irq].active & (cm)) != 0) argument
61 #define GIC_SET_MODEL(irq) s->irq_state[irq].model = 1 argument
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| D | irq.c | 33 void qemu_set_irq(qemu_irq irq, int level) in qemu_set_irq() argument
35 if (!irq) in qemu_set_irq()
38 irq->handler(irq->opaque, irq->n, level); in qemu_set_irq()
67 struct IRQState *irq = opaque; in qemu_notirq() local
69 irq->handler(irq->opaque, irq->n, !level); in qemu_notirq()
72 qemu_irq qemu_irq_invert(qemu_irq irq) in qemu_irq_invert() argument
75 qemu_irq_raise(irq); in qemu_irq_invert()
76 return qemu_allocate_irqs(qemu_notirq, irq, 1)[0]; in qemu_irq_invert()
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| D | i8259.c | 76 static inline void pic_set_irq1(PicState *s, int irq, int level) in pic_set_irq1() argument
79 mask = 1 << irq; in pic_set_irq1()
145 int irq2, irq; in pic_update_irq() local
155 irq = pic_get_irq(&s->pics[0]); in pic_update_irq()
156 if (irq >= 0) { in pic_update_irq()
184 static void i8259_set_irq(void *opaque, int irq, int level) in i8259_set_irq() argument
189 if (level != irq_level[irq]) { in i8259_set_irq()
191 printf("i8259_set_irq: irq=%d level=%d\n", irq, level); in i8259_set_irq()
193 irq_level[irq] = level; in i8259_set_irq()
196 irq_count[irq]++; in i8259_set_irq()
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| D | armv7m_nvic.c | 89 void armv7m_nvic_set_pending(void *opaque, int irq) in armv7m_nvic_set_pending() argument
92 if (irq >= 16) in armv7m_nvic_set_pending()
93 irq += 16; in armv7m_nvic_set_pending()
94 gic_set_pending_private(&s->gic, 0, irq); in armv7m_nvic_set_pending()
101 uint32_t irq; in armv7m_nvic_acknowledge_irq() local
103 irq = gic_acknowledge_irq(&s->gic, 0); in armv7m_nvic_acknowledge_irq()
104 if (irq == 1023) in armv7m_nvic_acknowledge_irq()
106 if (irq >= 32) in armv7m_nvic_acknowledge_irq()
107 irq -= 16; in armv7m_nvic_acknowledge_irq()
108 return irq; in armv7m_nvic_acknowledge_irq()
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| D | irq.h | 10 void qemu_set_irq(qemu_irq irq, int level);
12 static inline void qemu_irq_raise(qemu_irq irq) in qemu_irq_raise() argument
14 qemu_set_irq(irq, 1); in qemu_irq_raise()
17 static inline void qemu_irq_lower(qemu_irq irq) in qemu_irq_lower() argument
19 qemu_set_irq(irq, 0); in qemu_irq_lower()
22 static inline void qemu_irq_pulse(qemu_irq irq) in qemu_irq_pulse() argument
24 qemu_set_irq(irq, 1); in qemu_irq_pulse()
25 qemu_set_irq(irq, 0); in qemu_irq_pulse()
33 qemu_irq qemu_irq_invert(qemu_irq irq);
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| D | goldfish_device.c | 44 void goldfish_device_set_irq(struct goldfish_device *dev, int irq, int level) in goldfish_device_set_irq() argument
46 if(irq >= dev->irq_count) in goldfish_device_set_irq()
47 … cpu_abort (cpu_single_env, "goldfish_device_set_irq: Bad irq %d >= %d\n", irq, dev->irq_count); in goldfish_device_set_irq()
49 qemu_set_irq(goldfish_pic[dev->irq + irq], level); in goldfish_device_set_irq()
58 if(dev->irq == 0 && dev->irq_count > 0) { in goldfish_add_device_no_io()
59 dev->irq = goldfish_free_irq; in goldfish_add_device_no_io()
130 return s->current ? s->current->irq : 0; in goldfish_bus_read()
193 .irq = 1,
198 void goldfish_device_init(qemu_irq *pic, uint32_t base, uint32_t size, uint32_t irq, uint32_t irq_c… in goldfish_device_init() argument
202 goldfish_free_irq = irq; in goldfish_device_init()
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| D | mips_int.c | 21 static void cpu_mips_irq_request(void *opaque, int irq, int level) in cpu_mips_irq_request() argument
25 if (irq < 0 || irq > 7) in cpu_mips_irq_request()
29 env->CP0_Cause |= 1 << (irq + CP0Ca_IP); in cpu_mips_irq_request()
31 env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP)); in cpu_mips_irq_request()
43 env->irq[i] = qi[i]; in cpu_mips_irq_init_cpu()
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| D | pc.h | 10 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
13 qemu_irq irq, int baudbase,
25 ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr);
26 ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverStat…
32 void pic_set_irq(int irq, int level);
33 void pic_set_irq_new(void *opaque, int irq, int level);
64 PITState *pit_init(int base, qemu_irq irq);
92 RTCState *rtc_init(int base, qemu_irq irq, int base_year);
93 RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year);
94 RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
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| D | mips_pic.c | 17 static void mips_cpu_irq_handler(void *opaque, int irq, int level) in mips_cpu_irq_handler() argument
22 if (irq < 0 || 7 < irq) in mips_cpu_irq_handler()
24 irq); in mips_cpu_irq_handler()
26 causebit = 0x00000100 << irq; in mips_cpu_irq_handler()
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| D | goldfish_device.h | 24 uint32_t irq; // filled in by goldfish_device_add if 0 member
29 void goldfish_device_set_irq(struct goldfish_device *dev, int irq, int level);
37 void goldfish_device_init(qemu_irq *pic, uint32_t base, uint32_t size, uint32_t irq, uint32_t irq_c…
38 int goldfish_device_bus_init(uint32_t base, uint32_t irq);
43 int goldfish_tty_add(CharDriverState *cs, int id, uint32_t base, int irq);
55 void events_dev_init(uint32_t base, qemu_irq irq);
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| D | pxa.h | 84 qemu_irq irq);
86 qemu_irq irq);
92 qemu_irq irq);
99 BlockDriverState *bd, qemu_irq irq, void *dma);
108 void pxa2xx_pcmcia_set_irq_cb(void *opaque, qemu_irq irq, qemu_irq cd_irq);
117 qemu_irq irq);
124 qemu_irq irq, uint32_t page_size);
190 qemu_irq irq; member
218 qemu_irq irq);
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| D | devices.h | 27 void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode);
45 void *retu_init(qemu_irq irq, int vilma);
46 void *tahvo_init(qemu_irq irq, int betty);
60 TC6393xbState *tc6393xb_init(uint32_t base, qemu_irq irq);
67 void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
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| D | mc146818rtc.c | 70 qemu_irq irq; member
87 static void rtc_irq_raise(qemu_irq irq) { in rtc_irq_raise() argument
98 qemu_irq_raise(irq); in rtc_irq_raise()
125 rtc_irq_raise(s->irq); in rtc_coalesced_timer()
189 rtc_irq_raise(s->irq); in rtc_periodic_timer()
196 rtc_irq_raise(s->irq); in rtc_periodic_timer()
425 rtc_irq_raise(s->irq); in rtc_update_second2()
432 rtc_irq_raise(s->irq); in rtc_update_second2()
464 qemu_irq_lower(s->irq); in cmos_ioport_read()
589 qemu_irq_lower(s->irq); in rtc_reset()
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| D | sysbus.c | 25 void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_irq irq) in sysbus_connect_irq() argument
30 *dev->irqp[n] = irq; in sysbus_connect_irq()
134 qemu_irq irq; in sysbus_create_varargs() local
146 irq = va_arg(va, qemu_irq); in sysbus_create_varargs()
147 if (!irq) { in sysbus_create_varargs()
150 sysbus_connect_irq(s, n, irq); in sysbus_create_varargs()
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| D | arm_pic.c | 25 static void arm_pic_cpu_handler(void *opaque, int irq, int level) in arm_pic_cpu_handler() argument
28 switch (irq) { in arm_pic_cpu_handler()
42 hw_error("arm_pic_cpu_handler: Bad interrput line %d\n", irq); in arm_pic_cpu_handler()
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| /external/kernel-headers/original/asm-x86/ |
| D | hw_irq_32.h | 42 #define platform_legacy_irq(irq) ((irq) < 16) argument
45 void disable_8259A_irq(unsigned int irq);
46 void enable_8259A_irq(unsigned int irq);
47 int i8259A_irq_pending(unsigned int irq);
48 void make_8259A_irq(unsigned int irq);
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| D | i8259.h | 13 extern void enable_8259A_irq(unsigned int irq);
14 extern void disable_8259A_irq(unsigned int irq);
15 extern unsigned int startup_8259A_irq(unsigned int irq);
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| D | irq_32.h | 18 static __inline__ int irq_canonicalize(int irq) in irq_canonicalize() argument
20 return ((irq == 2) ? 9 : irq); in irq_canonicalize()
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| /external/linux-tools-perf/scripts/python/bin/ |
| D | netdev-times-record | 6 -e irq:irq_handler_entry -e irq:irq_handler_exit \
7 -e irq:softirq_entry -e irq:softirq_exit \
8 -e irq:softirq_raise $@
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| /external/kernel-headers/original/asm-mips/sibyte/ |
| D | sb1250.h | 49 extern void sb1250_mask_irq(int cpu, int irq);
50 extern void sb1250_unmask_irq(int cpu, int irq);
53 extern void bcm1480_mask_irq(int cpu, int irq);
54 extern void bcm1480_unmask_irq(int cpu, int irq);
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