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Searched refs:isBeforeLegalize (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp315 if (DCI.isBeforeLegalize()) in performADDECombine()
328 if (DCI.isBeforeLegalize()) in performSUBECombine()
/external/llvm/include/llvm/Target/
DTargetLowering.h1783 bool isBeforeLegalize() const { return Level == BeforeLegalizeTypes; } in isBeforeLegalize() function
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp1141 if (DCI.isBeforeLegalize() && N0->hasOneUse() && in SimplifySetCC()
1180 if (DCI.isBeforeLegalize() && in SimplifySetCC()
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp1519 if (!DCI.isBeforeLegalize() || in PerformDAGCombine()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp15626 if (!DCI.isBeforeLegalize() && !TLI.isTypeLegal(VT.getVectorElementType())) in PerformShuffleCombine()
16199 if (!DCI.isBeforeLegalize() && in PerformSELECTCombine()
16254 if (!DCI.isBeforeLegalize() && in PerformSELECTCombine()
16260 if (!DCI.isBeforeLegalize() && N->getOpcode() == ISD::VSELECT && in PerformSELECTCombine()
16310 !DCI.isBeforeLegalize() && TLI.isOperationLegal(ISD::VSELECT, VT)) { in PerformSELECTCombine()
16321 TargetLowering::TargetLoweringOpt TLO(DAG, DCI.isBeforeLegalize(), in PerformSELECTCombine()
16609 if (!DCI.isBeforeLegalize() && !DCI.isBeforeLegalizeOps()) { in PerformCMOVCombine()
16642 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformMulCombine()
17933 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformBTCombine()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp7906 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON() in AddCombineToVPADDL()
8001 if (DCI.isBeforeLegalize()) return SDValue(); in AddCombineTo64bitMLAL()
8236 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformMULCombine()
9017 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in CombineBaseUpdate()