| /external/llvm/lib/Target/ARM/ |
| D | Thumb2InstrInfo.cpp | 217 bool isSub = NumBytes < 0; in emitT2RegPlusImmediate() local
218 if (isSub) NumBytes = -NumBytes; in emitT2RegPlusImmediate()
242 if (isSub) { in emitT2RegPlusImmediate()
275 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitT2RegPlusImmediate()
283 Opc = isSub ? ARM::t2SUBri : ARM::t2ADDri; in emitT2RegPlusImmediate()
296 Opc = isSub ? ARM::t2SUBri : ARM::t2ADDri; in emitT2RegPlusImmediate()
300 Opc = isSub ? ARM::t2SUBri12 : ARM::t2ADDri12; in emitT2RegPlusImmediate()
429 bool isSub = false; in rewriteT2FrameIndex() local
455 isSub = true; in rewriteT2FrameIndex()
474 unsigned NewOpc = isSub ? ARM::t2SUBri12 : ARM::t2ADDri12; in rewriteT2FrameIndex()
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| D | Thumb1RegisterInfo.cpp | 101 bool isSub = false; in emitThumbRegPlusImmInReg() local
107 isSub = true; in emitThumbRegPlusImmInReg()
129 int Opc = (isSub) ? ARM::tSUBrr : (isHigh ? ARM::tADDhirr : ARM::tADDrr); in emitThumbRegPlusImmInReg()
134 if (DestReg == ARM::SP || isSub) in emitThumbRegPlusImmInReg()
174 bool isSub = NumBytes < 0; in emitThumbRegPlusImmediate() local
176 if (isSub) Bytes = -NumBytes; in emitThumbRegPlusImmediate()
190 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitThumbRegPlusImmediate()
192 } else if (!isSub && BaseReg == ARM::SP) { in emitThumbRegPlusImmediate()
212 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; in emitThumbRegPlusImmediate()
217 Opc = isSub ? ARM::tSUBi8 : ARM::tADDi8; in emitThumbRegPlusImmediate()
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| D | ARMBaseInstrInfo.cpp | 165 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; in convertToThreeAddress() local
173 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg) in convertToThreeAddress()
180 get(isSub ? ARM::SUBrsi : ARM::ADDrsi), WBReg) in convertToThreeAddress()
185 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) in convertToThreeAddress()
191 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub; in convertToThreeAddress() local
196 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg) in convertToThreeAddress()
201 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) in convertToThreeAddress()
1784 bool isSub = NumBytes < 0; in emitARMRegPlusImmediate() local
1785 if (isSub) NumBytes = -NumBytes; in emitARMRegPlusImmediate()
1798 unsigned Opc = isSub ? ARM::SUBri : ARM::ADDri; in emitARMRegPlusImmediate()
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| D | ARMISelLowering.cpp | 7341 bool isSub = ARM_AM::getAM2Op(Offset) == ARM_AM::sub; in EmitInstrWithCustomInserter() local
7343 if (isSub) in EmitInstrWithCustomInserter()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 410 bool isSub = Opc == sub; variable
411 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
444 bool isSub = Opc == sub; variable
445 return ((int)isSub << 8) | Offset | (IdxMode << 9);
493 bool isSub = Opc == sub; in getAM5Opc() local
494 return ((int)isSub << 8) | Offset; in getAM5Opc()
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| /external/llvm/lib/Target/X86/ |
| D | X86FrameLowering.cpp | 150 bool isSub = NumBytes < 0; in emitSPUpdate() local
151 uint64_t Offset = isSub ? -NumBytes : NumBytes; in emitSPUpdate()
156 Opc = isSub in emitSPUpdate()
167 unsigned Reg = isSub in emitSPUpdate()
171 Opc = isSub in emitSPUpdate()
175 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)); in emitSPUpdate()
176 if (isSub) in emitSPUpdate()
187 StackPtr, false, isSub ? -ThisVal : ThisVal); in emitSPUpdate()
195 if (isSub) in emitSPUpdate()
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| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 317 bool isSub = OffImm < 0; in printThumbLdrLabelOperand() local
322 if (isSub) { in printThumbLdrLabelOperand()
1055 bool isSub = OffImm < 0; in printAddrModeImm12Operand() local
1059 if (isSub) { in printAddrModeImm12Operand()
1085 bool isSub = OffImm < 0; in printT2AddrModeImm8Operand() local
1089 if (isSub) { in printT2AddrModeImm8Operand()
1119 bool isSub = OffImm < 0; in printT2AddrModeImm8s4Operand() local
1126 if (isSub) { in printT2AddrModeImm8s4Operand()
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombine.h | 370 bool isSub, Instruction &I);
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| D | InstCombineAndOrXor.cpp | 341 ConstantInt *Mask, bool isSub, in FoldLogicalPlusAnd() argument
381 if (isSub) in FoldLogicalPlusAnd()
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| /external/clang/lib/CodeGen/ |
| D | CGExprScalar.cpp | 2329 bool isSub=false) { in tryEmitFMulAdd() argument
2349 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, false, isSub); in tryEmitFMulAdd()
2356 return buildFMulAdd(RHSBinOp, op.LHS, CGF, Builder, isSub, false); in tryEmitFMulAdd()
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| /external/valgrind/main/VEX/priv/ |
| D | guest_arm_toIR.c | 15977 UInt isSub = INSN0(9,9); in disInstr_THUMB_WRK() local
15982 putIRegT(rD, binop(isSub ? Iop_Sub32 : Iop_Add32, in disInstr_THUMB_WRK()
15985 setFlags_D1_D2( isSub ? ARMG_CC_OP_SUB : ARMG_CC_OP_ADD, in disInstr_THUMB_WRK()
15987 DIP("%s r%u, r%u, #%u\n", isSub ? "subs" : "adds", rD, rN, uimm3); in disInstr_THUMB_WRK()
15998 UInt isSub = INSN0(9,9); in disInstr_THUMB_WRK() local
16003 putIRegT( rD, binop(isSub ? Iop_Sub32 : Iop_Add32, in disInstr_THUMB_WRK()
16006 setFlags_D1_D2( isSub ? ARMG_CC_OP_SUB : ARMG_CC_OP_ADD, in disInstr_THUMB_WRK()
16008 DIP("%s r%u, r%u, r%u\n", isSub ? "subs" : "adds", rD, rN, rM); in disInstr_THUMB_WRK()
16151 UInt isSub = INSN0(11,11); in disInstr_THUMB_WRK() local
16158 putIRegT( rN, binop(isSub ? Iop_Sub32 : Iop_Add32, in disInstr_THUMB_WRK()
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