| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i915/ |
| D | i915_tex_layout.c | 115 i915_miptree_layout_cube(struct intel_mipmap_tree * mt) in i915_miptree_layout_cube() argument
117 const GLuint dim = mt->width0; in i915_miptree_layout_cube()
119 GLuint lvlWidth = mt->width0, lvlHeight = mt->height0; in i915_miptree_layout_cube()
125 mt->total_width = dim * 2; in i915_miptree_layout_cube()
126 mt->total_height = dim * 4; in i915_miptree_layout_cube()
128 for (level = mt->first_level; level <= mt->last_level; level++) { in i915_miptree_layout_cube()
129 intel_miptree_set_level_info(mt, level, in i915_miptree_layout_cube()
142 for (level = mt->first_level; level <= mt->last_level; level++) { in i915_miptree_layout_cube()
143 intel_miptree_set_image_offset(mt, level, face, x, y); in i915_miptree_layout_cube()
147 face, level, mt->first_level, mt->last_level); in i915_miptree_layout_cube()
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| D | intel_mipmap_tree.c | 87 struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1); in intel_miptree_create_internal() local
93 first_level, last_level, mt); in intel_miptree_create_internal()
98 mt->target = target_to_target(target); in intel_miptree_create_internal()
99 mt->format = format; in intel_miptree_create_internal()
100 mt->first_level = first_level; in intel_miptree_create_internal()
101 mt->last_level = last_level; in intel_miptree_create_internal()
102 mt->width0 = width0; in intel_miptree_create_internal()
103 mt->height0 = height0; in intel_miptree_create_internal()
104 mt->cpp = compress_byte ? compress_byte : _mesa_get_format_bytes(mt->format); in intel_miptree_create_internal()
105 mt->num_samples = num_samples; in intel_miptree_create_internal()
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| D | intel_tex_layout.c | 141 void i945_miptree_layout_2d(struct intel_mipmap_tree *mt) in i945_miptree_layout_2d() argument
146 GLuint width = mt->width0; in i945_miptree_layout_2d()
147 GLuint height = mt->height0; in i945_miptree_layout_2d()
148 GLuint depth = mt->depth0; /* number of array layers. */ in i945_miptree_layout_2d()
150 mt->total_width = mt->width0; in i945_miptree_layout_2d()
152 if (mt->compressed) { in i945_miptree_layout_2d()
153 mt->total_width = ALIGN(mt->width0, mt->align_w); in i945_miptree_layout_2d()
161 if (mt->first_level != mt->last_level) { in i945_miptree_layout_2d()
164 if (mt->compressed) { in i945_miptree_layout_2d()
165 mip1_width = ALIGN(minify(mt->width0), mt->align_w) in i945_miptree_layout_2d()
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| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| D | i915_tex_layout.c | 115 i915_miptree_layout_cube(struct intel_mipmap_tree * mt) in i915_miptree_layout_cube() argument
117 const GLuint dim = mt->width0; in i915_miptree_layout_cube()
119 GLuint lvlWidth = mt->width0, lvlHeight = mt->height0; in i915_miptree_layout_cube()
125 mt->total_width = dim * 2; in i915_miptree_layout_cube()
126 mt->total_height = dim * 4; in i915_miptree_layout_cube()
128 for (level = mt->first_level; level <= mt->last_level; level++) { in i915_miptree_layout_cube()
129 intel_miptree_set_level_info(mt, level, in i915_miptree_layout_cube()
142 for (level = mt->first_level; level <= mt->last_level; level++) { in i915_miptree_layout_cube()
143 intel_miptree_set_image_offset(mt, level, face, x, y); in i915_miptree_layout_cube()
147 face, level, mt->first_level, mt->last_level); in i915_miptree_layout_cube()
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| D | intel_mipmap_tree.c | 87 struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1); in intel_miptree_create_internal() local
93 first_level, last_level, mt); in intel_miptree_create_internal()
98 mt->target = target_to_target(target); in intel_miptree_create_internal()
99 mt->format = format; in intel_miptree_create_internal()
100 mt->first_level = first_level; in intel_miptree_create_internal()
101 mt->last_level = last_level; in intel_miptree_create_internal()
102 mt->width0 = width0; in intel_miptree_create_internal()
103 mt->height0 = height0; in intel_miptree_create_internal()
104 mt->cpp = compress_byte ? compress_byte : _mesa_get_format_bytes(mt->format); in intel_miptree_create_internal()
105 mt->num_samples = num_samples; in intel_miptree_create_internal()
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| D | intel_tex_layout.c | 141 void i945_miptree_layout_2d(struct intel_mipmap_tree *mt) in i945_miptree_layout_2d() argument
146 GLuint width = mt->width0; in i945_miptree_layout_2d()
147 GLuint height = mt->height0; in i945_miptree_layout_2d()
148 GLuint depth = mt->depth0; /* number of array layers. */ in i945_miptree_layout_2d()
150 mt->total_width = mt->width0; in i945_miptree_layout_2d()
152 if (mt->compressed) { in i945_miptree_layout_2d()
153 mt->total_width = ALIGN(mt->width0, mt->align_w); in i945_miptree_layout_2d()
161 if (mt->first_level != mt->last_level) { in i945_miptree_layout_2d()
164 if (mt->compressed) { in i945_miptree_layout_2d()
165 mip1_width = ALIGN(minify(mt->width0), mt->align_w) in i945_miptree_layout_2d()
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| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| D | brw_tex_layout.c | 44 struct intel_mipmap_tree *mt) in brw_miptree_layout_texture_array() argument
50 h0 = ALIGN(mt->height0, mt->align_h); in brw_miptree_layout_texture_array()
51 h1 = ALIGN(minify(mt->height0), mt->align_h); in brw_miptree_layout_texture_array()
52 if (mt->array_spacing_lod0) in brw_miptree_layout_texture_array()
55 qpitch = (h0 + h1 + (intel->gen >= 7 ? 12 : 11) * mt->align_h); in brw_miptree_layout_texture_array()
56 if (mt->compressed) in brw_miptree_layout_texture_array()
59 i945_miptree_layout_2d(mt); in brw_miptree_layout_texture_array()
61 for (level = mt->first_level; level <= mt->last_level; level++) { in brw_miptree_layout_texture_array()
62 for (q = 0; q < mt->depth0; q++) { in brw_miptree_layout_texture_array()
63 intel_miptree_set_image_offset(mt, level, q, 0, q * qpitch); in brw_miptree_layout_texture_array()
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| D | intel_mipmap_tree.c | 87 struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1); in intel_miptree_create_internal() local
93 first_level, last_level, mt); in intel_miptree_create_internal()
98 mt->target = target_to_target(target); in intel_miptree_create_internal()
99 mt->format = format; in intel_miptree_create_internal()
100 mt->first_level = first_level; in intel_miptree_create_internal()
101 mt->last_level = last_level; in intel_miptree_create_internal()
102 mt->width0 = width0; in intel_miptree_create_internal()
103 mt->height0 = height0; in intel_miptree_create_internal()
104 mt->cpp = compress_byte ? compress_byte : _mesa_get_format_bytes(mt->format); in intel_miptree_create_internal()
105 mt->num_samples = num_samples; in intel_miptree_create_internal()
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| D | intel_tex_layout.c | 141 void i945_miptree_layout_2d(struct intel_mipmap_tree *mt) in i945_miptree_layout_2d() argument
146 GLuint width = mt->width0; in i945_miptree_layout_2d()
147 GLuint height = mt->height0; in i945_miptree_layout_2d()
148 GLuint depth = mt->depth0; /* number of array layers. */ in i945_miptree_layout_2d()
150 mt->total_width = mt->width0; in i945_miptree_layout_2d()
152 if (mt->compressed) { in i945_miptree_layout_2d()
153 mt->total_width = ALIGN(mt->width0, mt->align_w); in i945_miptree_layout_2d()
161 if (mt->first_level != mt->last_level) { in i945_miptree_layout_2d()
164 if (mt->compressed) { in i945_miptree_layout_2d()
165 mip1_width = ALIGN(minify(mt->width0), mt->align_w) in i945_miptree_layout_2d()
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_tex_layout.c | 44 struct intel_mipmap_tree *mt) in brw_miptree_layout_texture_array() argument
50 h0 = ALIGN(mt->height0, mt->align_h); in brw_miptree_layout_texture_array()
51 h1 = ALIGN(minify(mt->height0), mt->align_h); in brw_miptree_layout_texture_array()
52 if (mt->array_spacing_lod0) in brw_miptree_layout_texture_array()
55 qpitch = (h0 + h1 + (intel->gen >= 7 ? 12 : 11) * mt->align_h); in brw_miptree_layout_texture_array()
56 if (mt->compressed) in brw_miptree_layout_texture_array()
59 i945_miptree_layout_2d(mt); in brw_miptree_layout_texture_array()
61 for (level = mt->first_level; level <= mt->last_level; level++) { in brw_miptree_layout_texture_array()
62 for (q = 0; q < mt->depth0; q++) { in brw_miptree_layout_texture_array()
63 intel_miptree_set_image_offset(mt, level, q, 0, q * qpitch); in brw_miptree_layout_texture_array()
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| D | intel_mipmap_tree.c | 87 struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1); in intel_miptree_create_internal() local
93 first_level, last_level, mt); in intel_miptree_create_internal()
98 mt->target = target_to_target(target); in intel_miptree_create_internal()
99 mt->format = format; in intel_miptree_create_internal()
100 mt->first_level = first_level; in intel_miptree_create_internal()
101 mt->last_level = last_level; in intel_miptree_create_internal()
102 mt->width0 = width0; in intel_miptree_create_internal()
103 mt->height0 = height0; in intel_miptree_create_internal()
104 mt->cpp = compress_byte ? compress_byte : _mesa_get_format_bytes(mt->format); in intel_miptree_create_internal()
105 mt->num_samples = num_samples; in intel_miptree_create_internal()
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| D | intel_tex_layout.c | 141 void i945_miptree_layout_2d(struct intel_mipmap_tree *mt) in i945_miptree_layout_2d() argument
146 GLuint width = mt->width0; in i945_miptree_layout_2d()
147 GLuint height = mt->height0; in i945_miptree_layout_2d()
148 GLuint depth = mt->depth0; /* number of array layers. */ in i945_miptree_layout_2d()
150 mt->total_width = mt->width0; in i945_miptree_layout_2d()
152 if (mt->compressed) { in i945_miptree_layout_2d()
153 mt->total_width = ALIGN(mt->width0, mt->align_w); in i945_miptree_layout_2d()
161 if (mt->first_level != mt->last_level) { in i945_miptree_layout_2d()
164 if (mt->compressed) { in i945_miptree_layout_2d()
165 mip1_width = ALIGN(minify(mt->width0), mt->align_w) in i945_miptree_layout_2d()
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| /external/mesa3d/src/gallium/drivers/nv50/ |
| D | nv50_miptree.c | 38 nv50_mt_choose_storage_type(struct nv50_miptree *mt, boolean compressed) in nv50_mt_choose_storage_type() argument
40 const unsigned ms = mt->ms_x + mt->ms_y; in nv50_mt_choose_storage_type()
44 if (unlikely(mt->base.base.flags & NOUVEAU_RESOURCE_FLAG_LINEAR)) in nv50_mt_choose_storage_type()
46 if (unlikely(mt->base.base.bind & PIPE_BIND_CURSOR)) in nv50_mt_choose_storage_type()
49 switch (mt->base.base.format) { in nv50_mt_choose_storage_type()
67 switch (util_format_get_blocksizebits(mt->base.base.format)) { in nv50_mt_choose_storage_type()
82 if (mt->base.base.bind & PIPE_BIND_SCANOUT) { in nv50_mt_choose_storage_type()
102 if (mt->base.base.bind & PIPE_BIND_CURSOR) in nv50_mt_choose_storage_type()
115 struct nv50_miptree *mt = nv50_miptree(pt); in nv50_miptree_destroy() local
117 nouveau_bo_ref(NULL, &mt->base.bo); in nv50_miptree_destroy()
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/ |
| D | nv50_miptree.c | 38 nv50_mt_choose_storage_type(struct nv50_miptree *mt, boolean compressed) in nv50_mt_choose_storage_type() argument
40 const unsigned ms = mt->ms_x + mt->ms_y; in nv50_mt_choose_storage_type()
44 if (unlikely(mt->base.base.flags & NOUVEAU_RESOURCE_FLAG_LINEAR)) in nv50_mt_choose_storage_type()
46 if (unlikely(mt->base.base.bind & PIPE_BIND_CURSOR)) in nv50_mt_choose_storage_type()
49 switch (mt->base.base.format) { in nv50_mt_choose_storage_type()
67 switch (util_format_get_blocksizebits(mt->base.base.format)) { in nv50_mt_choose_storage_type()
82 if (mt->base.base.bind & PIPE_BIND_SCANOUT) { in nv50_mt_choose_storage_type()
102 if (mt->base.base.bind & PIPE_BIND_CURSOR) in nv50_mt_choose_storage_type()
115 struct nv50_miptree *mt = nv50_miptree(pt); in nv50_miptree_destroy() local
117 nouveau_bo_ref(NULL, &mt->base.bo); in nv50_miptree_destroy()
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| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/intel/ |
| D | intel_mipmap_tree.c | 87 struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1); in intel_miptree_create_internal() local
93 first_level, last_level, mt); in intel_miptree_create_internal()
98 mt->target = target_to_target(target); in intel_miptree_create_internal()
99 mt->format = format; in intel_miptree_create_internal()
100 mt->first_level = first_level; in intel_miptree_create_internal()
101 mt->last_level = last_level; in intel_miptree_create_internal()
102 mt->width0 = width0; in intel_miptree_create_internal()
103 mt->height0 = height0; in intel_miptree_create_internal()
104 mt->cpp = compress_byte ? compress_byte : _mesa_get_format_bytes(mt->format); in intel_miptree_create_internal()
105 mt->num_samples = num_samples; in intel_miptree_create_internal()
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| D | intel_tex_layout.c | 141 void i945_miptree_layout_2d(struct intel_mipmap_tree *mt) in i945_miptree_layout_2d() argument
146 GLuint width = mt->width0; in i945_miptree_layout_2d()
147 GLuint height = mt->height0; in i945_miptree_layout_2d()
148 GLuint depth = mt->depth0; /* number of array layers. */ in i945_miptree_layout_2d()
150 mt->total_width = mt->width0; in i945_miptree_layout_2d()
152 if (mt->compressed) { in i945_miptree_layout_2d()
153 mt->total_width = ALIGN(mt->width0, mt->align_w); in i945_miptree_layout_2d()
161 if (mt->first_level != mt->last_level) { in i945_miptree_layout_2d()
164 if (mt->compressed) { in i945_miptree_layout_2d()
165 mip1_width = ALIGN(minify(mt->width0), mt->align_w) in i945_miptree_layout_2d()
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| /external/mesa3d/src/mesa/drivers/dri/intel/ |
| D | intel_mipmap_tree.c | 87 struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1); in intel_miptree_create_internal() local
93 first_level, last_level, mt); in intel_miptree_create_internal()
98 mt->target = target_to_target(target); in intel_miptree_create_internal()
99 mt->format = format; in intel_miptree_create_internal()
100 mt->first_level = first_level; in intel_miptree_create_internal()
101 mt->last_level = last_level; in intel_miptree_create_internal()
102 mt->width0 = width0; in intel_miptree_create_internal()
103 mt->height0 = height0; in intel_miptree_create_internal()
104 mt->cpp = compress_byte ? compress_byte : _mesa_get_format_bytes(mt->format); in intel_miptree_create_internal()
105 mt->num_samples = num_samples; in intel_miptree_create_internal()
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| D | intel_tex_layout.c | 141 void i945_miptree_layout_2d(struct intel_mipmap_tree *mt) in i945_miptree_layout_2d() argument
146 GLuint width = mt->width0; in i945_miptree_layout_2d()
147 GLuint height = mt->height0; in i945_miptree_layout_2d()
148 GLuint depth = mt->depth0; /* number of array layers. */ in i945_miptree_layout_2d()
150 mt->total_width = mt->width0; in i945_miptree_layout_2d()
152 if (mt->compressed) { in i945_miptree_layout_2d()
153 mt->total_width = ALIGN(mt->width0, mt->align_w); in i945_miptree_layout_2d()
161 if (mt->first_level != mt->last_level) { in i945_miptree_layout_2d()
164 if (mt->compressed) { in i945_miptree_layout_2d()
165 mip1_width = ALIGN(minify(mt->width0), mt->align_w) in i945_miptree_layout_2d()
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| /external/mesa3d/src/gallium/drivers/nvc0/ |
| D | nvc0_miptree.c | 60 nvc0_mt_choose_storage_type(struct nv50_miptree *mt, boolean compressed) in nvc0_mt_choose_storage_type() argument
62 const unsigned ms = util_logbase2(mt->base.base.nr_samples); in nvc0_mt_choose_storage_type()
68 if (unlikely(mt->base.base.bind & PIPE_BIND_CURSOR)) in nvc0_mt_choose_storage_type()
70 if (unlikely(mt->base.base.flags & NOUVEAU_RESOURCE_FLAG_LINEAR)) in nvc0_mt_choose_storage_type()
73 switch (mt->base.base.format) { in nvc0_mt_choose_storage_type()
106 switch (util_format_get_blocksizebits(mt->base.base.format)) { in nvc0_mt_choose_storage_type()
155 nvc0_miptree_init_ms_mode(struct nv50_miptree *mt) in nvc0_miptree_init_ms_mode() argument
157 switch (mt->base.base.nr_samples) { in nvc0_miptree_init_ms_mode()
159 mt->ms_mode = NVC0_3D_MULTISAMPLE_MODE_MS8; in nvc0_miptree_init_ms_mode()
160 mt->ms_x = 2; in nvc0_miptree_init_ms_mode()
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/ |
| D | nvc0_miptree.c | 60 nvc0_mt_choose_storage_type(struct nv50_miptree *mt, boolean compressed) in nvc0_mt_choose_storage_type() argument
62 const unsigned ms = util_logbase2(mt->base.base.nr_samples); in nvc0_mt_choose_storage_type()
68 if (unlikely(mt->base.base.bind & PIPE_BIND_CURSOR)) in nvc0_mt_choose_storage_type()
70 if (unlikely(mt->base.base.flags & NOUVEAU_RESOURCE_FLAG_LINEAR)) in nvc0_mt_choose_storage_type()
73 switch (mt->base.base.format) { in nvc0_mt_choose_storage_type()
106 switch (util_format_get_blocksizebits(mt->base.base.format)) { in nvc0_mt_choose_storage_type()
155 nvc0_miptree_init_ms_mode(struct nv50_miptree *mt) in nvc0_miptree_init_ms_mode() argument
157 switch (mt->base.base.nr_samples) { in nvc0_miptree_init_ms_mode()
159 mt->ms_mode = NVC0_3D_MULTISAMPLE_MODE_MS8; in nvc0_miptree_init_ms_mode()
160 mt->ms_x = 2; in nvc0_miptree_init_ms_mode()
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| /external/chromium_org/third_party/mt19937ar/ |
| D | mt19937ar.cc | 53 MersenneTwister::MersenneTwister() : mt(N), mti(N+1) { in MersenneTwister()
62 mt[0]= s & 0xffffffffUL; in init_genrand()
64 mt[mti] = in init_genrand()
65 (1812433253UL * (mt[mti-1] ^ (mt[mti-1] >> 30)) + mti); in init_genrand()
70 mt[mti] &= 0xffffffffUL; in init_genrand()
86 mt[i] = (mt[i] ^ ((mt[i-1] ^ (mt[i-1] >> 30)) * 1664525UL)) in init_by_array()
88 mt[i] &= 0xffffffffUL; /* for WORDSIZE > 32 machines */ in init_by_array()
90 if (i>=N) { mt[0] = mt[N-1]; i=1; } in init_by_array()
94 mt[i] = (mt[i] ^ ((mt[i-1] ^ (mt[i-1] >> 30)) * 1566083941UL)) in init_by_array()
96 mt[i] &= 0xffffffffUL; /* for WORDSIZE > 32 machines */ in init_by_array()
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| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| D | radeon_mipmap_tree.c | 127 static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree *mt, in compute_tex_image_offset() argument
130 radeon_mipmap_level *lvl = &mt->levels[level]; in compute_tex_image_offset()
135 …lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width, mt->tilebits, mt-… in compute_tex_image_offset()
136 …lvl->size = get_texture_image_size(mt->mesaFormat, lvl->rowstride, height, lvl->depth, mt->tilebit… in compute_tex_image_offset()
159 static void calculate_miptree_layout(radeonContextPtr rmesa, radeon_mipmap_tree *mt) in calculate_miptree_layout() argument
163 assert(mt->numLevels <= rmesa->glCtx->Const.MaxTextureLevels); in calculate_miptree_layout()
166 for(face = 0; face < mt->faces; face++) { in calculate_miptree_layout()
168 for(i = 0, level = mt->baseLevel; i < mt->numLevels; i++, level++) { in calculate_miptree_layout()
169 mt->levels[level].valid = 1; in calculate_miptree_layout()
170 mt->levels[level].width = minify(mt->width0, i); in calculate_miptree_layout()
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| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
| D | radeon_mipmap_tree.c | 127 static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree *mt, in compute_tex_image_offset() argument
130 radeon_mipmap_level *lvl = &mt->levels[level]; in compute_tex_image_offset()
135 …lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width, mt->tilebits, mt-… in compute_tex_image_offset()
136 …lvl->size = get_texture_image_size(mt->mesaFormat, lvl->rowstride, height, lvl->depth, mt->tilebit… in compute_tex_image_offset()
159 static void calculate_miptree_layout(radeonContextPtr rmesa, radeon_mipmap_tree *mt) in calculate_miptree_layout() argument
163 assert(mt->numLevels <= rmesa->glCtx->Const.MaxTextureLevels); in calculate_miptree_layout()
166 for(face = 0; face < mt->faces; face++) { in calculate_miptree_layout()
168 for(i = 0, level = mt->baseLevel; i < mt->numLevels; i++, level++) { in calculate_miptree_layout()
169 mt->levels[level].valid = 1; in calculate_miptree_layout()
170 mt->levels[level].width = minify(mt->width0, i); in calculate_miptree_layout()
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| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_mipmap_tree.c | 127 static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree *mt, in compute_tex_image_offset() argument
130 radeon_mipmap_level *lvl = &mt->levels[level]; in compute_tex_image_offset()
135 …lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width, mt->tilebits, mt-… in compute_tex_image_offset()
136 …lvl->size = get_texture_image_size(mt->mesaFormat, lvl->rowstride, height, lvl->depth, mt->tilebit… in compute_tex_image_offset()
159 static void calculate_miptree_layout(radeonContextPtr rmesa, radeon_mipmap_tree *mt) in calculate_miptree_layout() argument
163 assert(mt->numLevels <= rmesa->glCtx->Const.MaxTextureLevels); in calculate_miptree_layout()
166 for(face = 0; face < mt->faces; face++) { in calculate_miptree_layout()
168 for(i = 0, level = mt->baseLevel; i < mt->numLevels; i++, level++) { in calculate_miptree_layout()
169 mt->levels[level].valid = 1; in calculate_miptree_layout()
170 mt->levels[level].width = minify(mt->width0, i); in calculate_miptree_layout()
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| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
| D | radeon_mipmap_tree.c | 127 static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree *mt, in compute_tex_image_offset() argument
130 radeon_mipmap_level *lvl = &mt->levels[level]; in compute_tex_image_offset()
135 …lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width, mt->tilebits, mt-… in compute_tex_image_offset()
136 …lvl->size = get_texture_image_size(mt->mesaFormat, lvl->rowstride, height, lvl->depth, mt->tilebit… in compute_tex_image_offset()
159 static void calculate_miptree_layout(radeonContextPtr rmesa, radeon_mipmap_tree *mt) in calculate_miptree_layout() argument
163 assert(mt->numLevels <= rmesa->glCtx->Const.MaxTextureLevels); in calculate_miptree_layout()
166 for(face = 0; face < mt->faces; face++) { in calculate_miptree_layout()
168 for(i = 0, level = mt->baseLevel; i < mt->numLevels; i++, level++) { in calculate_miptree_layout()
169 mt->levels[level].valid = 1; in calculate_miptree_layout()
170 mt->levels[level].width = minify(mt->width0, i); in calculate_miptree_layout()
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