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/external/llvm/test/MC/AArch64/
Dneon-mov.s102 orr v0.2s, #1
103 orr v1.2s, #0
104 orr v0.2s, #1, lsl #8
105 orr v0.2s, #1, lsl #16
106 orr v0.2s, #1, lsl #24
107 orr v0.4s, #1
108 orr v0.4s, #1, lsl #8
109 orr v0.4s, #1, lsl #16
110 orr v0.4s, #1, lsl #24
111 orr v31.4h, #1
[all …]
Dneon-bitwise-instructions.s18 orr v0.8b, v1.8b, v2.8b
19 orr v0.16b, v1.16b, v2.16b
/external/libvpx/libvpx/vp8/common/arm/armv6/
Dloopfilter_v6.asm32 orr $b1, $b0, $b1, lsl #8 ; 12 02 10 00
33 orr $b3, $b2, $b3, lsl #8 ; 32 22 30 20
39 orr $a0, $a0, $a1, lsl #8 ; 13 03 11 01
40 orr $a2, $a2, $a3, lsl #8 ; 33 23 31 21
76 orr r4, r4, r4, lsl #8
78 orr r2, r2, r2, lsl #8
80 orr r4, r4, r4, lsl #16
81 orr r3, r3, r3, lsl #8
82 orr r2, r2, r2, lsl #16
83 orr r3, r3, r3, lsl #16
[all …]
Ddc_only_idct_add_v6.asm31 orr r0, r0, r0, lsl #16 ; a1 | a1
43 orr r5, r5, r4, lsl #8
44 orr r7, r7, r6, lsl #8
58 orr r5, r5, r4, lsl #8
59 orr r7, r7, r6, lsl #8
Dsimpleloopfilter_v6.asm30 orr $b1, $b0, $b1, lsl #8 ; 12 02 10 00
31 orr $b3, $b2, $b3, lsl #8 ; 32 22 30 20
37 orr $a0, $a0, $a1, lsl #8 ; 13 03 11 01
38 orr $a2, $a2, $a3, lsl #8 ; 33 23 31 21
66 orr r12, r12, r12, lsl #8 ; blimit
68 orr r12, r12, r12, lsl #16 ; blimit
183 orr r7, r7, r8 ; abs(p1 - q1)
184 orr r9, r9, r10 ; abs(p0 - q0)
Didct_v6.asm31 orr r4, r4, #0x0000008C ; sinpi8sqrt2
34 orr r5, r5, #0x0000007B ; cospi8sqrt2minus1
35 orr r5, r5, #1<<31 ; loop counter on top bit
/external/openssl/crypto/aes/asm/
Daes-armv4.S127 orr r0,r0,r4,lsl#8
129 orr r0,r0,r5,lsl#16
131 orr r0,r0,r6,lsl#24
134 orr r1,r1,r4,lsl#8
136 orr r1,r1,r5,lsl#16
138 orr r1,r1,r6,lsl#24
141 orr r2,r2,r4,lsl#8
143 orr r2,r2,r5,lsl#16
145 orr r2,r2,r6,lsl#24
148 orr r3,r3,r4,lsl#8
[all …]
/external/chromium_org/third_party/openssl/openssl/crypto/aes/asm/
Daes-armv4.S127 orr r0,r0,r4,lsl#8
129 orr r0,r0,r5,lsl#16
131 orr r0,r0,r6,lsl#24
134 orr r1,r1,r4,lsl#8
136 orr r1,r1,r5,lsl#16
138 orr r1,r1,r6,lsl#24
141 orr r2,r2,r4,lsl#8
143 orr r2,r2,r5,lsl#16
145 orr r2,r2,r6,lsl#24
148 orr r3,r3,r4,lsl#8
[all …]
/external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/
Dsha256-armv4.S44 orr r3,r3,r12,lsl#8
45 orr r3,r3,r2,lsl#16
46 orr r3,r3,r0,lsl#24
74 orr r0,r4,r5
78 orr r0,r0,r2 @ Maj(a,b,c)
88 orr r3,r3,r12,lsl#8
89 orr r3,r3,r2,lsl#16
90 orr r3,r3,r0,lsl#24
118 orr r0,r11,r4
122 orr r0,r0,r2 @ Maj(a,b,c)
[all …]
Dsha1-armv4-large.S27 orr r9,r9,r10,lsl#8
29 orr r9,r9,r11,lsl#16
31 orr r9,r9,r12,lsl#24
52 orr r9,r9,r10,lsl#8
54 orr r9,r9,r11,lsl#16
56 orr r9,r9,r12,lsl#24
77 orr r9,r9,r10,lsl#8
79 orr r9,r9,r11,lsl#16
81 orr r9,r9,r12,lsl#24
102 orr r9,r9,r10,lsl#8
[all …]
/external/openssl/crypto/sha/asm/
Dsha256-armv4.S44 orr r3,r3,r12,lsl#8
45 orr r3,r3,r2,lsl#16
46 orr r3,r3,r0,lsl#24
74 orr r0,r4,r5
78 orr r0,r0,r2 @ Maj(a,b,c)
88 orr r3,r3,r12,lsl#8
89 orr r3,r3,r2,lsl#16
90 orr r3,r3,r0,lsl#24
118 orr r0,r11,r4
122 orr r0,r0,r2 @ Maj(a,b,c)
[all …]
Dsha1-armv4-large.S27 orr r9,r9,r10,lsl#8
29 orr r9,r9,r11,lsl#16
31 orr r9,r9,r12,lsl#24
52 orr r9,r9,r10,lsl#8
54 orr r9,r9,r11,lsl#16
56 orr r9,r9,r12,lsl#24
77 orr r9,r9,r10,lsl#8
79 orr r9,r9,r11,lsl#16
81 orr r9,r9,r12,lsl#24
102 orr r9,r9,r10,lsl#8
[all …]
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-orr2.ll10 ; CHECK: orr r0, r0, #187
18 ; CHECK: orr r0, r0, #11141290
26 ; CHECK: orr r0, r0, #-872363008
34 ; CHECK: orr r0, r0, #1145324612
42 ; CHECK: orr r0, r0, #1114112
Dthumb2-orr.ll12 ; CHECK: orr.w r0, r0, r1, lsl #5
20 ; CHECK: orr.w r0, r0, r1, lsr #6
28 ; CHECK: orr.w r0, r0, r1, asr #7
36 ; CHECK: orr.w r0, r0, r0, ror #8
/external/llvm/test/CodeGen/AArch64/
Dlogical-imm.ll33 ; CHECK: orr {{w[0-9]+}}, {{w[0-9]+}}, #0xaaaaaaaa
37 ; CHECK: orr {{w[0-9]+}}, {{w[0-9]+}}, #0xfff0fff0
41 ; CHECK: orr {{x[0-9]+}}, {{x[0-9]+}}, #0x8181818181818181
45 ; CHECK: orr {{x[0-9]+}}, {{x[0-9]+}}, #0xffc3ffc3ffc3ffc3
76 ; CHECK: orr {{w[0-9]+}}, wzr, #0xaaaaaaaa
80 ; CHECK: orr {{x[0-9]+}}, xzr, #0x9999999999999999
Dneon-bitwise-instructions.ll18 ;CHECK: orr {{v[0-31]+}}.8b, {{v[0-31]+}}.8b, {{v[0-31]+}}.8b
24 ;CHECK: orr {{v[0-31]+}}.16b, {{v[0-31]+}}.16b, {{v[0-31]+}}.16b
87 ;CHECK: orr {{v[0-31]+}}.2s, #0xff
93 ;CHECK: orr {{v[0-31]+}}.2s, #0xff, lsl #8
99 ;CHECK: orr {{v[0-31]+}}.2s, #0xff, lsl #16
105 ;CHECK: orr {{v[0-31]+}}.2s, #0xff, lsl #24
111 ;CHECK: orr {{v[0-31]+}}.4s, #0xff
117 ;CHECK: orr {{v[0-31]+}}.4s, #0xff, lsl #8
123 ;CHECK: orr {{v[0-31]+}}.4s, #0xff, lsl #16
129 ;CHECK: orr {{v[0-31]+}}.4s, #0xff, lsl #24
[all …]
/external/llvm/test/MC/ARM/
Darm-arithmetic-aliases.s36 orr r2, r2, #6 label
37 orr r2, #6 label
38 orr r2, r2, r3 label
39 orr r2, r3 label
41 @ CHECK: orr r2, r2, #6 @ encoding: [0x06,0x20,0x82,0xe3]
42 @ CHECK: orr r2, r2, #6 @ encoding: [0x06,0x20,0x82,0xe3]
43 @ CHECK: orr r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe1]
44 @ CHECK: orr r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe1]
Darm-aliases.s8 orr r1, r2, r3, asr #0
15 @ CHECK: orr r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe1]
Dbasic-arm-instructions.s1271 orr r4, r5, #0xf000
1272 orr r4, r5, r6
1273 orr r4, r5, r6, lsl #5
1274 orr r4, r5, r6, lsr #5
1275 orr r4, r5, r6, lsr #5
1276 orr r4, r5, r6, asr #5
1277 orr r4, r5, r6, ror #5
1278 orr r6, r7, r8, lsl r9
1279 orr r6, r7, r8, lsr r9
1280 orr r6, r7, r8, asr r9
[all …]
/external/pixman/pixman/
Dpixman-arm-simd-asm.S124 orr SRC, SRC, lsl #16
132 orr SRC, SRC, lsl #8
133 orr SRC, SRC, lsl #16
184 orr&cond WK&reg, WK&reg, #0xFF000000
226 orr SCRATCH, SCRATCH, SCRATCH, lsr #6 @ 00000GGGGGGGGGGGG0000ggggggggggg
230 orr WK&reg1, WK&reg1, WK&reg1, lsr #5 @ rrrrrrrrrr0bbbbbbbbbb00000000000
231 orr WK&reg2, WK&reg2, WK&reg2, lsr #5 @ RRRRRRRRRR0BBBBBBBBBB00000000000
237 orr WK&reg1, STRIDE_M, WK&reg1, lsr #8 @ 11111111rrrrrrrrggggggggbbbbbbbb
238 orr WK&reg2, STRIDE_M, WK&reg2, lsr #8 @ 11111111RRRRRRRRGGGGGGGGBBBBBBBB
266 orr SCRATCH, SCRATCH, SCRATCH, lsr #5 @ 0000000000000rrrrrrrrrr0bbbbbbbb
[all …]
/external/llvm/test/CodeGen/ARM/
Dalloc-no-stack-realign.ll38 ; REALIGN: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
40 ; REALIGN: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
42 ; REALIGN: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
Dlong_shift.ll28 ; CHECK-NEXT: orr r0, r0, r1, lsl r3
41 ; CHECK-NEXT: orr r0, r0, r1, lsl r3
Dfast-isel-binary.ll51 ; ARM: orr r0, r0, r1
63 ; ARM: orr r0, r0, r1
75 ; ARM: orr r0, r0, r1
/external/skia/src/core/asm/
Ds32a_d565_opaque.S79 orr ip, r2, r1, lsl #11
80 orr r1, ip, r3, lsr #3
/external/libvpx/libvpx/vp8/encoder/arm/armv6/
Dvp8_mse16x16_armv6.asm54 orr r8, r8, r7 ; differences of all 4 pixels
75 orr r8, r8, r7 ; differences of all 4 pixels
94 orr r8, r8, r7 ; differences of all 4 pixels
117 orr r8, r8, r7 ; differences of all 4 pixels

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