/external/openssl/crypto/bn/asm/ |
D | ia64.S | 634 { .mmi; add r19=24,r34 641 ldf8 f123=[r19],32 };; 645 ldf8 f127=[r19] } 786 { .mfi; getf.sig r19=f53 809 add r19=r19,r18 };; 816 { .mfi; cmp.ltu p7,p0=r19,r18 818 add r20=r20,r19 };; 822 { .mfi; cmp.ltu p7,p0=r20,r19 868 { .mfi; getf.sig r19=f73 893 add r19=r19,r18 };; [all …]
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D | pa-risc2.s | 45 ; "caller save" registers: r1,r19-r26 115 m_1 .reg %r19 661 sub_tmp2 .reg %r19 777 AND %r25,%r19,%r26 ;offset 0x938 787 AND %r25,%r19,%r24 ;offset 0x958 823 DEPDI,Z -1,%sar,1,%r19 ;offset 0x9d0 824 CMPB,*>>,N %r4,%r19,$D2 ;offset 0x9d4 840 DEPDI,Z -1,31,32,%r19 ;offset 0xa08 841 AND %r3,%r19,%r29 ;offset 0xa0c 869 AND %r5,%r19,%r24 ;offset 0xa60
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D | pa-risc2W.s | 39 ; "caller save" registers: r1,r19-r26 107 m_1 .reg %r19 650 sub_tmp2 .reg %r19 786 SUBI 64,%r31,%r19 ; 64 - i; redundent 787 MTSAR %r19 ; (64 -i) to shift 793 DEPDI,Z -1,31,32,%r19 812 AND %r5,%r19,%r24 ; t & 0xffffffff00000000; 839 AND %r25,%r19,%r26 850 AND %r25,%r19,%r24 ;tl = (tl<<32)&0xfffffff0000000L
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/external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/ |
D | ia64.S | 634 { .mmi; add r19=24,r34 641 ldf8 f123=[r19],32 };; 645 ldf8 f127=[r19] } 786 { .mfi; getf.sig r19=f53 809 add r19=r19,r18 };; 816 { .mfi; cmp.ltu p7,p0=r19,r18 818 add r20=r20,r19 };; 822 { .mfi; cmp.ltu p7,p0=r20,r19 868 { .mfi; getf.sig r19=f73 893 add r19=r19,r18 };; [all …]
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D | pa-risc2.s | 45 ; "caller save" registers: r1,r19-r26 115 m_1 .reg %r19 661 sub_tmp2 .reg %r19 777 AND %r25,%r19,%r26 ;offset 0x938 787 AND %r25,%r19,%r24 ;offset 0x958 823 DEPDI,Z -1,%sar,1,%r19 ;offset 0x9d0 824 CMPB,*>>,N %r4,%r19,$D2 ;offset 0x9d4 840 DEPDI,Z -1,31,32,%r19 ;offset 0xa08 841 AND %r3,%r19,%r29 ;offset 0xa0c 869 AND %r5,%r19,%r24 ;offset 0xa60
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D | pa-risc2W.s | 39 ; "caller save" registers: r1,r19-r26 107 m_1 .reg %r19 650 sub_tmp2 .reg %r19 786 SUBI 64,%r31,%r19 ; 64 - i; redundent 787 MTSAR %r19 ; (64 -i) to shift 793 DEPDI,Z -1,31,32,%r19 812 AND %r5,%r19,%r24 ; t & 0xffffffff00000000; 839 AND %r25,%r19,%r26 850 AND %r25,%r19,%r24 ;tl = (tl<<32)&0xfffffff0000000L
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/external/clang/test/CXX/except/except.spec/ |
D | p3.cpp | 86 extern void (*r19)() throw(); 87 extern void (*r19)() noexcept(true);
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/external/oprofile/module/ia64/ |
D | IA64minstate.h | 237 .mem.offset 8, 0; st8.spill [r3]=r19, 16; \ 251 mov r19=b7; \ 269 st8 [r3]=r19, 16+8; /* b7 */ \ 279 DO_SAVE_MIN(cover, mov rCRIFS=cr.ifs, mov r15=r19)
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/external/llvm/test/Transforms/InstCombine/ |
D | fold-vector-zero.ll | 24 %r19 = inttoptr i64 %r18 to <2 x double>* 25 store <2 x double> %r15, <2 x double>* %r19, align 8
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/external/llvm/test/CodeGen/PowerPC/ |
D | r31.ll | 6 …{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r2…
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-regs.s | 23 #CHECK: .cfi_offset r19, 152 140 .cfi_offset r19,152
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonRegisterInfo.td | 83 def R19 : Ri<19, "r19">, DwarfRegNum<[19]>; 112 def D9 : Rd<18, "r19:18", [R18, R19]>, DwarfRegNum<[50]>;
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/external/openssl/crypto/ |
D | pariscid.pl | 57 xor %r0,%r0,%r19
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D | ia64cpuid.S | 86 { .mfi; mov r19=r0
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/external/chromium_org/third_party/openssl/openssl/crypto/ |
D | pariscid.pl | 57 xor %r0,%r0,%r19
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D | ia64cpuid.S | 86 { .mfi; mov r19=r0
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/external/libffi/src/powerpc/ |
D | aix.S | 46 .set r19,19 define
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D | aix_closure.S | 46 .set r19,19 define
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/external/openssl/crypto/aes/asm/ |
D | aes-ia64.S | 42 te00=r16; te11=r17; te22=r18; te33=r19; 377 shr.u r19=r16,twenty4 }//;; 395 st1 [out0]=r19,4 };; 754 shr.u r19=r16,twenty4 }//;; 772 st1 [out0]=r19,4 };;
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/external/chromium_org/third_party/openssl/openssl/crypto/aes/asm/ |
D | aes-ia64.S | 42 te00=r16; te11=r17; te22=r18; te33=r19; 377 shr.u r19=r16,twenty4 }//;; 395 st1 [out0]=r19,4 };; 754 shr.u r19=r16,twenty4 }//;; 772 st1 [out0]=r19,4 };;
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/external/chromium_org/third_party/openssl/openssl/crypto/rc4/asm/ |
D | rc4-parisc.pl | 77 @XX=("%r19","%r20");
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/external/openssl/crypto/rc4/asm/ |
D | rc4-parisc.pl | 77 @XX=("%r19","%r20");
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/external/libffi/src/sh64/ |
D | sysv.S | 91 ld.l r15, 0, r19 244 add r19, r63, r2
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/external/antlr/antlr-3.4/runtime/Python/tests/ |
D | t042ast.g | 98 r19
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
D | AMDILRegisterInfo.td | 41 def R19 : AMDILReg<19, "r19">, DwarfRegNum<[19]>;
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