/external/llvm/lib/Target/Sparc/ |
D | SparcInstrFormats.td | 82 bits<5> rs2; 89 let Inst{4-0} = rs2; 106 bits<5> rs2; 112 let Inst{4-0} = rs2; 115 // Shift by register rs2. 119 bits<5> rs2; 126 let Inst{4-0} = rs2; 146 def rr : F3_Sr<2, Op3Val, XVal, (outs RC:$rd), (ins RC:$rs, IntRegs:$rs2), 147 !strconcat(OpcStr, " $rs, $rs2, $rd"), 148 [(set VT:$rd, (OpNode VT:$rs, i32:$rs2))]>;
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D | SparcInstr64Bit.td | 186 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2), 187 "mulx $rs1, $rs2, $rd", 188 [(set i64:$rd, (mul i64:$rs1, i64:$rs2))]>; 197 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2), 198 "sdivx $rs1, $rs2, $rd", 199 [(set i64:$rd, (sdiv i64:$rs1, i64:$rs2))]>; 206 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2), 207 "udivx $rs1, $rs2, $rd", 208 [(set i64:$rd, (udiv i64:$rs1, i64:$rs2))]>; 322 (ins IntRegs:$rs2, IntRegs:$f, CCOp:$cond), [all …]
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D | SparcInstrInfo.td | 235 let rd = 0, rs1 = 0, rs2 = 0 in 719 : Pseudo<(outs IntRegs:$rd), (ins IntRegs:$rs2, IntRegs:$f, CCOp:$cc), 720 "mov$cc %icc, $rs2, $rd", 721 [(set i32:$rd, (SPselecticc i32:$rs2, i32:$f, imm:$cc))]>; 730 : Pseudo<(outs IntRegs:$rd), (ins IntRegs:$rs2, IntRegs:$f, CCOp:$cc), 731 "mov$cc %fcc0, $rs2, $rd", 732 [(set i32:$rd, (SPselectfcc i32:$rs2, i32:$f, imm:$cc))]>; 741 : Pseudo<(outs FPRegs:$rd), (ins FPRegs:$rs2, FPRegs:$f, CCOp:$cc), 742 "fmovs$cc %icc, $rs2, $rd", 743 [(set f32:$rd, (SPselecticc f32:$rs2, f32:$f, imm:$cc))]>; [all …]
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/external/dexmaker/src/dx/java/com/android/dx/dex/code/form/ |
D | Form12x.java | 82 RegisterSpec rs2; in isCompatible() local 87 rs2 = regs.get(1); in isCompatible() 96 rs2 = regs.get(2); in isCompatible() 108 unsignedFitsInNibble(rs2.getReg()); in isCompatible()
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/external/eigen/test/ |
D | schur_real.cpp | 63 RealSchur<MatrixType> rs2(A); in schur() local 65 VERIFY_IS_EQUAL(rs2.info(), Success); in schur() 66 VERIFY_IS_EQUAL(rs1.matrixT(), rs2.matrixT()); in schur() 67 VERIFY_IS_EQUAL(rs1.matrixU(), rs2.matrixU()); in schur()
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/external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/ |
D | sha1-sparcv9a.pl | 551 my ($mnemonic,$rs1,$rs2,$rd)=@_; 559 $ref = "$mnemonic\t$rs1,$rs2,$rd"; 562 foreach ($rs1,$rs2,$rd) { 573 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2, 580 my ($mnemonic,$rs1,$rs2,$rd)=@_; 582 my $ref="$mnemonic\t$rs1,$rs2,$rd"; 584 foreach ($rs1,$rs2,$rd) { 589 0x81b00300|$rd<<25|$rs1<<14|$rs2,
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/external/openssl/crypto/sha/asm/ |
D | sha1-sparcv9a.pl | 551 my ($mnemonic,$rs1,$rs2,$rd)=@_; 559 $ref = "$mnemonic\t$rs1,$rs2,$rd"; 562 foreach ($rs1,$rs2,$rd) { 573 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2, 580 my ($mnemonic,$rs1,$rs2,$rd)=@_; 582 my $ref="$mnemonic\t$rs1,$rs2,$rd"; 584 foreach ($rs1,$rs2,$rd) { 589 0x81b00300|$rd<<25|$rs1<<14|$rs2,
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/external/javasqlite/src/main/java/SQLite/JDBC2z/ |
D | JDBCDatabaseMetaData.java | 785 JDBCResultSet rs2 = null; in getBestRowIdentifier() local 787 rs2 = (JDBCResultSet) in getBestRowIdentifier() 794 if (rs2 == null || rs2.tr == null || rs2.tr.nrows <= 0) { in getBestRowIdentifier() 799 for (int k = 0; k < rs2.tr.ncolumns; k++) { in getBestRowIdentifier() 800 h2.put(rs2.tr.column[k], Integer.valueOf(k)); // android-changed in getBestRowIdentifier() 802 for (int k = 0; k < rs2.tr.nrows; k++) { in getBestRowIdentifier() 803 String r2[] = (String [])(rs2.tr.rows.elementAt(k)); in getBestRowIdentifier()
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/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.eclipse.test.performance.ui/src/org/eclipse/test/internal/performance/results/db/ |
D | DB_Results.java | 1104 ResultSet rs2 = this.fSQL.queryDimScalars(dp_id); 1105 while (rs2.next()) { 1106 int dim_id = rs2.getInt(1); 1108 BigDecimal decimalValue = rs2.getBigDecimal(2);
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/external/stlport/test/unit/ |
D | string_test.cpp | 1155 string& rs2 = s2; in oper_tmp() local 1157 CPPUNIT_CHECK( (mypath( string( "/root" ) ) / (rs1 + rs2)).str() == "/root/path1.ext" ); in oper_tmp()
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/external/qemu/tcg/sparc/ |
D | tcg-target.c | 286 static inline void tcg_out_arith(TCGContext *s, int rd, int rs1, int rs2, in tcg_out_arith() argument 290 INSN_RS2(rs2)); in tcg_out_arith()
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/external/llvm/docs/ |
D | WritingAnLLVMBackend.rst | 901 bits<5> rs2; 906 let Inst{4-0} = rs2; 909 ``F3_1`` binds the ``op3`` field and defines the ``rs2`` fields. ``F3_1`` 910 format instructions will bind the operands to the ``rd``, ``rs1``, and ``rs2`` 912 and ``$c`` operands to the ``rd``, ``rs1``, and ``rs2`` fields respectively.
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/external/hyphenation/ |
D | hyph_en_US.dic | 4319 4rs2
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