/external/libffi/src/frv/ |
D | eabi.S | 46 sti fp, @(sp, #24) 54 sti gr5, @(fp, #8) 55 sti gr8, @(fp, #-4) 56 sti gr9, @(fp, #-8) 57 sti gr10, @(fp, #-12) 58 sti gr11, @(fp, #-16) 59 sti gr12, @(fp, #-20) 60 sti gr13, @(fp, #-24) 111 sti gr8, @(gr4, #0) 112 sti gr9, @(gr4, #4) [all …]
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/external/llvm/lib/Target/X86/ |
D | X86FrameLowering.h | 56 explicit X86FrameLowering(const X86TargetMachine &tm, const X86Subtarget &sti) in X86FrameLowering() argument 58 sti.getStackAlignment(), in X86FrameLowering() 59 (sti.is64Bit() ? -8 : -4)), in X86FrameLowering() 60 TM(tm), STI(sti) { in X86FrameLowering()
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/external/llvm/lib/Target/ARM/ |
D | ARMRegisterInfo.cpp | 21 ARMRegisterInfo::ARMRegisterInfo(const ARMSubtarget &sti) in ARMRegisterInfo() argument 22 : ARMBaseRegisterInfo(sti) { in ARMRegisterInfo()
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D | ARMFrameLowering.h | 29 explicit ARMFrameLowering(const ARMSubtarget &sti) in ARMFrameLowering() argument 30 : TargetFrameLowering(StackGrowsDown, sti.getStackAlignment(), 0, 4), in ARMFrameLowering() 31 STI(sti) { in ARMFrameLowering()
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D | Thumb1FrameLowering.h | 29 explicit Thumb1FrameLowering(const ARMSubtarget &sti) in Thumb1FrameLowering() argument 30 : ARMFrameLowering(sti) { in Thumb1FrameLowering()
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D | Thumb2RegisterInfo.cpp | 27 Thumb2RegisterInfo::Thumb2RegisterInfo(const ARMSubtarget &sti) in Thumb2RegisterInfo() argument 28 : ARMBaseRegisterInfo(sti) { in Thumb2RegisterInfo()
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/external/llvm/lib/Target/Mips/ |
D | MipsFrameLowering.h | 29 explicit MipsFrameLowering(const MipsSubtarget &sti, unsigned Alignment) in MipsFrameLowering() argument 30 : TargetFrameLowering(StackGrowsDown, Alignment, 0, Alignment), STI(sti) {} in MipsFrameLowering()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCFrameLowering.h | 29 PPCFrameLowering(const PPCSubtarget &sti) in PPCFrameLowering() argument 31 (sti.hasQPX() || sti.isBGQ()) ? 32 : 16, 0), in PPCFrameLowering() 32 Subtarget(sti) { in PPCFrameLowering()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonFrameLowering.h | 25 explicit HexagonFrameLowering(const HexagonSubtarget &sti) in HexagonFrameLowering() argument 26 : TargetFrameLowering(StackGrowsDown, 8, 0), STI(sti) { in HexagonFrameLowering()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430FrameLowering.h | 29 explicit MSP430FrameLowering(const MSP430Subtarget &sti) in MSP430FrameLowering() argument 30 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 2, -2), STI(sti) { in MSP430FrameLowering()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64FrameLowering.h | 43 explicit AArch64FrameLowering(const AArch64Subtarget &sti) in AArch64FrameLowering() argument 45 STI(sti) { in AArch64FrameLowering()
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/external/kernel-headers/original/asm-x86/ |
D | irqflags_32.h | 107 #define ENABLE_INTERRUPTS(clobbers) sti 108 #define ENABLE_INTERRUPTS_SYSEXIT sti; sysexit
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/external/llvm/lib/Target/R600/MCTargetDesc/ |
D | R600MCCodeEmitter.cpp | 43 const MCSubtargetInfo &sti) in R600MCCodeEmitter() argument 44 : MCII(mcii), MRI(mri), STI(sti) { } in R600MCCodeEmitter()
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D | SIMCCodeEmitter.cpp | 51 const MCSubtargetInfo &sti, MCContext &ctx) in SIMCCodeEmitter() argument
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
D | SIMCCodeEmitter.cpp | 67 SIMCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti, in SIMCCodeEmitter() argument 69 : MCII(mcii), STI(sti), Ctx(ctx) { } in SIMCCodeEmitter()
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D | R600MCCodeEmitter.cpp | 48 R600MCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti, in R600MCCodeEmitter() argument 50 : MCII(mcii), STI(sti), Ctx(ctx) { } in R600MCCodeEmitter()
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
D | SIMCCodeEmitter.cpp | 67 SIMCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti, in SIMCCodeEmitter() argument 69 : MCII(mcii), STI(sti), Ctx(ctx) { } in SIMCCodeEmitter()
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D | R600MCCodeEmitter.cpp | 48 R600MCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti, in R600MCCodeEmitter() argument 50 : MCII(mcii), STI(sti), Ctx(ctx) { } in R600MCCodeEmitter()
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/external/llvm/lib/CodeGen/ |
D | TargetSchedule.cpp | 55 const TargetSubtargetInfo *sti, in init() argument 58 STI = sti; in init()
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/external/llvm/include/llvm/CodeGen/ |
D | TargetSchedule.h | 51 void init(const MCSchedModel &sm, const TargetSubtargetInfo *sti,
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZFrameLowering.h | 30 const SystemZSubtarget &sti);
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
D | PPCMCCodeEmitter.cpp | 40 PPCMCCodeEmitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti, in PPCMCCodeEmitter() argument 42 : STI(sti), CTX(ctx), TT(STI.getTargetTriple()) { in PPCMCCodeEmitter()
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsMCCodeEmitter.cpp | 45 const MCSubtargetInfo &sti, bool IsLittle) : in MipsMCCodeEmitter() argument 46 MCII(mcii), Ctx(Ctx_), STI (sti), IsLittleEndian(IsLittle) {} in MipsMCCodeEmitter()
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/external/kernel-headers/original/linux/ |
D | interrupt.h | 182 static inline void __deprecated sti(void) in sti() function
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/external/grub/stage2/ |
D | start_eltorito.S | 89 sti
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