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Searched refs:V4L2_CID_EXYNOS_BASE (Results 1 – 2 of 2) sorted by relevance

/hardware/samsung_slsi/exynos5/original-kernel-headers/linux/
Dvideodev2_exynos_media.h59 #define V4L2_CID_EXYNOS_BASE (V4L2_CTRL_CLASS_USER | 0x2000) macro
62 #define V4L2_CID_GLOBAL_ALPHA (V4L2_CID_EXYNOS_BASE + 1)
65 #define V4L2_CID_CACHEABLE (V4L2_CID_EXYNOS_BASE + 10)
68 #define V4L2_CID_CAM_JPEG_MEMSIZE (V4L2_CID_EXYNOS_BASE + 20)
69 #define V4L2_CID_CAM_JPEG_ENCODEDSIZE (V4L2_CID_EXYNOS_BASE + 21)
71 #define V4L2_CID_SET_SHAREABLE (V4L2_CID_EXYNOS_BASE + 40)
74 #define V4L2_CID_TV_LAYER_BLEND_ENABLE (V4L2_CID_EXYNOS_BASE + 50)
75 #define V4L2_CID_TV_LAYER_BLEND_ALPHA (V4L2_CID_EXYNOS_BASE + 51)
76 #define V4L2_CID_TV_PIXEL_BLEND_ENABLE (V4L2_CID_EXYNOS_BASE + 52)
77 #define V4L2_CID_TV_CHROMA_ENABLE (V4L2_CID_EXYNOS_BASE + 53)
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/hardware/samsung_slsi/exynos5/include/
Dvideodev2_exynos_media.h42 #define V4L2_CID_EXYNOS_BASE (V4L2_CTRL_CLASS_USER | 0x2000) macro
44 #define V4L2_CID_GLOBAL_ALPHA (V4L2_CID_EXYNOS_BASE + 1)
45 #define V4L2_CID_CACHEABLE (V4L2_CID_EXYNOS_BASE + 10)
46 #define V4L2_CID_CAM_JPEG_MEMSIZE (V4L2_CID_EXYNOS_BASE + 20)
47 #define V4L2_CID_CAM_JPEG_ENCODEDSIZE (V4L2_CID_EXYNOS_BASE + 21)
49 #define V4L2_CID_SET_SHAREABLE (V4L2_CID_EXYNOS_BASE + 40)
50 #define V4L2_CID_TV_LAYER_BLEND_ENABLE (V4L2_CID_EXYNOS_BASE + 50)
51 #define V4L2_CID_TV_LAYER_BLEND_ALPHA (V4L2_CID_EXYNOS_BASE + 51)
52 #define V4L2_CID_TV_PIXEL_BLEND_ENABLE (V4L2_CID_EXYNOS_BASE + 52)
54 #define V4L2_CID_TV_CHROMA_ENABLE (V4L2_CID_EXYNOS_BASE + 53)
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