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Searched refs:InstrInfo (Results 1 – 25 of 56) sorted by relevance

123

/external/llvm/lib/Target/Mips/
DMipsTargetMachine.cpp71 InstrInfo(MipsInstrInfo::create(*this)), in MipsTargetMachine()
80 InstrInfoSE.swap(InstrInfo); in setHelperClassesMips16()
84 InstrInfo.reset(MipsInstrInfo::create(*this)); in setHelperClassesMips16()
88 InstrInfo16.swap(InstrInfo); in setHelperClassesMips16()
93 assert(InstrInfo && "null instr info 16"); in setHelperClassesMips16()
98 InstrInfo16.swap(InstrInfo); in setHelperClassesMipsSE()
102 InstrInfo.reset(MipsInstrInfo::create(*this)); in setHelperClassesMipsSE()
106 InstrInfoSE.swap(InstrInfo); in setHelperClassesMipsSE()
111 assert(InstrInfo && "null instr info SE"); in setHelperClassesMipsSE()
DMipsTargetMachine.h37 OwningPtr<const MipsInstrInfo> InstrInfo; variable
62 { return InstrInfo.get(); } in getInstrInfo()
78 return &InstrInfo->getRegisterInfo(); in getRegisterInfo()
/external/llvm/lib/Target/ARM/
DARMTargetMachine.h70 ARMInstrInfo InstrInfo; variable
83 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
96 virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; } in getInstrInfo()
107 OwningPtr<ARMBaseInstrInfo> InstrInfo; variable
122 return &InstrInfo->getRegisterInfo(); in getRegisterInfo()
135 return InstrInfo.get(); in getInstrInfo()
DARMTargetMachine.cpp76 InstrInfo(Subtarget), in ARMTargetMachine()
102 InstrInfo(Subtarget.hasThumb2() in ThumbTargetMachine()
/external/llvm/lib/Target/AArch64/
DAArch64TargetMachine.h29 AArch64InstrInfo InstrInfo; variable
42 return &InstrInfo; in getInstrInfo()
62 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/external/llvm/lib/Target/MSP430/
DMSP430TargetMachine.h35 MSP430InstrInfo InstrInfo; variable
49 virtual const MSP430InstrInfo *getInstrInfo() const { return &InstrInfo; } in getInstrInfo()
54 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
DMSP430TargetMachine.cpp38 InstrInfo(*this), TLInfo(*this), TSInfo(*this), in MSP430TargetMachine()
/external/llvm/lib/Target/XCore/
DXCoreTargetMachine.h30 XCoreInstrInfo InstrInfo; variable
40 virtual const XCoreInstrInfo *getInstrInfo() const { return &InstrInfo; } in getInstrInfo()
54 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
DXCoreTargetMachine.cpp32 InstrInfo(), in XCoreTargetMachine()
/external/llvm/lib/Target/SystemZ/
DSystemZTargetMachine.h33 SystemZInstrInfo InstrInfo; variable
49 return &InstrInfo; in getInstrInfo()
58 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
DAMDGPUTargetMachine.h35 const AMDGPUInstrInfo * InstrInfo; variable
53 virtual const AMDGPUInstrInfo *getInstrInfo() const {return InstrInfo;} in getInstrInfo()
56 return &InstrInfo->getRegisterInfo(); in getRegisterInfo()
DAMDGPUTargetMachine.cpp60 InstrInfo = new R600InstrInfo(*this); in AMDGPUTargetMachine()
63 InstrInfo = new SIInstrInfo(*this); in AMDGPUTargetMachine()
/external/llvm/lib/Target/R600/
DAMDGPUTargetMachine.h34 OwningPtr<AMDGPUInstrInfo> InstrInfo; variable
50 return InstrInfo.get(); in getInstrInfo()
54 return &InstrInfo->getRegisterInfo(); in getRegisterInfo()
DAMDGPUTargetMachine.cpp67 InstrInfo.reset(new R600InstrInfo(*this)); in AMDGPUTargetMachine()
70 InstrInfo.reset(new SIInstrInfo(*this)); in AMDGPUTargetMachine()
/external/llvm/lib/Target/Hexagon/
DHexagonTargetMachine.h32 HexagonInstrInfo InstrInfo; variable
45 return &InstrInfo; in getInstrInfo()
51 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUTargetMachine.h35 const AMDGPUInstrInfo * InstrInfo; variable
53 virtual const AMDGPUInstrInfo *getInstrInfo() const {return InstrInfo;} in getInstrInfo()
56 return &InstrInfo->getRegisterInfo(); in getRegisterInfo()
DAMDGPUTargetMachine.cpp60 InstrInfo = new R600InstrInfo(*this); in AMDGPUTargetMachine()
63 InstrInfo = new SIInstrInfo(*this); in AMDGPUTargetMachine()
/external/llvm/lib/Target/X86/
DX86TargetMachine.h82 X86InstrInfo InstrInfo; variable
99 return &InstrInfo; in getInstrInfo()
111 X86InstrInfo InstrInfo; variable
128 return &InstrInfo; in getInstrInfo()
DX86TargetMachine.cpp48 InstrInfo(*this), in X86_32TargetMachine()
69 InstrInfo(*this), in X86_64TargetMachine()
/external/valgrind/main/callgrind/
Dglobal.h280 typedef struct _InstrInfo InstrInfo; typedef
340 InstrInfo instr[0]; /* info on instruction sizes and costs */
665 void (*add_icost)(SimCost, BBCC*, InstrInfo*, ULong);
668 void (*log_1I0D)(InstrInfo*) VG_REGPARM(1);
669 void (*log_2I0D)(InstrInfo*, InstrInfo*) VG_REGPARM(2);
670 void (*log_3I0D)(InstrInfo*, InstrInfo*, InstrInfo*) VG_REGPARM(3);
672 void (*log_1I1Dr)(InstrInfo*, Addr, Word) VG_REGPARM(3);
673 void (*log_1I1Dw)(InstrInfo*, Addr, Word) VG_REGPARM(3);
675 void (*log_0I1Dr)(InstrInfo*, Addr, Word) VG_REGPARM(3);
676 void (*log_0I1Dw)(InstrInfo*, Addr, Word) VG_REGPARM(3);
Dmain.c109 static void log_global_event(InstrInfo* ii) in log_global_event()
136 void log_cond_branch(InstrInfo* ii, Word taken) in log_cond_branch()
166 void log_ind_branch(InstrInfo* ii, UWord actual_dst) in log_ind_branch()
247 InstrInfo* inode;
599 static void addEvent_Ir ( ClgState* clgs, InstrInfo* inode ) in addEvent_Ir()
616 void addEvent_Dr ( ClgState* clgs, InstrInfo* inode, Int datasize, IRAtom* ea ) in addEvent_Dr()
637 void addEvent_Dw ( ClgState* clgs, InstrInfo* inode, Int datasize, IRAtom* ea ) in addEvent_Dw()
672 void addEvent_Bc ( ClgState* clgs, InstrInfo* inode, IRAtom* guard ) in addEvent_Bc()
692 void addEvent_Bi ( ClgState* clgs, InstrInfo* inode, IRAtom* whereTo ) in addEvent_Bi()
712 void addEvent_G ( ClgState* clgs, InstrInfo* inode ) in addEvent_G()
[all …]
/external/llvm/lib/Target/Sparc/
DSparcTargetMachine.h31 SparcInstrInfo InstrInfo; variable
41 virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; } in getInstrInfo()
47 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
/external/valgrind/main/cachegrind/
Dcg_main.c149 typedef struct _InstrInfo InstrInfo; typedef
160 InstrInfo instrs[0];
300 void log_1I(InstrInfo* n) in log_1I()
307 void log_2I(InstrInfo* n, InstrInfo* n2) in log_2I()
315 void log_3I(InstrInfo* n, InstrInfo* n2, InstrInfo* n3) in log_3I()
323 void log_1I_0D_cache_access(InstrInfo* n) in log_1I_0D_cache_access()
333 void log_2I_0D_cache_access(InstrInfo* n, InstrInfo* n2) in log_2I_0D_cache_access()
348 void log_3I_0D_cache_access(InstrInfo* n, InstrInfo* n2, InstrInfo* n3) in log_3I_0D_cache_access()
368 void log_1I_1Dr_cache_access(InstrInfo* n, Addr data_addr, Word data_size) in log_1I_1Dr_cache_access()
383 void log_1I_1Dw_cache_access(InstrInfo* n, Addr data_addr, Word data_size) in log_1I_1Dw_cache_access()
[all …]
/external/llvm/lib/Target/NVPTX/
DNVPTXTargetMachine.h35 NVPTXInstrInfo InstrInfo; variable
57 virtual const NVPTXInstrInfo *getInstrInfo() const { return &InstrInfo; } in getInstrInfo()
62 return &(InstrInfo.getRegisterInfo()); in getRegisterInfo()
/external/llvm/lib/Target/PowerPC/
DPPCTargetMachine.h33 PPCInstrInfo InstrInfo; variable
46 virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; } in getInstrInfo()
58 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()

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