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/external/chromium_org/third_party/openssl/openssl/patches/
Dneon_runtime.patch152 + ldr r4, [r7, #196]
153 + ldr r6, [r7, #400]
154 + ldr r2, .L38+16
156 + ldr r6, [r6, #0]
157 + ldr r8, [r7, #400]
169 + ldr r4, [r8, #4]
170 + ldr r5, [r7, #244]
174 + ldr r9, [r7, #200]
175 + ldr r8, [r7, #404]
176 + ldr r5, [r7, #176]
[all …]
/external/llvm/test/CodeGen/ARM/
Dload-global.ll12 ; STATIC: ldr r0, LCPI0_0
13 ; STATIC: ldr r0, [r0]
17 ; DYNAMIC: ldr r0, LCPI0_0
18 ; DYNAMIC: ldr r0, [r0]
19 ; DYNAMIC: ldr r0, [r0]
23 ; PIC: ldr r0, LCPI0_0
24 ; PIC: ldr r0, [pc, r0]
25 ; PIC: ldr r0, [r0]
29 ; PIC_T: ldr r0, LCPI0_0
31 ; PIC_T: ldr r0, [r0]
[all …]
Dfast-isel-pic.ll16 ; THUMB-ELF: ldr r[[reg0:[0-9]+]],
17 ; THUMB-ELF: ldr r[[reg1:[0-9]+]],
18 ; THUMB-ELF: ldr r[[reg0]], [r[[reg0]], r[[reg1]]]
20 ; ARM: ldr [[reg1:r[0-9]+]],
27 ; ARMv7-ELF: ldr r[[reg2:[0-9]+]],
28 ; ARMv7-ELF: ldr r[[reg3:[0-9]+]],
29 ; ARMv7-ELF: ldr r[[reg2]], [r[[reg3]], r[[reg2]]]
42 ; THUMB: ldr r[[reg3]], [r[[reg3]]]
44 ; THUMB-ELF: ldr r[[reg3:[0-9]+]],
45 ; THUMB-ELF: ldr r[[reg4:[0-9]+]],
[all …]
Dglobals.ll14 ; DarwinStatic: ldr r0, LCPI0_0
15 ; DarwinStatic: ldr r0, [r0]
24 ; DarwinDynamic: ldr r0, LCPI0_0
25 ; DarwinDynamic: ldr r0, [r0]
26 ; DarwinDynamic: ldr r0, [r0]
42 ; DarwinPIC: ldr r0, LCPI0_0
44 ; DarwinPIC: ldr r0, [pc, r0]
45 ; DarwinPIC: ldr r0, [r0]
61 ; LinuxPIC: ldr r0, .LCPI0_0
62 ; LinuxPIC: ldr r1, .LCPI0_1
[all …]
Dfast-isel-intrinsic.ll17 ; ARM: {{(movw r0, :lower16:_?message1)|(ldr r0, .LCPI)}}
18 ; ARM: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}}
25 ; ARM-LONG: {{(movw r3, :lower16:L_memset\$non_lazy_ptr)|(ldr r3, .LCPI)}}
27 ; ARM-LONG: ldr r3, [r3]
30 ; THUMB: {{(movw r0, :lower16:_?message1)|(ldr.n r0, .LCPI)}}
31 ; THUMB: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}}
42 ; THUMB-LONG: ldr r3, [r3]
52 ; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
54 ; ARM: ldr r0, [r0]
60 ; ARM: ldr r1, [sp[[SLOT]]] @ 4-byte Reload
[all …]
Dfast-isel-frameaddr.ll38 ; DARWIN-ARM: ldr r0, [r0]
44 ; DARWIN-THUMB2: ldr r0, [r0]
49 ; LINUX-ARM: ldr r0, [r11]
55 ; LINUX-THUMB2: ldr r0, [r0]
67 ; DARWIN-ARM: ldr r0, [r0]
68 ; DARWIN-ARM: ldr r0, [r0]
69 ; DARWIN-ARM: ldr r0, [r0]
75 ; DARWIN-THUMB2: ldr r0, [r0]
76 ; DARWIN-THUMB2: ldr r0, [r0]
77 ; DARWIN-THUMB2: ldr r0, [r0]
[all …]
/external/llvm/test/MC/ARM/
Darm-memory-instructions.s14 ldr r5, [r7]
15 ldr r6, [r3, #63]
16 ldr r2, [r4, #4095]!
17 ldr r1, [r2], #30
18 ldr r3, [r1], #-30
19 ldr r9, [r2], #-0
21 @ CHECK: ldr r5, [r7] @ encoding: [0x00,0x50,0x97,0xe5]
22 @ CHECK: ldr r6, [r3, #63] @ encoding: [0x3f,0x60,0x93,0xe5]
23 @ CHECK: ldr r2, [r4, #4095]! @ encoding: [0xff,0x2f,0xb4,0xe5]
24 @ CHECK: ldr r1, [r2], #30 @ encoding: [0x1e,0x10,0x92,0xe4]
[all …]
Darm-shift-encoding.s3 ldr r0, [r0, r0]
4 ldr r0, [r0, r0, lsr #32]
5 ldr r0, [r0, r0, lsr #16]
6 ldr r0, [r0, r0, lsl #0]
7 ldr r0, [r0, r0, lsl #16]
8 ldr r0, [r0, r0, asr #32]
9 ldr r0, [r0, r0, asr #16]
10 ldr r0, [r0, r0, rrx]
11 ldr r0, [r0, r0, ror #16]
13 @ CHECK: ldr r0, [r0, r0] @ encoding: [0x00,0x00,0x90,0xe7]
[all …]
/external/valgrind/main/coregrind/m_syswrap/
Dsyscall-arm-linux.S88 ldr r3, [sp, #32] /* nsigwords */
92 ldr r5, [sp, #4] /* guest_state */
94 ldr r7, [sp, #0] /* syscall# */
95 ldr r0, [r5, #OFFSET_arm_R0]
96 ldr r1, [r5, #OFFSET_arm_R1]
97 ldr r2, [r5, #OFFSET_arm_R2]
98 ldr r3, [r5, #OFFSET_arm_R3]
99 ldr r4, [r5, #OFFSET_arm_R4]
100 ldr r5, [r5, #OFFSET_arm_R5]
104 ldr r5, [sp, #4] /* guest_state */
[all …]
/external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/
Darmv4-mont.S9 ldr r0,[sp,#3*4] @ load num
24 ldr r8,[r0,#14*4] @ &n0
25 ldr r2,[r2] @ bp[0]
26 ldr r5,[r1],#4 @ ap[0],ap++
27 ldr r6,[r3],#4 @ np[0],np++
28 ldr r8,[r8] @ *n0
39 ldr r5,[r1],#4 @ ap[j],ap++
41 ldr r6,[r3],#4 @ np[j],np++
53 ldr r4,[r0,#13*4] @ restore bp
55 ldr r8,[r0,#14*4] @ restore n0
[all …]
/external/openssl/crypto/bn/asm/
Darmv4-mont.S9 ldr r0,[sp,#3*4] @ load num
24 ldr r8,[r0,#14*4] @ &n0
25 ldr r2,[r2] @ bp[0]
26 ldr r5,[r1],#4 @ ap[0],ap++
27 ldr r6,[r3],#4 @ np[0],np++
28 ldr r8,[r8] @ *n0
39 ldr r5,[r1],#4 @ ap[j],ap++
41 ldr r6,[r3],#4 @ np[j],np++
53 ldr r4,[r0,#13*4] @ restore bp
55 ldr r8,[r0,#14*4] @ restore n0
[all …]
/external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/
Dsha1-armv4-large.S14 ldr r8,.LK_00_19
33 ldr r9,[r1],#4 @ handles unaligned
58 ldr r9,[r1],#4 @ handles unaligned
83 ldr r9,[r1],#4 @ handles unaligned
108 ldr r9,[r1],#4 @ handles unaligned
133 ldr r9,[r1],#4 @ handles unaligned
161 ldr r9,[r1],#4 @ handles unaligned
174 ldr r9,[r14,#15*4]
175 ldr r10,[r14,#13*4]
176 ldr r11,[r14,#7*4]
[all …]
Dsha256-armv4.S38 ldr r3,[r1],#4
49 ldr r12,[r14],#4 @ *K256++
72 ldr r1,[sp,#2*4] @ from BODY_16_xx
82 ldr r3,[r1],#4
93 ldr r12,[r14],#4 @ *K256++
116 ldr r1,[sp,#3*4] @ from BODY_16_xx
126 ldr r3,[r1],#4
137 ldr r12,[r14],#4 @ *K256++
160 ldr r1,[sp,#4*4] @ from BODY_16_xx
170 ldr r3,[r1],#4
[all …]
/external/openssl/crypto/sha/asm/
Dsha1-armv4-large.S14 ldr r8,.LK_00_19
33 ldr r9,[r1],#4 @ handles unaligned
58 ldr r9,[r1],#4 @ handles unaligned
83 ldr r9,[r1],#4 @ handles unaligned
108 ldr r9,[r1],#4 @ handles unaligned
133 ldr r9,[r1],#4 @ handles unaligned
161 ldr r9,[r1],#4 @ handles unaligned
174 ldr r9,[r14,#15*4]
175 ldr r10,[r14,#13*4]
176 ldr r11,[r14,#7*4]
[all …]
Dsha256-armv4.S38 ldr r3,[r1],#4
49 ldr r12,[r14],#4 @ *K256++
72 ldr r1,[sp,#2*4] @ from BODY_16_xx
82 ldr r3,[r1],#4
93 ldr r12,[r14],#4 @ *K256++
116 ldr r1,[sp,#3*4] @ from BODY_16_xx
126 ldr r3,[r1],#4
137 ldr r12,[r14],#4 @ *K256++
160 ldr r1,[sp,#4*4] @ from BODY_16_xx
170 ldr r3,[r1],#4
[all …]
/external/llvm/test/CodeGen/AArch64/
Dinline-asm-modifiers.ll14 call void asm sideeffect "ldr x0, [x0, ${0:L}]", "S,~{x0}"(i32* @var_got)
17 call void asm sideeffect "ldr x0, [x0, ${0:L}]", "S,~{x0}"(i32* @var_tlsie)
20 ; CHECK: ldr x0, [x0, #:got_lo12:var_got]
23 ; CHECK: ldr x0, [x0, #:gottprel_lo12:var_tlsie]
95 call float asm sideeffect "ldr ${0:b}, [sp]", "=w"()
96 call float asm sideeffect "ldr ${0:h}, [sp]", "=w"()
97 call float asm sideeffect "ldr ${0:s}, [sp]", "=w"()
98 call float asm sideeffect "ldr ${0:d}, [sp]", "=w"()
99 call float asm sideeffect "ldr ${0:q}, [sp]", "=w"()
100 ; CHECK: ldr b0, [sp]
[all …]
/external/openssl/crypto/aes/asm/
Daes-armv4.S152 ldr r0,[r12,#0]
153 ldr r1,[r12,#4]
154 ldr r2,[r12,#8]
155 ldr r3,[r12,#12]
165 ldr r12,[sp],#4 @ pop out
223 ldr r12,[r11,#240-16]
235 ldr r4,[r10,r7,lsl#2] @ Te3[s0>>0]
237 ldr r5,[r10,r8,lsl#2] @ Te2[s0>>8]
239 ldr r6,[r10,r9,lsl#2] @ Te1[s0>>16]
241 ldr r0,[r10,r0,lsl#2] @ Te0[s0>>24]
[all …]
/external/chromium_org/third_party/openssl/openssl/crypto/aes/asm/
Daes-armv4.S152 ldr r0,[r12,#0]
153 ldr r1,[r12,#4]
154 ldr r2,[r12,#8]
155 ldr r3,[r12,#12]
165 ldr r12,[sp],#4 @ pop out
223 ldr r12,[r11,#240-16]
235 ldr r4,[r10,r7,lsl#2] @ Te3[s0>>0]
237 ldr r5,[r10,r8,lsl#2] @ Te2[s0>>8]
239 ldr r6,[r10,r9,lsl#2] @ Te1[s0>>16]
241 ldr r0,[r10,r0,lsl#2] @ Te0[s0>>24]
[all …]
/external/libvpx/libvpx/vp8/encoder/arm/armv5te/
Dvp8_packtokens_partitions_armv5.asm29 ldr r2, [r0, #vp8_writer_buffer_end]
30 ldr r3, [r0, #vp8_writer_error]
50 ldr r4, _VP8_COMP_common_
51 ldr r6, _VP8_COMMON_MBrows_
54 ldr r5, [r4, r6] ; load up mb_rows
61 ldr r4, _VP8_COMP_tplist_
63 ldr r7, [r4, #0] ; dereference cpi->tp_list
66 ldr r11, _VP8_COMP_bc_ ; load up vp8_writer out of cpi
73 ldr r2, _vp8_writer_sz_ ; load up sizeof(vp8_writer)
76 ldr r10, [sp, #24] ; ptr
[all …]
Dvp8_packtokens_mbrow_armv5.asm30 ldr r2, [r0, #vp8_writer_buffer_end]
31 ldr r3, [r0, #vp8_writer_error]
49 ldr r4, _VP8_COMP_common_
50 ldr r6, _VP8_COMMON_MBrows_
53 ldr r5, [r4, r6] ; load up mb_rows
59 ldr r4, _VP8_COMP_tplist_
61 ldr r7, [r4, #0] ; dereference cpi->tp_list
65 ldr r2, [r0, #vp8_writer_lowvalue]
66 ldr r5, [r0, #vp8_writer_range]
67 ldr r3, [r0, #vp8_writer_count]
[all …]
Dvp8_packtokens_armv5.asm30 ldr r2, [r0, #vp8_writer_buffer_end]
31 ldr r3, [r0, #vp8_writer_error]
54 ldr r2, [r0, #vp8_writer_lowvalue]
55 ldr r5, [r0, #vp8_writer_range]
56 ldr r3, [r0, #vp8_writer_count]
61 ldr r4, [sp, #8] ; vp8_coef_encodings
64 ldr r9, [r1, #tokenextra_context_tree] ; pp
68 ldr r6, [r4, #vp8_token_value] ; v
69 ldr r8, [r4, #vp8_token_len] ; n
77 ldr r10, [sp, #60] ; vp8_coef_tree
[all …]
/external/webrtc/src/modules/audio_coding/codecs/isac/fix/source/
Dpitch_filter_armv6.S41 ldr r3, [sp, #44] @ outputBuf2
42 ldr r6, [sp, #60] @ index2
43 ldr r7, [r6] @ *index2
44 ldr r8, [sp, #52] @ inputBuf
45 ldr r12, [sp, #56] @ outputBuf
59 ldr r9, [sp, #48] @ coefficient
76 ldr r10, [r3], #4 @ ubufQQpos2[*index2 + 0, *index2 + 1]
77 ldr r4, [r9], #4 @ coefficient[0, 1]
78 ldr r11, [r3], #4
79 ldr r5, [r9], #4
[all …]
/external/libvpx/libvpx/vp8/common/arm/armv6/
Dvp8_sad16x16_armv6.asm38 ldr r6, [r0, #0x0] ; load 4 src pixels (1A)
39 ldr r8, [r2, #0x0] ; load 4 ref pixels (1A)
40 ldr r7, [r0, #0x4] ; load 4 src pixels (1A)
41 ldr r9, [r2, #0x4] ; load 4 ref pixels (1A)
42 ldr r10, [r0, #0x8] ; load 4 src pixels (1B)
43 ldr r11, [r0, #0xC] ; load 4 src pixels (1B)
48 ldr r12, [r2, #0x8] ; load 4 ref pixels (1B)
49 ldr lr, [r2, #0xC] ; load 4 ref pixels (1B)
60 ldr r6, [r0, #0x0] ; load 4 src pixels (2A)
61 ldr r7, [r0, #0x4] ; load 4 src pixels (2A)
[all …]
/external/apache-harmony/security/src/test/api/java.injected/java/security/
DSecureClassLoaderTest.java184 SecureClassLoader ldr = new SecureClassLoader(); in testGetPermissions() local
185 ldr.getPermissions(null); in testGetPermissions()
186 ldr.getPermissions(cs); in testGetPermissions()
193 SecureClassLoader ldr = new SecureClassLoader(); in testDefineClassStringbyteArrayintintCodeSource() local
194 Class klass = ldr.defineClass(null, klassData, 0, klassData.length, in testDefineClassStringbyteArrayintintCodeSource()
203 SecureClassLoader ldr = new SecureClassLoader(); in testDefineClassStringByteBufferCodeSource() local
205 Class klass = ldr.defineClass(null, bbuf, null); in testDefineClassStringByteBufferCodeSource()
/external/libvpx/libvpx/vp8/encoder/arm/armv6/
Dvp8_subtract_armv6.asm31 ldr r4, [r0, #vp8_block_base_src]
32 ldr r5, [r0, #vp8_block_src]
33 ldr r6, [r0, #vp8_block_src_diff]
35 ldr r3, [r4]
36 ldr r7, [r0, #vp8_block_src_stride]
38 ldr r8, [r1, #vp8_blockd_predictor]
44 ldr r0, [r3], r7 ; src
45 ldr r1, [r8], r2 ; pred
85 ldr r5, [sp, #32] ; upred
86 ldr r12, [sp, #40] ; pred_stride
[all …]

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