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/external/openssl/crypto/sha/asm/
Dsha512-x86_64.S12 pushq %r15
44 movq %r9,%r15
49 xorq %r10,%r15
56 andq %r8,%r15
61 xorq %r10,%r15
65 addq %r15,%r12
66 movq %rbx,%r15
70 andq %rcx,%r15
74 addq %r15,%r11
86 movq %r8,%r15
[all …]
/external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/
Dsha512-x86_64.S12 pushq %r15
44 movq %r9,%r15
49 xorq %r10,%r15
56 andq %r8,%r15
61 xorq %r10,%r15
65 addq %r15,%r12
66 movq %rbx,%r15
70 andq %rcx,%r15
74 addq %r15,%r11
86 movq %r8,%r15
[all …]
/external/llvm/test/MC/SystemZ/
Dinsn-good-z196.s9 #CHECK: aghik %r0, %r15, 0 # encoding: [0xec,0x0f,0x00,0x00,0x00,0xd9]
10 #CHECK: aghik %r15, %r0, 0 # encoding: [0xec,0xf0,0x00,0x00,0x00,0xd9]
18 aghik %r0, %r15, 0
19 aghik %r15, %r0, 0
23 #CHECK: agrk %r0, %r0, %r15 # encoding: [0xb9,0xe8,0xf0,0x00]
24 #CHECK: agrk %r0, %r15, %r0 # encoding: [0xb9,0xe8,0x00,0x0f]
25 #CHECK: agrk %r15, %r0, %r0 # encoding: [0xb9,0xe8,0x00,0xf0]
29 agrk %r0,%r0,%r15
30 agrk %r0,%r15,%r0
31 agrk %r15,%r0,%r0
[all …]
Dinsn-good.s7 #CHECK: a %r0, 0(%r15) # encoding: [0x5a,0x00,0xf0,0x00]
8 #CHECK: a %r0, 4095(%r1,%r15) # encoding: [0x5a,0x01,0xff,0xff]
9 #CHECK: a %r0, 4095(%r15,%r1) # encoding: [0x5a,0x0f,0x1f,0xff]
10 #CHECK: a %r15, 0 # encoding: [0x5a,0xf0,0x00,0x00]
15 a %r0, 0(%r15)
16 a %r0, 4095(%r1,%r15)
17 a %r0, 4095(%r15,%r1)
18 a %r15, 0
23 #CHECK: adb %f0, 0(%r15) # encoding: [0xed,0x00,0xf0,0x00,0x00,0x1a]
24 #CHECK: adb %f0, 4095(%r1,%r15) # encoding: [0xed,0x01,0xff,0xff,0x00,0x1a]
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dframe-17.ll10 ; CHECK: aghi %r15, -232
11 ; CHECK: std %f8, 224(%r15)
12 ; CHECK: std %f9, 216(%r15)
13 ; CHECK: std %f10, 208(%r15)
14 ; CHECK: std %f11, 200(%r15)
15 ; CHECK: std %f12, 192(%r15)
16 ; CHECK: std %f13, 184(%r15)
17 ; CHECK: std %f14, 176(%r15)
18 ; CHECK: std %f15, 168(%r15)
19 ; CHECK-NOT: 160(%r15)
[all …]
Dframe-04.ll12 ; CHECK: aghi %r15, -224
14 ; CHECK: std %f8, 216(%r15)
15 ; CHECK: std %f9, 208(%r15)
16 ; CHECK: std %f10, 200(%r15)
17 ; CHECK: std %f11, 192(%r15)
18 ; CHECK: std %f12, 184(%r15)
19 ; CHECK: std %f13, 176(%r15)
20 ; CHECK: std %f14, 168(%r15)
21 ; CHECK: std %f15, 160(%r15)
31 ; CHECK: ld %f8, 216(%r15)
[all …]
Dframe-09.ll10 ; CHECK: stmg %r11, %r15, 88(%r15)
12 ; CHECK: .cfi_offset %r15, -40
14 ; CHECK: lgr %r11, %r15
16 ; CHECK: lmg %r11, %r15, 88(%r11)
23 ; to %r11 rather than %r15.
26 ; CHECK: stmg %r11, %r15, 88(%r15)
28 ; CHECK: .cfi_offset %r15, -40
29 ; CHECK: aghi %r15, -168
31 ; CHECK: lgr %r11, %r15
34 ; CHECK: lmg %r11, %r15, 256(%r11)
[all …]
Dframe-01.ll11 ; CHECK: aghi %r15, -168
13 ; CHECK: stg %r2, 160(%r15)
14 ; CHECK: aghi %r15, 168
23 ; two emergency spill slots at 160(%r15), for instructions with unsigned
28 ; CHECK: aghi %r15, -32760
30 ; CHECK: stg %r2, 176(%r15)
31 ; CHECK: aghi %r15, 32760
43 ; CHECK: aghi %r15, -32768
45 ; CHECK: stg %r2, 176(%r15)
46 ; CHECK: agfi %r15, 32768
[all …]
Dframe-07.ll8 ; The frame is big enough to require two emergency spill slots at 160(%r15),
13 ; CHECK-NOFP: aghi %r15, -4128
15 ; CHECK-NOFP: stdy %f8, 4120(%r15)
16 ; CHECK-NOFP: stdy %f9, 4112(%r15)
17 ; CHECK-NOFP: stdy %f10, 4104(%r15)
18 ; CHECK-NOFP: stdy %f11, 4096(%r15)
19 ; CHECK-NOFP: std %f12, 4088(%r15)
20 ; CHECK-NOFP: std %f13, 4080(%r15)
21 ; CHECK-NOFP: std %f14, 4072(%r15)
22 ; CHECK-NOFP: std %f15, 4064(%r15)
[all …]
Dframe-08.ll6 ; It is big enough to require two emergency spill slots at 160(%r15),
11 ; CHECK: stmg %r6, %r15, 48(%r15)
21 ; CHECK: .cfi_offset %r15, -40
22 ; CHECK: agfi %r15, -524232
26 ; CHECK: lmg %r6, %r15, 524280(%r15)
74 ; It is big enough to require two emergency spill slots at 160(%r15),
79 ; CHECK: stmg %r14, %r15, 112(%r15)
81 ; CHECK: .cfi_offset %r15, -40
82 ; CHECK: agfi %r15, -524168
86 ; CHECK: lmg %r14, %r15, 524280(%r15)
[all …]
Dframe-03.ll13 ; CHECK: aghi %r15, -224
15 ; CHECK: std %f8, 216(%r15)
16 ; CHECK: std %f9, 208(%r15)
17 ; CHECK: std %f10, 200(%r15)
18 ; CHECK: std %f11, 192(%r15)
19 ; CHECK: std %f12, 184(%r15)
20 ; CHECK: std %f13, 176(%r15)
21 ; CHECK: std %f14, 168(%r15)
22 ; CHECK: std %f15, 160(%r15)
32 ; CHECK: ld %f8, 216(%r15)
[all …]
Dframe-02.ll11 ; CHECK: aghi %r15, -224
13 ; CHECK: std %f8, 216(%r15)
14 ; CHECK: std %f9, 208(%r15)
15 ; CHECK: std %f10, 200(%r15)
16 ; CHECK: std %f11, 192(%r15)
17 ; CHECK: std %f12, 184(%r15)
18 ; CHECK: std %f13, 176(%r15)
19 ; CHECK: std %f14, 168(%r15)
20 ; CHECK: std %f15, 160(%r15)
30 ; CHECK: ld %f8, 216(%r15)
[all …]
Dargs-03.ll29 ; CHECK-INT-DAG: la %r6, {{224|240}}(%r15)
43 ; CHECK-FP128-1: aghi %r15, -256
45 ; CHECK-FP128-1-DAG: std %f0, 224(%r15)
46 ; CHECK-FP128-1-DAG: std %f2, 232(%r15)
50 ; CHECK-FP128-2: aghi %r15, -256
52 ; CHECK-FP128-2-DAG: std %f0, 240(%r15)
53 ; CHECK-FP128-2-DAG: std %f2, 248(%r15)
57 ; CHECK-STACK: aghi %r15, -256
58 ; CHECK-STACK: la [[REGISTER:%r[0-5]+]], {{224|240}}(%r15)
59 ; CHECK-STACK: stg [[REGISTER]], 216(%r15)
[all …]
Dargs-01.ll28 ; CHECK-INT-DAG: la %r6, {{224|240}}(%r15)
42 ; CHECK-FP128-1: aghi %r15, -256
44 ; CHECK-FP128-1-DAG: std %f0, 224(%r15)
45 ; CHECK-FP128-1-DAG: std %f2, 232(%r15)
49 ; CHECK-FP128-2: aghi %r15, -256
51 ; CHECK-FP128-2-DAG: std %f0, 240(%r15)
52 ; CHECK-FP128-2-DAG: std %f2, 248(%r15)
56 ; CHECK-STACK: aghi %r15, -256
57 ; CHECK-STACK: la [[REGISTER:%r[0-5]+]], {{224|240}}(%r15)
58 ; CHECK-STACK: stg [[REGISTER]], 216(%r15)
[all …]
Dargs-02.ll29 ; CHECK-INT-DAG: la %r6, {{224|240}}(%r15)
43 ; CHECK-FP128-1: aghi %r15, -256
45 ; CHECK-FP128-1-DAG: std %f0, 224(%r15)
46 ; CHECK-FP128-1-DAG: std %f2, 232(%r15)
50 ; CHECK-FP128-2: aghi %r15, -256
52 ; CHECK-FP128-2-DAG: std %f0, 240(%r15)
53 ; CHECK-FP128-2-DAG: std %f2, 248(%r15)
57 ; CHECK-STACK: aghi %r15, -256
58 ; CHECK-STACK: la [[REGISTER:%r[0-5]+]], {{224|240}}(%r15)
59 ; CHECK-STACK: stg [[REGISTER]], 216(%r15)
[all …]
/external/libffi/src/sh/
Dsysv.S57 mov.l r8,@-r15
59 mov.l r9,@-r15
61 mov.l r10,@-r15
63 mov.l r12,@-r15
65 mov.l r14,@-r15
67 sts.l pr,@-r15
69 mov r15,r14
75 sub r6,r15
76 add #-16,r15
78 and r0,r15
[all …]
/external/libffi/src/sh64/
Dsysv.S59 addi.l r15, -48, r15
61 st.q r15, 40, r32
62 st.q r15, 32, r31
63 st.q r15, 24, r30
64 st.q r15, 16, r29
65 st.q r15, 8, r28
66 st.l r15, 4, r18
67 st.l r15, 0, r14
69 add.l r15, r63, r14
79 sub.l r15, r4, r15
[all …]
/external/openssl/crypto/bn/asm/
Dx86_64-mont5.S22 pushq %r15
63 xorq %r15,%r15
94 leaq 1(%r15),%r15
100 movq (%rsi,%r15,8),%rax
105 movq %r13,-16(%rsp,%r15,8)
111 movq (%rcx,%r15,8),%rax
113 leaq 1(%r15),%r15
117 cmpq %r9,%r15
127 movq %r13,-16(%rsp,%r15,8)
141 xorq %r15,%r15
[all …]
Dx86_64-mont.S22 pushq %r15
39 xorq %r15,%r15
55 leaq 1(%r15),%r15
61 movq (%rsi,%r15,8),%rax
66 movq %r13,-16(%rsp,%r15,8)
72 movq (%rcx,%r15,8),%rax
74 leaq 1(%r15),%r15
78 cmpq %r9,%r15
86 movq %r13,-16(%rsp,%r15,8)
101 xorq %r15,%r15
[all …]
/external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/
Dx86_64-mont5.S22 pushq %r15
63 xorq %r15,%r15
94 leaq 1(%r15),%r15
100 movq (%rsi,%r15,8),%rax
105 movq %r13,-16(%rsp,%r15,8)
111 movq (%rcx,%r15,8),%rax
113 leaq 1(%r15),%r15
117 cmpq %r9,%r15
127 movq %r13,-16(%rsp,%r15,8)
141 xorq %r15,%r15
[all …]
Dx86_64-mont.S22 pushq %r15
39 xorq %r15,%r15
55 leaq 1(%r15),%r15
61 movq (%rsi,%r15,8),%rax
66 movq %r13,-16(%rsp,%r15,8)
72 movq (%rcx,%r15,8),%rax
74 leaq 1(%r15),%r15
78 cmpq %r9,%r15
86 movq %r13,-16(%rsp,%r15,8)
101 xorq %r15,%r15
[all …]
/external/libffi/src/s390/
Dsysv.S48 stm %r6,%r15,24(%r15) # Save registers
52 lr %r11,%r15 # Set up frame pointer
54 sr %r15,%r2
55 ahi %r15,-96-48 # Allocate stack
60 st %r11,0(%r15) # Set up back chain
64 la %r2,96(%r15) # Save area
76 lm %r6,%r15,48+24(%r11)
82 lm %r6,%r15,48+24(%r11)
88 lm %r6,%r15,48+24(%r11)
94 lm %r6,%r15,48+24(%r11)
[all …]
/external/llvm/test/CodeGen/MSP430/
Dsetcc.ll12 ; CHECK: bit.w r14, r15
13 ; CHECK: mov.w r2, r15
14 ; CHECK: rra.w r15
15 ; CHECK: and.w #1, r15
24 ; CHECK: bit.w r14, r15
25 ; CHECK: mov.w r2, r15
26 ; CHECK: and.w #1, r15
34 ; CHECK: cmp.w r14, r15
37 ; CHECK: mov.w #1, r15
38 ; CHECK: bic.w r12, r15
[all …]
/external/llvm/test/MC/Disassembler/SystemZ/
Dinsns.txt25 # CHECK: adb %f0, 0(%r15)
28 # CHECK: adb %f0, 4095(%r1,%r15)
31 # CHECK: adb %f0, 4095(%r15,%r1)
58 # CHECK: aeb %f0, 0(%r15)
61 # CHECK: aeb %f0, 4095(%r1,%r15)
64 # CHECK: aeb %f0, 4095(%r15,%r1)
85 # CHECK: afi %r15, 0
103 # CHECK: agfi %r15, 0
109 # CHECK: agfr %r0, %r15
112 # CHECK: agfr %r15, %r0
[all …]
/external/valgrind/main/VEX/orig_amd64/
Dtest1.sorted324 438D3C39 leal (%r9,%r15), %edi
340 428D043E leal (%rsi,%r15), %eax
667 41891487 movl %edx, (%r15,%rax,4)
728 418B0487 movl (%r15,%rax,4), %eax
729 418B1487 movl (%r15,%rax,4), %edx
730 458B0487 movl (%r15,%rax,4), %r8d
789 4C8B7F28 movq 40(%rdi), %r15
811 4C8B7C2440 movq 64(%rsp), %r15
812 4C8B7F48 movq 72(%rdi), %r15
821 4C897C24F8 movq %r15, -8(%rsp)
[all …]

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