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1//===---- AMDCallingConv.td - Calling Conventions for Radeon GPUs ---------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This describes the calling conventions for the AMD Radeon GPUs.
11//
12//===----------------------------------------------------------------------===//
13
14// Inversion of CCIfInReg
15class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {}
16
17// Calling convention for SI
18def CC_SI : CallingConv<[
19
20  CCIfInReg<CCIfType<[f32, i32] , CCAssignToReg<[
21    SGPR0, SGPR1, SGPR2, SGPR3, SGPR4, SGPR5, SGPR6, SGPR7,
22    SGPR8, SGPR9, SGPR10, SGPR11, SGPR12, SGPR13, SGPR14, SGPR15
23  ]>>>,
24
25  CCIfInReg<CCIfType<[i64] , CCAssignToRegWithShadow<
26    [ SGPR0, SGPR2, SGPR4, SGPR6, SGPR8, SGPR10, SGPR12, SGPR14 ],
27    [ SGPR1, SGPR3, SGPR5, SGPR7, SGPR9, SGPR11, SGPR12, SGPR15 ]
28  >>>,
29
30  CCIfNotInReg<CCIfType<[f32, i32] , CCAssignToReg<[
31    VGPR0, VGPR1, VGPR2, VGPR3, VGPR4, VGPR5, VGPR6, VGPR7,
32    VGPR8, VGPR9, VGPR10, VGPR11, VGPR12, VGPR13, VGPR14, VGPR15,
33    VGPR16, VGPR17, VGPR18, VGPR19, VGPR20, VGPR21, VGPR22, VGPR23,
34    VGPR24, VGPR25, VGPR26, VGPR27, VGPR28, VGPR29, VGPR30, VGPR31
35  ]>>>
36
37]>;
38
39// Calling convention for compute kernels
40def CC_AMDGPU_Kernel : CallingConv<[
41  CCIfType<[v4i32, v4f32],               CCAssignToStack <16, 16>>,
42  CCIfType<[i64, f64, v2f32, v2i32],     CCAssignToStack < 8, 8>>,
43  CCIfType<[i32, f32],                   CCAssignToStack < 4, 4>>,
44  CCIfType<[i16],                        CCAssignToStack < 2, 4>>,
45  CCIfType<[i8],                         CCAssignToStack < 1, 4>>
46]>;
47
48def CC_AMDGPU : CallingConv<[
49  CCIf<"State.getTarget().getSubtarget<AMDGPUSubtarget>().getGeneration() == "
50       "AMDGPUSubtarget::SOUTHERN_ISLANDS && "
51       "State.getMachineFunction().getInfo<SIMachineFunctionInfo>()->"#
52       "ShaderType == ShaderType::COMPUTE", CCDelegateTo<CC_AMDGPU_Kernel>>,
53  CCIf<"State.getTarget().getSubtarget<AMDGPUSubtarget>().getGeneration() < "
54       "AMDGPUSubtarget::SOUTHERN_ISLANDS && "
55       "State.getMachineFunction().getInfo<R600MachineFunctionInfo>()->"
56       "ShaderType == ShaderType::COMPUTE", CCDelegateTo<CC_AMDGPU_Kernel>>,
57  CCIf<"State.getTarget().getSubtarget<AMDGPUSubtarget>()"#
58       ".getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS", CCDelegateTo<CC_SI>>
59]>;
60