Lines Matching refs:RegStorage

34     RegStorage LoadHelper(QuickEntrypointEnum trampoline) OVERRIDE;
35     LIR* LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest,
37     LIR* LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest, int scale,
39     LIR* LoadConstantNoClobber(RegStorage r_dest, int value);
40     LIR* LoadConstantWide(RegStorage r_dest, int64_t value);
41     LIR* StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src,
43     LIR* StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, int scale,
45     void MarkGCCard(RegStorage val_reg, RegStorage tgt_addr_reg);
48     RegStorage TargetReg(SpecialTargetRegister reg);
49     RegStorage GetArgMappingToPhysicalReg(int arg_num);
57     ResourceMask GetRegMaskCommon(const RegStorage& reg) const OVERRIDE;
62     void MarkPreservedSingle(int v_reg, RegStorage reg);
63     void MarkPreservedDouble(int v_reg, RegStorage reg);
112     RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div);
113     RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div);
115     void GenDivZeroCheckWide(RegStorage reg);
123     void GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code,
124                           int32_t true_val, int32_t false_val, RegStorage rs_dest,
139     LIR* OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target);
140     LIR* OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target);
142     LIR* OpDecAndBranch(ConditionCode c_code, RegStorage reg, LIR* target);
143     LIR* OpFpRegCopy(RegStorage r_dest, RegStorage r_src);
147     LIR* OpMem(OpKind op, RegStorage r_base, int disp);
148     LIR* OpPcRelLoad(RegStorage reg, LIR* target);
149     LIR* OpReg(OpKind op, RegStorage r_dest_src);
150     void OpRegCopy(RegStorage r_dest, RegStorage r_src);
151     LIR* OpRegCopyNoInsert(RegStorage r_dest, RegStorage r_src);
152     LIR* OpRegImm(OpKind op, RegStorage r_dest_src1, int value);
153     LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2);
154     LIR* OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, MoveType move_type);
155     LIR* OpMovMemReg(RegStorage r_base, int offset, RegStorage r_src, MoveType move_type);
156     LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src);
157     LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value);
158     LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
160     LIR* OpVldm(RegStorage r_base, int count);
161     LIR* OpVstm(RegStorage r_base, int count);
162     void OpRegCopyWide(RegStorage dest, RegStorage src);
164     LIR* LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest, OpSize size);
165     LIR* StoreBaseDispBody(RegStorage r_base, int displacement, RegStorage r_src, OpSize size);
166     LIR* OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2,
168     LIR* OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift);
177     RegStorage AllocPreservedDouble(int s_reg);
178     RegStorage AllocPreservedSingle(int s_reg);
187     LIR* InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) OVERRIDE;
197     LIR* LoadStoreUsingInsnWithOffsetImm8Shl2(ArmOpcode opcode, RegStorage r_base,
198                                               int displacement, RegStorage r_src_dest,
199                                               RegStorage r_work = RegStorage::InvalidReg());
212     void GenEasyMultiplyTwoOps(RegStorage r_dest, RegStorage r_src, EasyMultiplyOp* ops);
214     static constexpr ResourceMask GetRegMaskArm(RegStorage reg);