73   DCHECK(RegStorage::IsSingle(r_dest));  in LoadFPConstantValue()
173 LIR* ArmMir2Lir::LoadConstantNoClobber(RegStorage r_dest, int value) {  in LoadConstantNoClobber()
223 LIR* ArmMir2Lir::OpReg(OpKind op, RegStorage r_dest_src) {  in OpReg()
238 LIR* ArmMir2Lir::OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2,  in OpRegRegShift()
371 LIR* ArmMir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) {  in OpRegReg()
375 LIR* ArmMir2Lir::OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, MoveType move_type) {  in OpMovRegMem()
380 LIR* ArmMir2Lir::OpMovMemReg(RegStorage r_base, int offset, RegStorage r_src, MoveType move_type) {  in OpMovMemReg()
385 LIR* ArmMir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) {  in OpCondRegReg()
390 LIR* ArmMir2Lir::OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1,  in OpRegRegRegShift()
391                                   RegStorage r_src2, int shift) {  in OpRegRegRegShift()
459 LIR* ArmMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) {  in OpRegRegReg()
463 LIR* ArmMir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) {  in OpRegRegImm()
573           RegStorage r_tmp = AllocTemp();  in OpRegRegImm()
588     RegStorage r_scratch = AllocTemp();  in OpRegRegImm()
600 LIR* ArmMir2Lir::OpRegImm(OpKind op, RegStorage r_dest_src1, int value) {  in OpRegImm()
641 LIR* ArmMir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) {  in LoadConstantWide()
692 LIR* ArmMir2Lir::LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest,  in LoadBaseIndexed()
698   RegStorage reg_ptr;  in LoadBaseIndexed()
758 LIR* ArmMir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src,  in StoreBaseIndexed()
764   RegStorage reg_ptr;  in StoreBaseIndexed()
824 LIR* ArmMir2Lir::LoadStoreUsingInsnWithOffsetImm8Shl2(ArmOpcode opcode, RegStorage r_base,  in LoadStoreUsingInsnWithOffsetImm8Shl2()
825                                                       int displacement, RegStorage r_src_dest,  in LoadStoreUsingInsnWithOffsetImm8Shl2()
826                                                       RegStorage r_work) {  in LoadStoreUsingInsnWithOffsetImm8Shl2()
830   RegStorage r_ptr = r_base;  in LoadStoreUsingInsnWithOffsetImm8Shl2()
854 LIR* ArmMir2Lir::LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest,  in LoadBaseDispBody()
949       RegStorage reg_offset = AllocTemp();  in LoadBaseDispBody()
965 LIR* ArmMir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest,  in LoadBaseDisp()
979     RegStorage r_ptr = AllocTemp();  in LoadBaseDisp()
996 LIR* ArmMir2Lir::StoreBaseDispBody(RegStorage r_base, int displacement, RegStorage r_src,  in StoreBaseDispBody()
1072       RegStorage r_scratch = AllocTemp();  in StoreBaseDispBody()
1088 LIR* ArmMir2Lir::StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src,  in StoreBaseDisp()
1103     RegStorage r_ptr = AllocTemp();  in StoreBaseDisp()
1109     RegStorage r_temp = AllocTemp();  in StoreBaseDisp()
1110     RegStorage r_temp_high = AllocTemp(false);  // We may not have another temp.  in StoreBaseDisp()
1143 LIR* ArmMir2Lir::OpFpRegCopy(RegStorage r_dest, RegStorage r_src) {  in OpFpRegCopy()
1163 LIR* ArmMir2Lir::OpMem(OpKind op, RegStorage r_base, int disp) {  in OpMem()
1168 LIR* ArmMir2Lir::InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) {  in InvokeTrampoline()