Lines Matching refs:RegStorage

34     RegStorage LoadHelper(QuickEntrypointEnum trampoline) OVERRIDE;
35     LIR* LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest,
37     LIR* LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest, int scale,
39     LIR* LoadConstantNoClobber(RegStorage r_dest, int value);
40     LIR* LoadConstantWide(RegStorage r_dest, int64_t value);
41     LIR* StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src,
43     LIR* StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, int scale,
45     LIR* GenAtomic64Load(RegStorage r_base, int displacement, RegStorage r_dest);
46     LIR* GenAtomic64Store(RegStorage r_base, int displacement, RegStorage r_src);
47     void MarkGCCard(RegStorage val_reg, RegStorage tgt_addr_reg);
50     RegStorage Solo64ToPair64(RegStorage reg);
51     RegStorage TargetReg(SpecialTargetRegister reg);
52     RegStorage GetArgMappingToPhysicalReg(int arg_num);
60     ResourceMask GetRegMaskCommon(const RegStorage& reg) const OVERRIDE;
111     RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div);
112     RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div);
114     void GenDivZeroCheckWide(RegStorage reg);
122     void GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code,
123                           int32_t true_val, int32_t false_val, RegStorage rs_dest,
137     LIR* OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target);
138     LIR* OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target);
140     LIR* OpDecAndBranch(ConditionCode c_code, RegStorage reg, LIR* target);
141     LIR* OpFpRegCopy(RegStorage r_dest, RegStorage r_src);
144     LIR* OpMem(OpKind op, RegStorage r_base, int disp);
145     LIR* OpPcRelLoad(RegStorage reg, LIR* target);
146     LIR* OpReg(OpKind op, RegStorage r_dest_src);
147     void OpRegCopy(RegStorage r_dest, RegStorage r_src);
148     LIR* OpRegCopyNoInsert(RegStorage r_dest, RegStorage r_src);
149     LIR* OpRegImm(OpKind op, RegStorage r_dest_src1, int value);
150     LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2);
151     LIR* OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, MoveType move_type);
152     LIR* OpMovMemReg(RegStorage r_base, int offset, RegStorage r_src, MoveType move_type);
153     LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src);
154     LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value);
155     LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
157     LIR* OpVldm(RegStorage r_base, int count);
158     LIR* OpVstm(RegStorage r_base, int count);
159     void OpRegCopyWide(RegStorage dest, RegStorage src);
162     LIR* LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest,
165     LIR* StoreBaseDispBody(RegStorage r_base, int displacement, RegStorage r_src,
182     LIR* InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) OVERRIDE;