Lines Matching refs:__u32
97 __u32 fpga_id;
99 __u32 fpga_version;
100 __u32 cpu_start;
101 __u32 cpu_stop;
102 __u32 misc_reg;
104 __u32 idt_mode;
105 __u32 uart_irq_status;
106 __u32 clear_timer0_irq;
107 __u32 clear_timer1_irq;
109 __u32 clear_timer2_irq;
110 __u32 test_register;
111 __u32 test_count;
112 __u32 timer_select;
114 __u32 pr_uart_irq_status;
115 __u32 ram_wait_state;
116 __u32 uart_wait_state;
117 __u32 timer_wait_state;
119 __u32 ack_wait_state;
122 __u32 loc_addr_range;
124 __u32 loc_addr_base;
125 __u32 loc_arbitr;
126 __u32 endian_descr;
127 __u32 loc_rom_range;
129 __u32 loc_rom_base;
130 __u32 loc_bus_descr;
131 __u32 loc_range_mst;
132 __u32 loc_base_mst;
134 __u32 loc_range_io;
135 __u32 pci_base_mst;
136 __u32 pci_conf_io;
137 __u32 filler1;
139 __u32 filler2;
140 __u32 filler3;
141 __u32 filler4;
142 __u32 mail_box_0;
144 __u32 mail_box_1;
145 __u32 mail_box_2;
146 __u32 mail_box_3;
147 __u32 filler5;
149 __u32 filler6;
150 __u32 filler7;
151 __u32 filler8;
152 __u32 pci_doorbell;
154 __u32 loc_doorbell;
155 __u32 intr_ctrl_stat;
156 __u32 init_ctrl;
179 __u32 signature;
180 __u32 zfwctrl_addr;
302 __u32 op_mode;
304 __u32 intr_enable;
305 __u32 sw_flow;
306 __u32 flow_status;
307 __u32 comm_baud;
309 __u32 comm_parity;
310 __u32 comm_data_l;
311 __u32 comm_flags;
312 __u32 hw_flow;
314 __u32 rs_control;
315 __u32 rs_status;
316 __u32 flow_xon;
317 __u32 flow_xoff;
319 __u32 hw_overflow;
320 __u32 sw_overflow;
321 __u32 comm_error;
322 __u32 ichar;
324 __u32 filler[7];
327 __u32 flag_dma;
329 __u32 tx_bufaddr;
330 __u32 tx_bufsize;
331 __u32 tx_threshold;
332 __u32 tx_get;
334 __u32 tx_put;
335 __u32 rx_bufaddr;
336 __u32 rx_bufsize;
337 __u32 rx_threshold;
339 __u32 rx_get;
340 __u32 rx_put;
341 __u32 filler[5];
345 __u32 n_channel;
346 __u32 fw_version;
347 __u32 op_system;
349 __u32 dr_version;
350 __u32 inactivity;
351 __u32 hcmd_channel;
352 __u32 hcmd_param;
354 __u32 fwcmd_channel;
355 __u32 fwcmd_param;
356 __u32 zf_int_queue_addr;
357 __u32 filler[6];