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Lines Matching refs:LiveRegDefs

144   std::vector<SUnit*> LiveRegDefs;  member in __anon9b4c64940111::ScheduleDAGRRList
332 LiveRegDefs.resize(TRI->getNumRegs() + 1, nullptr); in Schedule()
536 SUnit *RegDef = LiveRegDefs[I->getReg()]; (void)RegDef; in ReleasePredecessors()
539 LiveRegDefs[I->getReg()] = I->getSUnit(); in ReleasePredecessors()
551 if (!LiveRegDefs[CallResource]) in ReleasePredecessors()
563 LiveRegDefs[CallResource] = Def; in ReleasePredecessors()
744 if (I->isAssignedRegDep() && LiveRegDefs[I->getReg()] == SU) { in ScheduleNodeBottomUp()
747 LiveRegDefs[I->getReg()] = nullptr; in ScheduleNodeBottomUp()
755 if (LiveRegDefs[CallResource] == SU) in ScheduleNodeBottomUp()
762 LiveRegDefs[CallResource] = nullptr; in ScheduleNodeBottomUp()
815 assert(LiveRegDefs[I->getReg()] == I->getSUnit() && in UnscheduleNodeBottomUp()
818 LiveRegDefs[I->getReg()] = nullptr; in UnscheduleNodeBottomUp()
832 LiveRegDefs[CallResource] = SU; in UnscheduleNodeBottomUp()
846 LiveRegDefs[CallResource] = nullptr; in UnscheduleNodeBottomUp()
855 if (!LiveRegDefs[I->getReg()]) in UnscheduleNodeBottomUp()
859 LiveRegDefs[I->getReg()] = SU; in UnscheduleNodeBottomUp()
1208 std::vector<SUnit*> &LiveRegDefs, in CheckForLiveRegDef() argument
1215 if (!LiveRegDefs[*AliasI]) continue; in CheckForLiveRegDef()
1218 if (LiveRegDefs[*AliasI] == SU) continue; in CheckForLiveRegDef()
1230 std::vector<SUnit*> &LiveRegDefs, in CheckForLiveRegDefMasked() argument
1234 for (unsigned i = 1, e = LiveRegDefs.size()-1; i != e; ++i) { in CheckForLiveRegDefMasked()
1235 if (!LiveRegDefs[i]) continue; in CheckForLiveRegDefMasked()
1236 if (LiveRegDefs[i] == SU) continue; in CheckForLiveRegDefMasked()
1268 if (I->isAssignedRegDep() && LiveRegDefs[I->getReg()] != SU) in DelayForLiveRegsBottomUp()
1269 CheckForLiveRegDef(I->getSUnit(), I->getReg(), LiveRegDefs, in DelayForLiveRegsBottomUp()
1293 CheckForLiveRegDef(SU, Reg, LiveRegDefs, RegAdded, LRegs, TRI); in DelayForLiveRegsBottomUp()
1309 if (LiveRegDefs[CallResource]) { in DelayForLiveRegsBottomUp()
1318 CheckForLiveRegDefMasked(SU, RegMask, LiveRegDefs, RegAdded, LRegs); in DelayForLiveRegsBottomUp()
1324 CheckForLiveRegDef(SU, *Reg, LiveRegDefs, RegAdded, LRegs, TRI); in DelayForLiveRegsBottomUp()
1441 SUnit *LRDef = LiveRegDefs[Reg]; in PickNodeToScheduleBottomUp()
1472 LiveRegDefs[Reg] = NewDef; in PickNodeToScheduleBottomUp()