Lines Matching refs:AMDGPUSubtarget
52 static std::string computeDataLayout(const AMDGPUSubtarget &ST) { in computeDataLayout()
82 if (Subtarget.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { in AMDGPUTargetMachine()
106 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); in createMachineScheduler()
107 if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) in createMachineScheduler()
139 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); in addCodeGenPrepare()
147 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); in addPreISel()
151 if (ST.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) { in addPreISel()
168 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); in addPreRegAlloc()
170 if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { in addPreRegAlloc()
184 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); in addPostRegAlloc()
186 if (ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) { in addPostRegAlloc()
193 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); in addPreSched2()
195 if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) in addPreSched2()
199 if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) in addPreSched2()
205 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); in addPreEmitPass()
206 if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { in addPreEmitPass()