Lines Matching refs:V_
47 #define INSTRUCTION_FIELDS_LIST(V_) \ argument
49 V_(Rd, 4, 0, Bits) /* Destination register. */ \
50 V_(Rn, 9, 5, Bits) /* First source register. */ \
51 V_(Rm, 20, 16, Bits) /* Second source register. */ \
52 V_(Ra, 14, 10, Bits) /* Third source register. */ \
53 V_(Rt, 4, 0, Bits) /* Load dest / store source. */ \
54 V_(Rt2, 14, 10, Bits) /* Load second dest / */ \
56 V_(PrefetchMode, 4, 0, Bits) \
59 V_(SixtyFourBits, 31, 31, Bits) \
60 V_(FlagsUpdate, 29, 29, Bits) \
63 V_(ImmPCRelHi, 23, 5, SignedBits) \
64 V_(ImmPCRelLo, 30, 29, Bits) \
67 V_(ShiftDP, 23, 22, Bits) \
68 V_(ImmDPShift, 15, 10, Bits) \
71 V_(ImmAddSub, 21, 10, Bits) \
72 V_(ShiftAddSub, 23, 22, Bits) \
75 V_(ImmExtendShift, 12, 10, Bits) \
76 V_(ExtendMode, 15, 13, Bits) \
79 V_(ImmMoveWide, 20, 5, Bits) \
80 V_(ShiftMoveWide, 22, 21, Bits) \
83 V_(BitN, 22, 22, Bits) \
84 V_(ImmRotate, 21, 16, Bits) \
85 V_(ImmSetBits, 15, 10, Bits) \
86 V_(ImmR, 21, 16, Bits) \
87 V_(ImmS, 15, 10, Bits) \
90 V_(ImmTestBranch, 18, 5, SignedBits) \
91 V_(ImmTestBranchBit40, 23, 19, Bits) \
92 V_(ImmTestBranchBit5, 31, 31, Bits) \
95 V_(Condition, 15, 12, Bits) \
96 V_(ConditionBranch, 3, 0, Bits) \
97 V_(Nzcv, 3, 0, Bits) \
98 V_(ImmCondCmp, 20, 16, Bits) \
99 V_(ImmCondBranch, 23, 5, SignedBits) \
102 V_(FPType, 23, 22, Bits) \
103 V_(ImmFP, 20, 13, Bits) \
104 V_(FPScale, 15, 10, Bits) \
107 V_(ImmLS, 20, 12, SignedBits) \
108 V_(ImmLSUnsigned, 21, 10, Bits) \
109 V_(ImmLSPair, 21, 15, SignedBits) \
110 V_(SizeLS, 31, 30, Bits) \
111 V_(ImmShiftLS, 12, 12, Bits) \
114 V_(ImmUncondBranch, 25, 0, SignedBits) \
115 V_(ImmCmpBranch, 23, 5, SignedBits) \
116 V_(ImmLLiteral, 23, 5, SignedBits) \
117 V_(ImmException, 20, 5, Bits) \
118 V_(ImmHint, 11, 5, Bits) \
119 V_(ImmBarrierDomain, 11, 10, Bits) \
120 V_(ImmBarrierType, 9, 8, Bits) \
123 V_(ImmSystemRegister, 19, 5, Bits) \
124 V_(SysO0, 19, 19, Bits) \
125 V_(SysOp1, 18, 16, Bits) \
126 V_(SysOp2, 7, 5, Bits) \
127 V_(CRn, 15, 12, Bits) \
128 V_(CRm, 11, 8, Bits) \
131 #define SYSTEM_REGISTER_FIELDS_LIST(V_, M_) \ argument
133 V_(Flags, 31, 28, Bits) \
134 V_(N, 31, 31, Bits) \
135 V_(Z, 30, 30, Bits) \
136 V_(C, 29, 29, Bits) \
137 V_(V, 28, 28, Bits) \
141 V_(AHP, 26, 26, Bits) \
142 V_(DN, 25, 25, Bits) \
143 V_(FZ, 24, 24, Bits) \
144 V_(RMode, 23, 22, Bits) \