Lines Matching refs:align

33   store i8 %val, i8* %1, align 1, !tbaa !21
39   %2 = load i8* %1, align 1, !tbaa !21
47   store <2 x i8> %val, <2 x i8>* %2, align 2, !tbaa !22
54   %3 = load <2 x i8>* %2, align 2, !tbaa !22
63   store <4 x i8> %2, <4 x i8>* %3, align 4, !tbaa !23
70   %3 = load <4 x i8>* %2, align 4, !tbaa !23
79   store <4 x i8> %val, <4 x i8>* %2, align 4, !tbaa !24
86   %3 = load <4 x i8>* %2, align 4, !tbaa !24
93   store i8 %val, i8* %1, align 1, !tbaa !25
99   %2 = load i8* %1, align 1, !tbaa !25
107   store <2 x i8> %val, <2 x i8>* %2, align 2, !tbaa !26
114   %3 = load <2 x i8>* %2, align 2, !tbaa !26
123   store <4 x i8> %2, <4 x i8>* %3, align 4, !tbaa !27
130   %3 = load <4 x i8>* %2, align 4, !tbaa !27
139   store <4 x i8> %val, <4 x i8>* %2, align 4, !tbaa !28
146   %3 = load <4 x i8>* %2, align 4, !tbaa !28
154   store i16 %val, i16* %2, align 2, !tbaa !29
161   %3 = load i16* %2, align 2, !tbaa !29
169   store <2 x i16> %val, <2 x i16>* %2, align 4, !tbaa !30
176   %3 = load <2 x i16>* %2, align 4, !tbaa !30
185   store <4 x i16> %2, <4 x i16>* %3, align 8, !tbaa !31
192   %3 = load <4 x i16>* %2, align 8, !tbaa !31
201   store <4 x i16> %val, <4 x i16>* %2, align 8, !tbaa !32
208   %3 = load <4 x i16>* %2, align 8, !tbaa !32
216   store i16 %val, i16* %2, align 2, !tbaa !33
223   %3 = load i16* %2, align 2, !tbaa !33
231   store <2 x i16> %val, <2 x i16>* %2, align 4, !tbaa !34
238   %3 = load <2 x i16>* %2, align 4, !tbaa !34
247   store <4 x i16> %2, <4 x i16>* %3, align 8, !tbaa !35
254   %3 = load <4 x i16>* %2, align 8, !tbaa !35
263   store <4 x i16> %val, <4 x i16>* %2, align 8, !tbaa !36
270   %3 = load <4 x i16>* %2, align 8, !tbaa !36
278   store i32 %val, i32* %2, align 4, !tbaa !37
285   %3 = load i32* %2, align 4, !tbaa !37
293   store <2 x i32> %val, <2 x i32>* %2, align 8, !tbaa !38
300   %3 = load <2 x i32>* %2, align 8, !tbaa !38
309   store <4 x i32> %2, <4 x i32>* %3, align 16, !tbaa !39
316   %3 = load <4 x i32>* %2, align 8, !tbaa !39
325   store <4 x i32> %val, <4 x i32>* %2, align 16, !tbaa !40
332   %3 = load <4 x i32>* %2, align 16, !tbaa !40
340   store i32 %val, i32* %2, align 4, !tbaa !41
347   %3 = load i32* %2, align 4, !tbaa !41
355   store <2 x i32> %val, <2 x i32>* %2, align 8, !tbaa !42
362   %3 = load <2 x i32>* %2, align 8, !tbaa !42
371   store <4 x i32> %2, <4 x i32>* %3, align 16, !tbaa !43
378   %3 = load <4 x i32>* %2, align 8, !tbaa !43
387   store <4 x i32> %val, <4 x i32>* %2, align 16, !tbaa !44
394   %3 = load <4 x i32>* %2, align 16, !tbaa !44
402   store i64 %val, i64* %2, align 8, !tbaa !45
409   %3 = load i64* %2, align 8, !tbaa !45
417   store <2 x i64> %val, <2 x i64>* %2, align 16, !tbaa !46
424   %3 = load <2 x i64>* %2, align 16, !tbaa !46
433   store <4 x i64> %2, <4 x i64>* %3, align 32, !tbaa !47
440   %3 = load <4 x i64>* %2, align 32
442   store <4 x i64> %3, <4 x i64>* %4, align 32, !tbaa !47
450   store <4 x i64> %val, <4 x i64>* %2, align 32, !tbaa !48
457   %3 = load <4 x i64>* %2, align 32, !tbaa !15
458   store <4 x i64> %3, <4 x i64>* %agg.result, align 32, !tbaa !48
466   store i64 %val, i64* %2, align 8, !tbaa !49
473   %3 = load i64* %2, align 8, !tbaa !49
481   store <2 x i64> %val, <2 x i64>* %2, align 16, !tbaa !50
488   %3 = load <2 x i64>* %2, align 16, !tbaa !50
497   store <4 x i64> %2, <4 x i64>* %3, align 32, !tbaa !51
504   %3 = load <4 x i64>* %2, align 32
506   store <4 x i64> %3, <4 x i64>* %4, align 32, !tbaa !51
514   store <4 x i64> %val, <4 x i64>* %2, align 32, !tbaa !52
521   %3 = load <4 x i64>* %2, align 32, !tbaa !15
522   store <4 x i64> %3, <4 x i64>* %agg.result, align 32, !tbaa !52
530   store float %val, float* %2, align 4, !tbaa !53
537   %3 = load float* %2, align 4, !tbaa !53
545   store <2 x float> %val, <2 x float>* %2, align 8, !tbaa !54
552   %3 = load <2 x float>* %2, align 8, !tbaa !54
561   store <4 x float> %2, <4 x float>* %3, align 16, !tbaa !55
568   %3 = load <4 x float>* %2, align 8, !tbaa !55
577   store <4 x float> %val, <4 x float>* %2, align 16, !tbaa !56
584   %3 = load <4 x float>* %2, align 16, !tbaa !56
592   store double %val, double* %2, align 8, !tbaa !57
599   %3 = load double* %2, align 8, !tbaa !57
607   store <2 x double> %val, <2 x double>* %2, align 16, !tbaa !58
614   %3 = load <2 x double>* %2, align 16, !tbaa !58
623   store <4 x double> %2, <4 x double>* %3, align 32, !tbaa !59
631   %3 = load <4 x double>* %2, align 32
633   store <4 x double> %3, <4 x double>* %4, align 32, !tbaa !59
641   store <4 x double> %val, <4 x double>* %2, align 32, !tbaa !60
647   %3 = load <4 x double>* %2, align 32, !tbaa !15
648   store <4 x double> %3, <4 x double>* %agg.result, align 32, !tbaa !60
656   %3 = load <4 x i64>* %2, align 8
662   %3 = load <3 x i64>* %2, align 8
668   %3 = load <2 x i64>* %2, align 8
675   %3 = load <4 x i64>* %2, align 8
681   %3 = load <3 x i64>* %2, align 8
687   %3 = load <2 x i64>* %2, align 8
694   %3 = load <4 x i32>* %2, align 4
700   %3 = load <3 x i32>* %2, align 4
706   %3 = load <2 x i32>* %2, align 4
713   %3 = load <4 x i32>* %2, align 4
719   %3 = load <3 x i32>* %2, align 4
725   %3 = load <2 x i32>* %2, align 4
732   %3 = load <4 x i16>* %2, align 2
738   %3 = load <3 x i16>* %2, align 2
744   %3 = load <2 x i16>* %2, align 2
751   %3 = load <4 x i16>* %2, align 2
757   %3 = load <3 x i16>* %2, align 2
763   %3 = load <2 x i16>* %2, align 2
770   %3 = load <4 x i8>* %2, align 1
776   %3 = load <3 x i8>* %2, align 1
782   %3 = load <2 x i8>* %2, align 1
789   %3 = load <4 x i8>* %2, align 1
795   %3 = load <3 x i8>* %2, align 1
801   %3 = load <2 x i8>* %2, align 1
808   %3 = load <4 x float>* %2, align 4
814   %3 = load <3 x float>* %2, align 4
820   %3 = load <2 x float>* %2, align 4
827   %3 = load <4 x double>* %2, align 8
833   %3 = load <3 x double>* %2, align 8
839   %3 = load <2 x double>* %2, align 8
847   store <4 x i64> %val, <4 x i64>* %2, align 8
853   store <3 x i64> %val, <3 x i64>* %2, align 8
859   store <2 x i64> %val, <2 x i64>* %2, align 8
866   store <4 x i64> %val, <4 x i64>* %2, align 8
872   store <3 x i64> %val, <3 x i64>* %2, align 8
878   store <2 x i64> %val, <2 x i64>* %2, align 8
885   store <4 x i32> %val, <4 x i32>* %2, align 4
891   store <3 x i32> %val, <3 x i32>* %2, align 4
897   store <2 x i32> %val, <2 x i32>* %2, align 4
904   store <4 x i32> %val, <4 x i32>* %2, align 4
910   store <3 x i32> %val, <3 x i32>* %2, align 4
916   store <2 x i32> %val, <2 x i32>* %2, align 4
923   store <4 x i16> %val, <4 x i16>* %2, align 2
929   store <3 x i16> %val, <3 x i16>* %2, align 2
935   store <2 x i16> %val, <2 x i16>* %2, align 2
942   store <4 x i16> %val, <4 x i16>* %2, align 2
948   store <3 x i16> %val, <3 x i16>* %2, align 2
954   store <2 x i16> %val, <2 x i16>* %2, align 2
961   store <4 x i8> %val, <4 x i8>* %2, align 1
967   store <3 x i8> %val, <3 x i8>* %2, align 1
973   store <2 x i8> %val, <2 x i8>* %2, align 1
980   store <4 x i8> %val, <4 x i8>* %2, align 1
986   store <3 x i8> %val, <3 x i8>* %2, align 1
992   store <2 x i8> %val, <2 x i8>* %2, align 1
999   store <4 x float> %val, <4 x float>* %2, align 4
1005   store <3 x float> %val, <3 x float>* %2, align 4
1011   store <2 x float> %val, <2 x float>* %2, align 4
1018   store <4 x double> %val, <4 x double>* %2, align 8
1024   store <3 x double> %val, <3 x double>* %2, align 8
1030   store <2 x double> %val, <2 x double>* %2, align 8