1 /****************************************************************************** 2 * 3 * Copyright (C) 1999-2014 Broadcom Corporation 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 19 #ifndef HCIDEFS_H 20 #define HCIDEFS_H 21 22 #define HCI_PROTO_VERSION 0x01 /* Version for BT spec 1.1 */ 23 #define HCI_PROTO_VERSION_1_2 0x02 /* Version for BT spec 1.2 */ 24 #define HCI_PROTO_VERSION_2_0 0x03 /* Version for BT spec 2.0 */ 25 #define HCI_PROTO_VERSION_2_1 0x04 /* Version for BT spec 2.1 [Lisbon] */ 26 #define HCI_PROTO_VERSION_3_0 0x05 /* Version for BT spec 3.0 */ 27 #define HCI_PROTO_REVISION 0x000C /* Current implementation version */ 28 /* 29 ** Definitions for HCI groups 30 */ 31 #define HCI_GRP_LINK_CONTROL_CMDS (0x01 << 10) /* 0x0400 */ 32 #define HCI_GRP_LINK_POLICY_CMDS (0x02 << 10) /* 0x0800 */ 33 #define HCI_GRP_HOST_CONT_BASEBAND_CMDS (0x03 << 10) /* 0x0C00 */ 34 #define HCI_GRP_INFORMATIONAL_PARAMS (0x04 << 10) /* 0x1000 */ 35 #define HCI_GRP_STATUS_PARAMS (0x05 << 10) /* 0x1400 */ 36 #define HCI_GRP_TESTING_CMDS (0x06 << 10) /* 0x1800 */ 37 38 #define HCI_GRP_VENDOR_SPECIFIC (0x3F << 10) /* 0xFC00 */ 39 40 /* Group occupies high 6 bits of the HCI command rest is opcode itself */ 41 #define HCI_OGF(p) (UINT8)((0xFC00 & (p)) >> 10) 42 #define HCI_OCF(p) ( 0x3FF & (p)) 43 44 /* 45 ** Defentions for Link Control Commands 46 */ 47 /* Following opcode is used only in command complete event for flow control */ 48 #define HCI_COMMAND_NONE 0x0000 49 50 /* Commands of HCI_GRP_LINK_CONTROL_CMDS group */ 51 #define HCI_INQUIRY (0x0001 | HCI_GRP_LINK_CONTROL_CMDS) 52 #define HCI_INQUIRY_CANCEL (0x0002 | HCI_GRP_LINK_CONTROL_CMDS) 53 #define HCI_PERIODIC_INQUIRY_MODE (0x0003 | HCI_GRP_LINK_CONTROL_CMDS) 54 #define HCI_EXIT_PERIODIC_INQUIRY_MODE (0x0004 | HCI_GRP_LINK_CONTROL_CMDS) 55 #define HCI_CREATE_CONNECTION (0x0005 | HCI_GRP_LINK_CONTROL_CMDS) 56 #define HCI_DISCONNECT (0x0006 | HCI_GRP_LINK_CONTROL_CMDS) 57 #define HCI_ADD_SCO_CONNECTION (0x0007 | HCI_GRP_LINK_CONTROL_CMDS) 58 #define HCI_CREATE_CONNECTION_CANCEL (0x0008 | HCI_GRP_LINK_CONTROL_CMDS) 59 #define HCI_ACCEPT_CONNECTION_REQUEST (0x0009 | HCI_GRP_LINK_CONTROL_CMDS) 60 #define HCI_REJECT_CONNECTION_REQUEST (0x000A | HCI_GRP_LINK_CONTROL_CMDS) 61 #define HCI_LINK_KEY_REQUEST_REPLY (0x000B | HCI_GRP_LINK_CONTROL_CMDS) 62 #define HCI_LINK_KEY_REQUEST_NEG_REPLY (0x000C | HCI_GRP_LINK_CONTROL_CMDS) 63 #define HCI_PIN_CODE_REQUEST_REPLY (0x000D | HCI_GRP_LINK_CONTROL_CMDS) 64 #define HCI_PIN_CODE_REQUEST_NEG_REPLY (0x000E | HCI_GRP_LINK_CONTROL_CMDS) 65 #define HCI_CHANGE_CONN_PACKET_TYPE (0x000F | HCI_GRP_LINK_CONTROL_CMDS) 66 #define HCI_AUTHENTICATION_REQUESTED (0x0011 | HCI_GRP_LINK_CONTROL_CMDS) 67 #define HCI_SET_CONN_ENCRYPTION (0x0013 | HCI_GRP_LINK_CONTROL_CMDS) 68 #define HCI_CHANGE_CONN_LINK_KEY (0x0015 | HCI_GRP_LINK_CONTROL_CMDS) 69 #define HCI_MASTER_LINK_KEY (0x0017 | HCI_GRP_LINK_CONTROL_CMDS) 70 #define HCI_RMT_NAME_REQUEST (0x0019 | HCI_GRP_LINK_CONTROL_CMDS) 71 #define HCI_RMT_NAME_REQUEST_CANCEL (0x001A | HCI_GRP_LINK_CONTROL_CMDS) 72 #define HCI_READ_RMT_FEATURES (0x001B | HCI_GRP_LINK_CONTROL_CMDS) 73 #define HCI_READ_RMT_EXT_FEATURES (0x001C | HCI_GRP_LINK_CONTROL_CMDS) 74 #define HCI_READ_RMT_VERSION_INFO (0x001D | HCI_GRP_LINK_CONTROL_CMDS) 75 #define HCI_READ_RMT_CLOCK_OFFSET (0x001F | HCI_GRP_LINK_CONTROL_CMDS) 76 #define HCI_READ_LMP_HANDLE (0x0020 | HCI_GRP_LINK_CONTROL_CMDS) 77 #define HCI_SETUP_ESCO_CONNECTION (0x0028 | HCI_GRP_LINK_CONTROL_CMDS) 78 #define HCI_ACCEPT_ESCO_CONNECTION (0x0029 | HCI_GRP_LINK_CONTROL_CMDS) 79 #define HCI_REJECT_ESCO_CONNECTION (0x002A | HCI_GRP_LINK_CONTROL_CMDS) 80 #define HCI_IO_CAPABILITY_RESPONSE (0x002B | HCI_GRP_LINK_CONTROL_CMDS) 81 #define HCI_USER_CONF_REQUEST_REPLY (0x002C | HCI_GRP_LINK_CONTROL_CMDS) 82 #define HCI_USER_CONF_VALUE_NEG_REPLY (0x002D | HCI_GRP_LINK_CONTROL_CMDS) 83 #define HCI_USER_PASSKEY_REQ_REPLY (0x002E | HCI_GRP_LINK_CONTROL_CMDS) 84 #define HCI_USER_PASSKEY_REQ_NEG_REPLY (0x002F | HCI_GRP_LINK_CONTROL_CMDS) 85 #define HCI_REM_OOB_DATA_REQ_REPLY (0x0030 | HCI_GRP_LINK_CONTROL_CMDS) 86 #define HCI_REM_OOB_DATA_REQ_NEG_REPLY (0x0033 | HCI_GRP_LINK_CONTROL_CMDS) 87 #define HCI_IO_CAP_REQ_NEG_REPLY (0x0034 | HCI_GRP_LINK_CONTROL_CMDS) 88 89 /* AMP HCI */ 90 #define HCI_CREATE_PHYSICAL_LINK (0x0035 | HCI_GRP_LINK_CONTROL_CMDS) 91 #define HCI_ACCEPT_PHYSICAL_LINK (0x0036 | HCI_GRP_LINK_CONTROL_CMDS) 92 #define HCI_DISCONNECT_PHYSICAL_LINK (0x0037 | HCI_GRP_LINK_CONTROL_CMDS) 93 #define HCI_CREATE_LOGICAL_LINK (0x0038 | HCI_GRP_LINK_CONTROL_CMDS) 94 #define HCI_ACCEPT_LOGICAL_LINK (0x0039 | HCI_GRP_LINK_CONTROL_CMDS) 95 #define HCI_DISCONNECT_LOGICAL_LINK (0x003A | HCI_GRP_LINK_CONTROL_CMDS) 96 #define HCI_LOGICAL_LINK_CANCEL (0x003B | HCI_GRP_LINK_CONTROL_CMDS) 97 #define HCI_FLOW_SPEC_MODIFY (0x003C | HCI_GRP_LINK_CONTROL_CMDS) 98 99 #define HCI_ENH_SETUP_ESCO_CONNECTION (0x003D | HCI_GRP_LINK_CONTROL_CMDS) 100 #define HCI_ENH_ACCEPT_ESCO_CONNECTION (0x003E | HCI_GRP_LINK_CONTROL_CMDS) 101 102 /* ConnectionLess Broadcast */ 103 #define HCI_TRUNCATED_PAGE (0x003F | HCI_GRP_LINK_CONTROL_CMDS) 104 #define HCI_TRUNCATED_PAGE_CANCEL (0x0040 | HCI_GRP_LINK_CONTROL_CMDS) 105 #define HCI_SET_CLB (0x0041 | HCI_GRP_LINK_CONTROL_CMDS) 106 #define HCI_RECEIVE_CLB (0x0042 | HCI_GRP_LINK_CONTROL_CMDS) 107 #define HCI_START_SYNC_TRAIN (0x0043 | HCI_GRP_LINK_CONTROL_CMDS) 108 #define HCI_RECEIVE_SYNC_TRAIN (0x0044 | HCI_GRP_LINK_CONTROL_CMDS) 109 110 #define HCI_LINK_CTRL_CMDS_FIRST HCI_INQUIRY 111 #define HCI_LINK_CTRL_CMDS_LAST HCI_RECEIVE_SYNC_TRAIN 112 113 /* Commands of HCI_GRP_LINK_POLICY_CMDS */ 114 #define HCI_HOLD_MODE (0x0001 | HCI_GRP_LINK_POLICY_CMDS) 115 #define HCI_SNIFF_MODE (0x0003 | HCI_GRP_LINK_POLICY_CMDS) 116 #define HCI_EXIT_SNIFF_MODE (0x0004 | HCI_GRP_LINK_POLICY_CMDS) 117 #define HCI_PARK_MODE (0x0005 | HCI_GRP_LINK_POLICY_CMDS) 118 #define HCI_EXIT_PARK_MODE (0x0006 | HCI_GRP_LINK_POLICY_CMDS) 119 #define HCI_QOS_SETUP (0x0007 | HCI_GRP_LINK_POLICY_CMDS) 120 #define HCI_ROLE_DISCOVERY (0x0009 | HCI_GRP_LINK_POLICY_CMDS) 121 #define HCI_SWITCH_ROLE (0x000B | HCI_GRP_LINK_POLICY_CMDS) 122 #define HCI_READ_POLICY_SETTINGS (0x000C | HCI_GRP_LINK_POLICY_CMDS) 123 #define HCI_WRITE_POLICY_SETTINGS (0x000D | HCI_GRP_LINK_POLICY_CMDS) 124 #define HCI_READ_DEF_POLICY_SETTINGS (0x000E | HCI_GRP_LINK_POLICY_CMDS) 125 #define HCI_WRITE_DEF_POLICY_SETTINGS (0x000F | HCI_GRP_LINK_POLICY_CMDS) 126 #define HCI_FLOW_SPECIFICATION (0x0010 | HCI_GRP_LINK_POLICY_CMDS) 127 #define HCI_SNIFF_SUB_RATE (0x0011 | HCI_GRP_LINK_POLICY_CMDS) 128 129 #define HCI_LINK_POLICY_CMDS_FIRST HCI_HOLD_MODE 130 #define HCI_LINK_POLICY_CMDS_LAST HCI_SNIFF_SUB_RATE 131 132 133 /* Commands of HCI_GRP_HOST_CONT_BASEBAND_CMDS */ 134 #define HCI_SET_EVENT_MASK (0x0001 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 135 #define HCI_RESET (0x0003 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 136 #define HCI_SET_EVENT_FILTER (0x0005 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 137 #define HCI_FLUSH (0x0008 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 138 #define HCI_READ_PIN_TYPE (0x0009 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 139 #define HCI_WRITE_PIN_TYPE (0x000A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 140 #define HCI_CREATE_NEW_UNIT_KEY (0x000B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 141 #define HCI_GET_MWS_TRANS_LAYER_CFG (0x000C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 142 #define HCI_READ_STORED_LINK_KEY (0x000D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 143 #define HCI_WRITE_STORED_LINK_KEY (0x0011 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 144 #define HCI_DELETE_STORED_LINK_KEY (0x0012 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 145 #define HCI_CHANGE_LOCAL_NAME (0x0013 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 146 #define HCI_READ_LOCAL_NAME (0x0014 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 147 #define HCI_READ_CONN_ACCEPT_TOUT (0x0015 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 148 #define HCI_WRITE_CONN_ACCEPT_TOUT (0x0016 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 149 #define HCI_READ_PAGE_TOUT (0x0017 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 150 #define HCI_WRITE_PAGE_TOUT (0x0018 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 151 #define HCI_READ_SCAN_ENABLE (0x0019 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 152 #define HCI_WRITE_SCAN_ENABLE (0x001A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 153 #define HCI_READ_PAGESCAN_CFG (0x001B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 154 #define HCI_WRITE_PAGESCAN_CFG (0x001C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 155 #define HCI_READ_INQUIRYSCAN_CFG (0x001D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 156 #define HCI_WRITE_INQUIRYSCAN_CFG (0x001E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 157 #define HCI_READ_AUTHENTICATION_ENABLE (0x001F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 158 #define HCI_WRITE_AUTHENTICATION_ENABLE (0x0020 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 159 #define HCI_READ_ENCRYPTION_MODE (0x0021 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 160 #define HCI_WRITE_ENCRYPTION_MODE (0x0022 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 161 #define HCI_READ_CLASS_OF_DEVICE (0x0023 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 162 #define HCI_WRITE_CLASS_OF_DEVICE (0x0024 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 163 #define HCI_READ_VOICE_SETTINGS (0x0025 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 164 #define HCI_WRITE_VOICE_SETTINGS (0x0026 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 165 #define HCI_READ_AUTO_FLUSH_TOUT (0x0027 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 166 #define HCI_WRITE_AUTO_FLUSH_TOUT (0x0028 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 167 #define HCI_READ_NUM_BCAST_REXMITS (0x0029 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 168 #define HCI_WRITE_NUM_BCAST_REXMITS (0x002A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 169 #define HCI_READ_HOLD_MODE_ACTIVITY (0x002B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 170 #define HCI_WRITE_HOLD_MODE_ACTIVITY (0x002C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 171 #define HCI_READ_TRANSMIT_POWER_LEVEL (0x002D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 172 #define HCI_READ_SCO_FLOW_CTRL_ENABLE (0x002E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 173 #define HCI_WRITE_SCO_FLOW_CTRL_ENABLE (0x002F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 174 #define HCI_SET_HC_TO_HOST_FLOW_CTRL (0x0031 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 175 #define HCI_HOST_BUFFER_SIZE (0x0033 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 176 #define HCI_HOST_NUM_PACKETS_DONE (0x0035 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 177 #define HCI_READ_LINK_SUPER_TOUT (0x0036 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 178 #define HCI_WRITE_LINK_SUPER_TOUT (0x0037 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 179 #define HCI_READ_NUM_SUPPORTED_IAC (0x0038 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 180 #define HCI_READ_CURRENT_IAC_LAP (0x0039 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 181 #define HCI_WRITE_CURRENT_IAC_LAP (0x003A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 182 #define HCI_READ_PAGESCAN_PERIOD_MODE (0x003B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 183 #define HCI_WRITE_PAGESCAN_PERIOD_MODE (0x003C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 184 #define HCI_READ_PAGESCAN_MODE (0x003D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 185 #define HCI_WRITE_PAGESCAN_MODE (0x003E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 186 #define HCI_SET_AFH_CHANNELS (0x003F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 187 188 #define HCI_READ_INQSCAN_TYPE (0x0042 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 189 #define HCI_WRITE_INQSCAN_TYPE (0x0043 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 190 #define HCI_READ_INQUIRY_MODE (0x0044 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 191 #define HCI_WRITE_INQUIRY_MODE (0x0045 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 192 #define HCI_READ_PAGESCAN_TYPE (0x0046 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 193 #define HCI_WRITE_PAGESCAN_TYPE (0x0047 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 194 #define HCI_READ_AFH_ASSESSMENT_MODE (0x0048 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 195 #define HCI_WRITE_AFH_ASSESSMENT_MODE (0x0049 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 196 #define HCI_READ_EXT_INQ_RESPONSE (0x0051 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 197 #define HCI_WRITE_EXT_INQ_RESPONSE (0x0052 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 198 #define HCI_REFRESH_ENCRYPTION_KEY (0x0053 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 199 #define HCI_READ_SIMPLE_PAIRING_MODE (0x0055 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 200 #define HCI_WRITE_SIMPLE_PAIRING_MODE (0x0056 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 201 #define HCI_READ_LOCAL_OOB_DATA (0x0057 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 202 #define HCI_READ_INQ_TX_POWER_LEVEL (0x0058 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 203 #define HCI_WRITE_INQ_TX_POWER_LEVEL (0x0059 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 204 #define HCI_READ_ERRONEOUS_DATA_RPT (0x005A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 205 #define HCI_WRITE_ERRONEOUS_DATA_RPT (0x005B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 206 #define HCI_ENHANCED_FLUSH (0x005F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 207 #define HCI_SEND_KEYPRESS_NOTIF (0x0060 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 208 209 210 /* AMP HCI */ 211 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0061 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 212 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0062 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 213 #define HCI_SET_EVENT_MASK_PAGE_2 (0x0063 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 214 #define HCI_READ_LOCATION_DATA (0x0064 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 215 #define HCI_WRITE_LOCATION_DATA (0x0065 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 216 #define HCI_READ_FLOW_CONTROL_MODE (0x0066 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 217 #define HCI_WRITE_FLOW_CONTROL_MODE (0x0067 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 218 #define HCI_READ_BE_FLUSH_TOUT (0x0069 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 219 #define HCI_WRITE_BE_FLUSH_TOUT (0x006A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 220 #define HCI_SHORT_RANGE_MODE (0x006B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) /* 802.11 only */ 221 #define HCI_READ_LE_HOST_SUPPORTED (0x006C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 222 #define HCI_WRITE_LE_HOST_SUPPORTED (0x006D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 223 224 225 /* MWS coexistence */ 226 #define HCI_SET_MWS_CHANNEL_PARAMETERS (0x006E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 227 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION (0x006F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 228 #define HCI_SET_MWS_SIGNALING (0x0070 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 229 #define HCI_SET_MWS_TRANSPORT_LAYER (0x0071 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 230 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE (0x0072 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 231 #define HCI_SET_MWS_PATTERN_CONFIGURATION (0x0073 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 232 233 /* ConnectionLess Broadcast */ 234 #define HCI_SET_RESERVED_LT_ADDR (0x0074 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 235 #define HCI_DELETE_RESERVED_LT_ADDR (0x0075 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 236 #define HCI_WRITE_CLB_DATA (0x0076 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 237 #define HCI_READ_SYNC_TRAIN_PARAM (0x0077 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 238 #define HCI_WRITE_SYNC_TRAIN_PARAM (0x0078 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 239 240 #define HCI_CONT_BASEBAND_CMDS_FIRST HCI_SET_EVENT_MASK 241 #define HCI_CONT_BASEBAND_CMDS_LAST HCI_READ_SYNC_TRAIN_PARAM 242 243 244 /* Commands of HCI_GRP_INFORMATIONAL_PARAMS group */ 245 #define HCI_READ_LOCAL_VERSION_INFO (0x0001 | HCI_GRP_INFORMATIONAL_PARAMS) 246 #define HCI_READ_LOCAL_SUPPORTED_CMDS (0x0002 | HCI_GRP_INFORMATIONAL_PARAMS) 247 #define HCI_READ_LOCAL_FEATURES (0x0003 | HCI_GRP_INFORMATIONAL_PARAMS) 248 #define HCI_READ_LOCAL_EXT_FEATURES (0x0004 | HCI_GRP_INFORMATIONAL_PARAMS) 249 #define HCI_READ_BUFFER_SIZE (0x0005 | HCI_GRP_INFORMATIONAL_PARAMS) 250 #define HCI_READ_COUNTRY_CODE (0x0007 | HCI_GRP_INFORMATIONAL_PARAMS) 251 #define HCI_READ_BD_ADDR (0x0009 | HCI_GRP_INFORMATIONAL_PARAMS) 252 #define HCI_READ_DATA_BLOCK_SIZE (0x000A | HCI_GRP_INFORMATIONAL_PARAMS) 253 #define HCI_READ_LOCAL_SUPPORTED_CODECS (0x000B | HCI_GRP_INFORMATIONAL_PARAMS) 254 255 #define HCI_INFORMATIONAL_CMDS_FIRST HCI_READ_LOCAL_VERSION_INFO 256 #define HCI_INFORMATIONAL_CMDS_LAST HCI_READ_LOCAL_SUPPORTED_CODECS 257 258 259 /* Commands of HCI_GRP_STATUS_PARAMS group */ 260 #define HCI_READ_FAILED_CONTACT_COUNT (0x0001 | HCI_GRP_STATUS_PARAMS) 261 #define HCI_RESET_FAILED_CONTACT_COUNT (0x0002 | HCI_GRP_STATUS_PARAMS) 262 #define HCI_GET_LINK_QUALITY (0x0003 | HCI_GRP_STATUS_PARAMS) 263 #define HCI_READ_RSSI (0x0005 | HCI_GRP_STATUS_PARAMS) 264 #define HCI_READ_AFH_CH_MAP (0x0006 | HCI_GRP_STATUS_PARAMS) 265 #define HCI_READ_CLOCK (0x0007 | HCI_GRP_STATUS_PARAMS) 266 #define HCI_READ_ENCR_KEY_SIZE (0x0008 | HCI_GRP_STATUS_PARAMS) 267 268 /* AMP HCI */ 269 #define HCI_READ_LOCAL_AMP_INFO (0x0009 | HCI_GRP_STATUS_PARAMS) 270 #define HCI_READ_LOCAL_AMP_ASSOC (0x000A | HCI_GRP_STATUS_PARAMS) 271 #define HCI_WRITE_REMOTE_AMP_ASSOC (0x000B | HCI_GRP_STATUS_PARAMS) 272 273 #define HCI_STATUS_PARAMS_CMDS_FIRST HCI_READ_FAILED_CONTACT_COUNT 274 #define HCI_STATUS_PARAMS_CMDS_LAST HCI_WRITE_REMOTE_AMP_ASSOC 275 276 /* Commands of HCI_GRP_TESTING_CMDS group */ 277 #define HCI_READ_LOOPBACK_MODE (0x0001 | HCI_GRP_TESTING_CMDS) 278 #define HCI_WRITE_LOOPBACK_MODE (0x0002 | HCI_GRP_TESTING_CMDS) 279 #define HCI_ENABLE_DEV_UNDER_TEST_MODE (0x0003 | HCI_GRP_TESTING_CMDS) 280 #define HCI_WRITE_SIMP_PAIR_DEBUG_MODE (0x0004 | HCI_GRP_TESTING_CMDS) 281 282 /* AMP HCI */ 283 #define HCI_ENABLE_AMP_RCVR_REPORTS (0x0007 | HCI_GRP_TESTING_CMDS) 284 #define HCI_AMP_TEST_END (0x0008 | HCI_GRP_TESTING_CMDS) 285 #define HCI_AMP_TEST (0x0009 | HCI_GRP_TESTING_CMDS) 286 287 #define HCI_TESTING_CMDS_FIRST HCI_READ_LOOPBACK_MODE 288 #define HCI_TESTING_CMDS_LAST HCI_AMP_TEST 289 290 #define HCI_VENDOR_CMDS_FIRST 0x0001 291 #define HCI_VENDOR_CMDS_LAST 0xFFFF 292 #define HCI_VSC_MULTI_AV_HANDLE 0x0AAA 293 #define HCI_VSC_BURST_MODE_HANDLE 0x0BBB 294 295 /* BLE HCI */ 296 #define HCI_GRP_BLE_CMDS (0x08 << 10) 297 /* Commands of BLE Controller setup and configuration */ 298 #define HCI_BLE_SET_EVENT_MASK (0x0001 | HCI_GRP_BLE_CMDS) 299 #define HCI_BLE_READ_BUFFER_SIZE (0x0002 | HCI_GRP_BLE_CMDS) 300 #define HCI_BLE_READ_LOCAL_SPT_FEAT (0x0003 | HCI_GRP_BLE_CMDS) 301 #define HCI_BLE_WRITE_LOCAL_SPT_FEAT (0x0004 | HCI_GRP_BLE_CMDS) 302 #define HCI_BLE_WRITE_RANDOM_ADDR (0x0005 | HCI_GRP_BLE_CMDS) 303 #define HCI_BLE_WRITE_ADV_PARAMS (0x0006 | HCI_GRP_BLE_CMDS) 304 #define HCI_BLE_READ_ADV_CHNL_TX_POWER (0x0007 | HCI_GRP_BLE_CMDS) 305 #define HCI_BLE_WRITE_ADV_DATA (0x0008 | HCI_GRP_BLE_CMDS) 306 #define HCI_BLE_WRITE_SCAN_RSP_DATA (0x0009 | HCI_GRP_BLE_CMDS) 307 #define HCI_BLE_WRITE_ADV_ENABLE (0x000A | HCI_GRP_BLE_CMDS) 308 #define HCI_BLE_WRITE_SCAN_PARAMS (0x000B | HCI_GRP_BLE_CMDS) 309 #define HCI_BLE_WRITE_SCAN_ENABLE (0x000C | HCI_GRP_BLE_CMDS) 310 #define HCI_BLE_CREATE_LL_CONN (0x000D | HCI_GRP_BLE_CMDS) 311 #define HCI_BLE_CREATE_CONN_CANCEL (0x000E | HCI_GRP_BLE_CMDS) 312 #define HCI_BLE_READ_WHITE_LIST_SIZE (0x000F | HCI_GRP_BLE_CMDS) 313 #define HCI_BLE_CLEAR_WHITE_LIST (0x0010 | HCI_GRP_BLE_CMDS) 314 #define HCI_BLE_ADD_WHITE_LIST (0x0011 | HCI_GRP_BLE_CMDS) 315 #define HCI_BLE_REMOVE_WHITE_LIST (0x0012 | HCI_GRP_BLE_CMDS) 316 #define HCI_BLE_UPD_LL_CONN_PARAMS (0x0013 | HCI_GRP_BLE_CMDS) 317 #define HCI_BLE_SET_HOST_CHNL_CLASS (0x0014 | HCI_GRP_BLE_CMDS) 318 #define HCI_BLE_READ_CHNL_MAP (0x0015 | HCI_GRP_BLE_CMDS) 319 #define HCI_BLE_READ_REMOTE_FEAT (0x0016 | HCI_GRP_BLE_CMDS) 320 #define HCI_BLE_ENCRYPT (0x0017 | HCI_GRP_BLE_CMDS) 321 #define HCI_BLE_RAND (0x0018 | HCI_GRP_BLE_CMDS) 322 #define HCI_BLE_START_ENC (0x0019 | HCI_GRP_BLE_CMDS) 323 #define HCI_BLE_LTK_REQ_REPLY (0x001A | HCI_GRP_BLE_CMDS) 324 #define HCI_BLE_LTK_REQ_NEG_REPLY (0x001B | HCI_GRP_BLE_CMDS) 325 #define HCI_BLE_READ_SUPPORTED_STATES (0x001C | HCI_GRP_BLE_CMDS) 326 /*0x001D, 0x001E and 0x001F are reserved*/ 327 328 #define HCI_BLE_RC_PARAM_REQ_REPLY (0x0020 | HCI_GRP_BLE_CMDS) 329 #define HCI_BLE_RC_PARAM_REQ_NEG_REPLY (0x0021 | HCI_GRP_BLE_CMDS) 330 331 332 /* BLE TEST COMMANDS */ 333 #define HCI_BLE_RECEIVER_TEST (0x001D | HCI_GRP_BLE_CMDS) 334 #define HCI_BLE_TRANSMITTER_TEST (0x001E | HCI_GRP_BLE_CMDS) 335 #define HCI_BLE_TEST_END (0x001F | HCI_GRP_BLE_CMDS) 336 337 /* LE Get Vendor Capabilities Command OCF */ 338 #define HCI_BLE_VENDOR_CAP_OCF (0x0153 | HCI_GRP_VENDOR_SPECIFIC) 339 340 /* Multi adv OCF */ 341 #define HCI_BLE_MULTI_ADV_OCF (0x0154 | HCI_GRP_VENDOR_SPECIFIC) 342 343 /* Batch scan OCF */ 344 #define HCI_BLE_BATCH_SCAN_OCF (0x0156 | HCI_GRP_VENDOR_SPECIFIC) 345 346 /* ADV filter OCF */ 347 #define HCI_BLE_ADV_FILTER_OCF (0x0157 | HCI_GRP_VENDOR_SPECIFIC) 348 349 /* Tracking OCF */ 350 #define HCI_BLE_TRACK_ADV_OCF (0x0158 | HCI_GRP_VENDOR_SPECIFIC) 351 352 /* Energy info OCF */ 353 #define HCI_BLE_ENERGY_INFO_OCF (0x0159 | HCI_GRP_VENDOR_SPECIFIC) 354 355 /* subcode for multi adv feature */ 356 #define BTM_BLE_MULTI_ADV_SET_PARAM 0x01 357 #define BTM_BLE_MULTI_ADV_WRITE_ADV_DATA 0x02 358 #define BTM_BLE_MULTI_ADV_WRITE_SCAN_RSP_DATA 0x03 359 #define BTM_BLE_MULTI_ADV_SET_RANDOM_ADDR 0x04 360 #define BTM_BLE_MULTI_ADV_ENB 0x05 361 362 /* multi adv VSE subcode */ 363 #define HCI_VSE_SUBCODE_BLE_MULTI_ADV_ST_CHG 0x55 /* multi adv instance state change */ 364 365 /* subcode for batch scan feature */ 366 #define BTM_BLE_BATCH_SCAN_ENB_DISAB_CUST_FEATURE 0x01 367 #define BTM_BLE_BATCH_SCAN_SET_STORAGE_PARAM 0x02 368 #define BTM_BLE_BATCH_SCAN_SET_PARAMS 0x03 369 #define BTM_BLE_BATCH_SCAN_READ_RESULTS 0x04 370 371 /* batch scan VSE subcode */ 372 #define HCI_VSE_SUBCODE_BLE_THRESHOLD_SUB_EVT 0x54 /* Threshold event */ 373 374 /* tracking sub event */ 375 #define HCI_VSE_SUBCODE_BLE_TRACKING_SUB_EVT 0x56 /* Tracking event */ 376 377 /* LE supported states definition */ 378 #define HCI_LE_ADV_STATE 0x00000001 379 #define HCI_LE_SCAN_STATE 0x00000002 380 #define HCI_LE_INIT_STATE 0x00000004 381 #define HCI_LE_CONN_SL_STATE 0x00000008 382 #define HCI_LE_ADV_SCAN_STATE 0x00000010 383 #define HCI_LE_ADV_INIT_STATE 0x00000020 384 #define HCI_LE_ADV_MA_STATE 0x00000040 385 #define HCI_LE_ADV_SL_STATE 0x00000080 386 #define HCI_LE_SCAN_INIT_STATE 0x00000100 387 #define HCI_LE_SCAN_MA_STATE 0x00000200 388 #define HCI_LE_SCAN_SL_STATE 0x00000400 389 #define HCI_LE_INIT_MA_STATE 0x00000800 390 391 /* LE Supported States */ 392 /* Non Connectable Adv state is supported. 0x0000000000000001 */ 393 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASK 0x01 394 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_OFF 0 395 #define HCI_LE_STATES_NON_CONN_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_MASK) 396 397 /*Scanneable Connectable Adv state is supported. 0x0000000000000002 */ 398 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASK 0x02 399 #define HCI_SUPP_LE_STATESSCAN_ADV_OFF 0 400 #define HCI_LE_STATES_SCAN_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATESSCAN_ADV_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_MASK) 401 402 /* Connectable Adv state is supported. 0x0000000000000004 */ 403 #define HCI_SUPP_LE_STATES_CONN_ADV_MASK 0x04 404 #define HCI_SUPP_LE_STATES_CONN_ADV_OFF 0 405 #define HCI_LE_STATES_CONN_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_MASK) 406 407 /* Hi duty Cycle Directed Adv state is supported. 0x0000000000000008 */ 408 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASK 0x08 409 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_OFF 0 410 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASK) 411 412 /* Passive Scan state is supported. 0x0000000000000010 */ 413 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASK 0x10 414 #define HCI_SUPP_LE_STATES_PASS_SCAN_OFF 0 415 #define HCI_LE_STATES_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_MASK) 416 417 /* Active Scan state is supported. 0x0000000000000020 */ 418 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASK 0x20 419 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_OFF 0 420 #define HCI_LE_STATES_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASK) 421 422 /* Initiating state is supported. 0x0000000000000040 (or connection state in master role is also supported) */ 423 #define HCI_SUPP_LE_STATES_INIT_MASK 0x40 424 #define HCI_SUPP_LE_STATES_INIT_OFF 0 425 #define HCI_LE_STATES_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_INIT_OFF] & HCI_SUPP_LE_STATES_INIT_MASK) 426 427 /*connection state in slave role is also supported. 0x0000000000000080 */ 428 #define HCI_SUPP_LE_STATES_SLAVE_MASK 0x80 429 #define HCI_SUPP_LE_STATES_SLAVE_OFF 0 430 #define HCI_LE_STATES_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SLAVE_OFF] & HCI_SUPP_LE_STATES_SLAVE_MASK) 431 432 /* Non Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000000100 */ 433 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_MASK 0x01 434 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_OFF 1 435 #define HCI_LE_STATES_NON_CONN_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_MASK) 436 437 /*Scannable Adv state and Passive Scanning State combination is supported. 0x0000000000000200 */ 438 #define HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_MASK 0x02 439 #define HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_OFF 1 440 #define HCI_LE_STATES_SCAN_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_MASK) 441 442 /*Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000000400 */ 443 #define HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_MASK 0x04 444 #define HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_OFF 1 445 #define HCI_LE_STATES_CONN_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_MASK) 446 447 /*High Duty Cycl Directed ADv and Passive Scanning State combination is supported. 0x0000000000000800 */ 448 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_MASK 0x08 449 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_OFF 1 450 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_MASK] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_OFF) 451 452 /*Non Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000001000 */ 453 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_MASK 0x10 454 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_OFF 1 455 #define HCI_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_MASK) 456 457 /*Scannable Adv state and Active Scanning State combination is supported. 0x0000000000002000 */ 458 #define HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_MASK 0x20 459 #define HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_OFF 1 460 #define HCI_LE_STATES_SCAN_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_MASK) 461 462 /*Connectable Adv state and Active Scanning State combination is supported. 0x0000000000004000 */ 463 #define HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_MASK 0x40 464 #define HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_OFF 1 465 #define HCI_LE_STATES_CONN_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_MASK) 466 467 /*High Duty Cycl Directed ADv and ACtive Scanning State combination is supported. 0x0000000000008000 */ 468 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_MASK 0x80 469 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_OFF 1 470 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_MASK] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_OFF) 471 472 /*Non-Connectable Adv state and Initiating State combination is supported. 0x0000000000010000 */ 473 #define HCI_SUPP_LE_STATES_NON_CONN_INIT_MASK 0x01 474 #define HCI_SUPP_LE_STATES_NON_CONN_INIT_OFF 2 475 #define HCI_LE_STATES_NON_CONN_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_INIT_OFF] & HCI_SUPP_LE_STATES_NON_CONN_INIT_MASK) 476 477 /* Scannable Adv state and Initiating State combination is supported. 0x0000000000020000 */ 478 #define HCI_SUPP_LE_STATES_SCAN_ADV_INIT_MASK 0x02 479 #define HCI_SUPP_LE_STATES_SCAN_ADV_INIT_OFF 2 480 #define HCI_LE_STATES_SCAN_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_INIT_MASK) 481 482 /* Non-Connectable Adv state and Master Role combination is supported. 0x0000000000040000 */ 483 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_MASK 0x04 484 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_OFF 2 485 #define HCI_LE_STATES_NON_CONN_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_MASK) 486 487 /*Scannable Adv state and Master Role combination is supported. 0x0000000000040000 */ 488 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_MASK 0x08 489 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_OFF 2 490 #define HCI_LE_STATES_SCAN_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_MASK) 491 492 /* Non-Connectable Adv and Slave Role combination is supported. 0x000000000100000 */ 493 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_MASK 0x10 494 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_OFF 2 495 #define HCI_LE_STATES_NON_CONN_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_MASK) 496 497 /*Scannable Adv and Slave Role combination is supported. 0x000000000200000 */ 498 #define HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_MASK 0x20 499 #define HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_OFF 2 500 #define HCI_LE_STATES_SCAN_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_MASK) 501 502 /*Passive Scan and Initiating State combination is supported. 0x000000000400000 */ 503 #define HCI_SUPP_LE_STATES_PASS_SCAN_INIT_MASK 0x40 504 #define HCI_SUPP_LE_STATES_PASS_SCAN_INIT_OFF 2 505 #define HCI_LE_STATES_PASS_SCAN_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_INIT_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_INIT_MASK) 506 507 /*Active Scan and Initiating State combination is supported. 0x000000000800000 */ 508 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_MASK 0x80 509 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_OFF 2 510 #define HCI_LE_STATES_ACTIVE_SCAN_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_MASK) 511 512 /*Passive Scan and Master Role combination is supported. 0x000000001000000 */ 513 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_MASK 0x01 514 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_OFF 3 515 #define HCI_LE_STATES_PASS_SCAN_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_MASK) 516 517 /*Active Scan and Master Role combination is supported. 0x000000002000000 */ 518 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_MASK 0x02 519 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_OFF 3 520 #define HCI_LE_STATES_ACTIVE_SCAN_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_MASK) 521 522 /*Passive Scan and Slave Role combination is supported. 0x000000004000000 */ 523 #define HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_MASK 0x04 524 #define HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_OFF 3 525 #define HCI_LE_STATES_PASS_SCAN_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_MASK) 526 527 /*Active Scan and Slave Role combination is supported. 0x000000008000000 */ 528 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_MASK 0x08 529 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_OFF 3 530 #define HCI_LE_STATES_ACTIVE_SCAN_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_MASK) 531 532 /*Link Layer Topology Added States Combo */ 533 /*Initiating State and Master Role combination supported. 534 Master Role and Master Role combination is also supported. 0x0000000010000000 */ 535 #define HCI_SUPP_LE_STATES_INIT_MASTER_MASK 0x10 536 #define HCI_SUPP_LE_STATES_INIT_MASTER_OFF 3 537 #define HCI_LE_STATES_INIT_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_INIT_MASTER_OFF] & HCI_SUPP_LE_STATES_INIT_MASTER_MASK) 538 539 /* Connectable Advertising State and Initiating State combination supported. 0x0000000100000000 */ 540 #define HCI_SUPP_LE_STATES_CONN_ADV_INIT_MASK 0x01 541 #define HCI_SUPP_LE_STATES_CONN_ADV_INIT_OFF 4 542 #define HCI_LE_STATES_CONN_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_INIT_MASK) 543 544 /* High Duty Cycle Directed Advertising State and Initiating State combination supported. */ 545 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_MASK 0x02 546 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_OFF 4 547 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_MASK) 548 549 /* Low Duty Cycle Directed Advertising State and Initiating State combination supported.*/ 550 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_MASK 0x04 551 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_OFF 4 552 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_MASK) 553 554 /* Connectable Advertising State and Master Role combination supported.*/ 555 #define HCI_SUPP_LE_STATES_CONN_ADV_MASTER_MASK 0x08 556 #define HCI_SUPP_LE_STATES_CONN_ADV_MASTER_OFF 4 557 #define HCI_LE_STATES_CONN_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_MASTER_MASK) 558 559 /* High Duty Cycle Directed Advertising State and Master Role combination supported.*/ 560 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_MASK 0x10 561 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_OFF 4 562 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_MASK) 563 564 /* Low Duty Cycle Directed Advertising State and Master Role combination supported.*/ 565 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_MASK 0x20 566 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_OFF 4 567 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_MASTER_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_MASK) 568 569 /* Connectable Advertising State and Slave Role combination supported. */ 570 #define HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_MASK 0x40 571 #define HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_OFF 4 572 #define HCI_LE_STATES_CONN_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_MASK) 573 574 /* High Duty Cycle Directed Advertising State and slave Role combination supported.*/ 575 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_MASK 0x80 576 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_OFF 4 577 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_MASK) 578 579 /* Low Duty Cycle Directed Advertising State and slave Role combination supported.*/ 580 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_MASK 0x01 581 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_OFF 5 582 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_MASK) 583 584 /* Initiating State and Slave Role combination supported. 585 Master Role and Slave Role combination also supported. 586 */ 587 #define HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_MASK 0x02 588 #define HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_OFF 5 589 #define HCI_LE_STATES_INIT_MASTER_SLAVE_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_OFF] & HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_MASK) 590 591 #define HCI_BRCM_ENABLE_WBS_MODIFIED (0x0102 | HCI_GRP_VENDOR_SPECIFIC) 592 593 /* ConnectionLess Broadcast Stream VSC */ 594 #define HCI_BRCM_SET_CLB_STREAM (0x0111 | HCI_GRP_VENDOR_SPECIFIC) 595 #define HCI_BRCM_RECEIVE_CLB_STREAM (0x0112 | HCI_GRP_VENDOR_SPECIFIC) 596 #define HCI_BRCM_WRITE_CLB_STREAM_DATA (0x0113 | HCI_GRP_VENDOR_SPECIFIC) 597 #define HCI_BRCM_CLB_STREAM_FLUSH (0x0114 | HCI_GRP_VENDOR_SPECIFIC) 598 599 /* 600 ** Definitions for HCI Events 601 */ 602 #define HCI_INQUIRY_COMP_EVT 0x01 603 #define HCI_INQUIRY_RESULT_EVT 0x02 604 #define HCI_CONNECTION_COMP_EVT 0x03 605 #define HCI_CONNECTION_REQUEST_EVT 0x04 606 #define HCI_DISCONNECTION_COMP_EVT 0x05 607 #define HCI_AUTHENTICATION_COMP_EVT 0x06 608 #define HCI_RMT_NAME_REQUEST_COMP_EVT 0x07 609 #define HCI_ENCRYPTION_CHANGE_EVT 0x08 610 #define HCI_CHANGE_CONN_LINK_KEY_EVT 0x09 611 #define HCI_MASTER_LINK_KEY_COMP_EVT 0x0A 612 #define HCI_READ_RMT_FEATURES_COMP_EVT 0x0B 613 #define HCI_READ_RMT_VERSION_COMP_EVT 0x0C 614 #define HCI_QOS_SETUP_COMP_EVT 0x0D 615 #define HCI_COMMAND_COMPLETE_EVT 0x0E 616 #define HCI_COMMAND_STATUS_EVT 0x0F 617 #define HCI_HARDWARE_ERROR_EVT 0x10 618 #define HCI_FLUSH_OCCURED_EVT 0x11 619 #define HCI_ROLE_CHANGE_EVT 0x12 620 #define HCI_NUM_COMPL_DATA_PKTS_EVT 0x13 621 #define HCI_MODE_CHANGE_EVT 0x14 622 #define HCI_RETURN_LINK_KEYS_EVT 0x15 623 #define HCI_PIN_CODE_REQUEST_EVT 0x16 624 #define HCI_LINK_KEY_REQUEST_EVT 0x17 625 #define HCI_LINK_KEY_NOTIFICATION_EVT 0x18 626 #define HCI_LOOPBACK_COMMAND_EVT 0x19 627 #define HCI_DATA_BUF_OVERFLOW_EVT 0x1A 628 #define HCI_MAX_SLOTS_CHANGED_EVT 0x1B 629 #define HCI_READ_CLOCK_OFF_COMP_EVT 0x1C 630 #define HCI_CONN_PKT_TYPE_CHANGE_EVT 0x1D 631 #define HCI_QOS_VIOLATION_EVT 0x1E 632 #define HCI_PAGE_SCAN_MODE_CHANGE_EVT 0x1F 633 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EVT 0x20 634 #define HCI_FLOW_SPECIFICATION_COMP_EVT 0x21 635 #define HCI_INQUIRY_RSSI_RESULT_EVT 0x22 636 #define HCI_READ_RMT_EXT_FEATURES_COMP_EVT 0x23 637 #define HCI_ESCO_CONNECTION_COMP_EVT 0x2C 638 #define HCI_ESCO_CONNECTION_CHANGED_EVT 0x2D 639 #define HCI_SNIFF_SUB_RATE_EVT 0x2E 640 #define HCI_EXTENDED_INQUIRY_RESULT_EVT 0x2F 641 #define HCI_ENCRYPTION_KEY_REFRESH_COMP_EVT 0x30 642 #define HCI_IO_CAPABILITY_REQUEST_EVT 0x31 643 #define HCI_IO_CAPABILITY_RESPONSE_EVT 0x32 644 #define HCI_USER_CONFIRMATION_REQUEST_EVT 0x33 645 #define HCI_USER_PASSKEY_REQUEST_EVT 0x34 646 #define HCI_REMOTE_OOB_DATA_REQUEST_EVT 0x35 647 #define HCI_SIMPLE_PAIRING_COMPLETE_EVT 0x36 648 #define HCI_LINK_SUPER_TOUT_CHANGED_EVT 0x38 649 #define HCI_ENHANCED_FLUSH_COMPLETE_EVT 0x39 650 #define HCI_USER_PASSKEY_NOTIFY_EVT 0x3B 651 #define HCI_KEYPRESS_NOTIFY_EVT 0x3C 652 #define HCI_RMT_HOST_SUP_FEAT_NOTIFY_EVT 0x3D 653 654 /*#define HCI_GENERIC_AMP_LINK_KEY_NOTIF_EVT 0x3E Removed from spec */ 655 #define HCI_PHYSICAL_LINK_COMP_EVT 0x40 656 #define HCI_CHANNEL_SELECTED_EVT 0x41 657 #define HCI_DISC_PHYSICAL_LINK_COMP_EVT 0x42 658 #define HCI_PHY_LINK_LOSS_EARLY_WARNING_EVT 0x43 659 #define HCI_PHY_LINK_RECOVERY_EVT 0x44 660 #define HCI_LOGICAL_LINK_COMP_EVT 0x45 661 #define HCI_DISC_LOGICAL_LINK_COMP_EVT 0x46 662 #define HCI_FLOW_SPEC_MODIFY_COMP_EVT 0x47 663 #define HCI_NUM_COMPL_DATA_BLOCKS_EVT 0x48 664 #define HCI_SHORT_RANGE_MODE_COMPLETE_EVT 0x4C 665 #define HCI_AMP_STATUS_CHANGE_EVT 0x4D 666 #define HCI_SET_TRIGGERED_CLOCK_CAPTURE_EVT 0x4E 667 668 /* ULP HCI Event */ 669 #define HCI_BLE_EVENT 0x03E 670 /* ULP Event sub code */ 671 #define HCI_BLE_CONN_COMPLETE_EVT 0x01 672 #define HCI_BLE_ADV_PKT_RPT_EVT 0x02 673 #define HCI_BLE_LL_CONN_PARAM_UPD_EVT 0x03 674 #define HCI_BLE_READ_REMOTE_FEAT_CMPL_EVT 0x04 675 #define HCI_BLE_LTK_REQ_EVT 0x05 676 #define HCI_BLE_RC_PARAM_REQ_EVT 0x06 677 678 /* Definitions for LE Channel Map */ 679 #define HCI_BLE_CHNL_MAP_SIZE 5 680 681 682 #define HCI_EVENT_RSP_FIRST HCI_INQUIRY_COMP_EVT 683 #define HCI_EVENT_RSP_LAST HCI_CLB_CHANNEL_CHANGE_EVT 684 685 #define HCI_VENDOR_SPECIFIC_EVT 0xFF /* Vendor specific events */ 686 #define HCI_NAP_TRACE_EVT 0xFF /* was define 0xFE, 0xFD, change to 0xFF 687 because conflict w/ TCI_EVT and per 688 specification compliant */ 689 690 /* the event mask for BLE event mask */ 691 #define HCI_BLE_EVENT_MASK_DEF "\x00\x00\x00\x00\x00\x00\x00\x3f" 692 693 694 695 /* 696 ** Defentions for HCI Error Codes that are past in the events 697 */ 698 #define HCI_SUCCESS 0x00 699 #define HCI_PENDING 0x00 700 #define HCI_ERR_ILLEGAL_COMMAND 0x01 701 #define HCI_ERR_NO_CONNECTION 0x02 702 #define HCI_ERR_HW_FAILURE 0x03 703 #define HCI_ERR_PAGE_TIMEOUT 0x04 704 #define HCI_ERR_AUTH_FAILURE 0x05 705 #define HCI_ERR_KEY_MISSING 0x06 706 #define HCI_ERR_MEMORY_FULL 0x07 707 #define HCI_ERR_CONNECTION_TOUT 0x08 708 #define HCI_ERR_MAX_NUM_OF_CONNECTIONS 0x09 709 #define HCI_ERR_MAX_NUM_OF_SCOS 0x0A 710 #define HCI_ERR_CONNECTION_EXISTS 0x0B 711 #define HCI_ERR_COMMAND_DISALLOWED 0x0C 712 #define HCI_ERR_HOST_REJECT_RESOURCES 0x0D 713 #define HCI_ERR_HOST_REJECT_SECURITY 0x0E 714 #define HCI_ERR_HOST_REJECT_DEVICE 0x0F 715 #define HCI_ERR_HOST_TIMEOUT 0x10 716 #define HCI_ERR_UNSUPPORTED_VALUE 0x11 717 #define HCI_ERR_ILLEGAL_PARAMETER_FMT 0x12 718 #define HCI_ERR_PEER_USER 0x13 719 #define HCI_ERR_PEER_LOW_RESOURCES 0x14 720 #define HCI_ERR_PEER_POWER_OFF 0x15 721 #define HCI_ERR_CONN_CAUSE_LOCAL_HOST 0x16 722 #define HCI_ERR_REPEATED_ATTEMPTS 0x17 723 #define HCI_ERR_PAIRING_NOT_ALLOWED 0x18 724 #define HCI_ERR_UNKNOWN_LMP_PDU 0x19 725 #define HCI_ERR_UNSUPPORTED_REM_FEATURE 0x1A 726 #define HCI_ERR_SCO_OFFSET_REJECTED 0x1B 727 #define HCI_ERR_SCO_INTERVAL_REJECTED 0x1C 728 #define HCI_ERR_SCO_AIR_MODE 0x1D 729 #define HCI_ERR_INVALID_LMP_PARAM 0x1E 730 #define HCI_ERR_UNSPECIFIED 0x1F 731 #define HCI_ERR_UNSUPPORTED_LMP_FEATURE 0x20 732 #define HCI_ERR_ROLE_CHANGE_NOT_ALLOWED 0x21 733 #define HCI_ERR_LMP_RESPONSE_TIMEOUT 0x22 734 #define HCI_ERR_LMP_ERR_TRANS_COLLISION 0x23 735 #define HCI_ERR_LMP_PDU_NOT_ALLOWED 0x24 736 #define HCI_ERR_ENCRY_MODE_NOT_ACCEPTABLE 0x25 737 #define HCI_ERR_UNIT_KEY_USED 0x26 738 #define HCI_ERR_QOS_NOT_SUPPORTED 0x27 739 #define HCI_ERR_INSTANT_PASSED 0x28 740 #define HCI_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUPPORTED 0x29 741 #define HCI_ERR_DIFF_TRANSACTION_COLLISION 0x2A 742 #define HCI_ERR_UNDEFINED_0x2B 0x2B 743 #define HCI_ERR_QOS_UNACCEPTABLE_PARAM 0x2C 744 #define HCI_ERR_QOS_REJECTED 0x2D 745 #define HCI_ERR_CHAN_CLASSIF_NOT_SUPPORTED 0x2E 746 #define HCI_ERR_INSUFFCIENT_SECURITY 0x2F 747 #define HCI_ERR_PARAM_OUT_OF_RANGE 0x30 748 #define HCI_ERR_UNDEFINED_0x31 0x31 749 #define HCI_ERR_ROLE_SWITCH_PENDING 0x32 750 #define HCI_ERR_UNDEFINED_0x33 0x33 751 #define HCI_ERR_RESERVED_SLOT_VIOLATION 0x34 752 #define HCI_ERR_ROLE_SWITCH_FAILED 0x35 753 #define HCI_ERR_INQ_RSP_DATA_TOO_LARGE 0x36 754 #define HCI_ERR_SIMPLE_PAIRING_NOT_SUPPORTED 0x37 755 #define HCI_ERR_HOST_BUSY_PAIRING 0x38 756 #define HCI_ERR_REJ_NO_SUITABLE_CHANNEL 0x39 757 #define HCI_ERR_CONTROLLER_BUSY 0x3A 758 #define HCI_ERR_UNACCEPT_CONN_INTERVAL 0x3B 759 #define HCI_ERR_DIRECTED_ADVERTISING_TIMEOUT 0x3C 760 #define HCI_ERR_CONN_TOUT_DUE_TO_MIC_FAILURE 0x3D 761 #define HCI_ERR_CONN_FAILED_ESTABLISHMENT 0x3E 762 #define HCI_ERR_MAC_CONNECTION_FAILED 0x3F 763 764 /* ConnectionLess Broadcast errors */ 765 #define HCI_ERR_LT_ADDR_ALREADY_IN_USE 0x40 766 #define HCI_ERR_LT_ADDR_NOT_ALLOCATED 0x41 767 #define HCI_ERR_CLB_NOT_ENABLED 0x42 768 #define HCI_ERR_CLB_DATA_TOO_BIG 0x43 769 770 #define HCI_ERR_MAX_ERR 0x43 771 772 #define HCI_HINT_TO_RECREATE_AMP_PHYS_LINK 0xFF 773 774 /* 775 ** Definitions for HCI enable event 776 */ 777 #define HCI_INQUIRY_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000001) 778 #define HCI_INQUIRY_RESULT_EV(p) (*((UINT32 *)(p)) & 0x00000002) 779 #define HCI_CONNECTION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000004) 780 #define HCI_CONNECTION_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00000008) 781 #define HCI_DISCONNECTION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000010) 782 #define HCI_AUTHENTICATION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000020) 783 #define HCI_RMT_NAME_REQUEST_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000040) 784 #define HCI_CHANGE_CONN_ENCRPT_ENABLE_EV(p) (*((UINT32 *)(p)) & 0x00000080) 785 #define HCI_CHANGE_CONN_LINK_KEY_EV(p) (*((UINT32 *)(p)) & 0x00000100) 786 #define HCI_MASTER_LINK_KEY_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000200) 787 #define HCI_READ_RMT_FEATURES_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000400) 788 #define HCI_READ_RMT_VERSION_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000800) 789 #define HCI_QOS_SETUP_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00001000) 790 #define HCI_COMMAND_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00002000) 791 #define HCI_COMMAND_STATUS_EV(p) (*((UINT32 *)(p)) & 0x00004000) 792 #define HCI_HARDWARE_ERROR_EV(p) (*((UINT32 *)(p)) & 0x00008000) 793 #define HCI_FLASH_OCCURED_EV(p) (*((UINT32 *)(p)) & 0x00010000) 794 #define HCI_ROLE_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x00020000) 795 #define HCI_NUM_COMPLETED_PKTS_EV(p) (*((UINT32 *)(p)) & 0x00040000) 796 #define HCI_MODE_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x00080000) 797 #define HCI_RETURN_LINK_KEYS_EV(p) (*((UINT32 *)(p)) & 0x00100000) 798 #define HCI_PIN_CODE_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00200000) 799 #define HCI_LINK_KEY_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00400000) 800 #define HCI_LINK_KEY_NOTIFICATION_EV(p) (*((UINT32 *)(p)) & 0x00800000) 801 #define HCI_LOOPBACK_COMMAND_EV(p) (*((UINT32 *)(p)) & 0x01000000) 802 #define HCI_DATA_BUF_OVERFLOW_EV(p) (*((UINT32 *)(p)) & 0x02000000) 803 #define HCI_MAX_SLOTS_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x04000000) 804 #define HCI_READ_CLOCK_OFFSET_COMP_EV(p) (*((UINT32 *)(p)) & 0x08000000) 805 #define HCI_CONN_PKT_TYPE_CHANGED_EV(p) (*((UINT32 *)(p)) & 0x10000000) 806 #define HCI_QOS_VIOLATION_EV(p) (*((UINT32 *)(p)) & 0x20000000) 807 #define HCI_PAGE_SCAN_MODE_CHANGED_EV(p) (*((UINT32 *)(p)) & 0x40000000) 808 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EV(p) (*((UINT32 *)(p)) & 0x80000000) 809 810 /* the default event mask for 2.1+EDR (Lisbon) does not include Lisbon events */ 811 #define HCI_DEFAULT_EVENT_MASK_0 0xFFFFFFFF 812 #define HCI_DEFAULT_EVENT_MASK_1 0x00001FFF 813 814 /* the event mask for 2.0 + EDR and later (includes Lisbon events) */ 815 #define HCI_LISBON_EVENT_MASK_0 0xFFFFFFFF 816 #define HCI_LISBON_EVENT_MASK_1 0x1DBFFFFF 817 #define HCI_LISBON_EVENT_MASK "\x0D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 818 #define HCI_LISBON_EVENT_MASK_EXT "\x1D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 819 #define HCI_DUMO_EVENT_MASK_EXT "\x3D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 820 /* 0x00001FFF FFFFFFFF Default - no Lisbon events 821 0x00000800 00000000 Synchronous Connection Complete Event 822 0x00001000 00000000 Synchronous Connection Changed Event 823 0x00002000 00000000 Sniff Subrate Event 824 0x00004000 00000000 Extended Inquiry Result Event 825 0x00008000 00000000 Encryption Key Refresh Complete Event 826 0x00010000 00000000 IO Capability Request Event 827 0x00020000 00000000 IO Capability Response Event 828 0x00040000 00000000 User Confirmation Request Event 829 0x00080000 00000000 User Passkey Request Event 830 0x00100000 00000000 Remote OOB Data Request Event 831 0x00200000 00000000 Simple Pairing Complete Event 832 0x00400000 00000000 Generic AMP Link Key Notification Event 833 0x00800000 00000000 Link Supervision Timeout Changed Event 834 0x01000000 00000000 Enhanced Flush Complete Event 835 0x04000000 00000000 User Passkey Notification Event 836 0x08000000 00000000 Keypress Notification Event 837 0x10000000 00000000 Remote Host Supported Features Notification Event 838 0x20000000 00000000 LE Meta Event 839 */ 840 841 842 /* the event mask for AMP controllers */ 843 #define HCI_AMP_EVENT_MASK_3_0 "\x00\x00\x00\x00\x00\x00\x3F\xFF" 844 845 /* 0x0000000000000000 No events specified (default) 846 0x0000000000000001 Physical Link Complete Event 847 0x0000000000000002 Channel Selected Event 848 0x0000000000000004 Disconnection Physical Link Event 849 0x0000000000000008 Physical Link Loss Early Warning Event 850 0x0000000000000010 Physical Link Recovery Event 851 0x0000000000000020 Logical Link Complete Event 852 0x0000000000000040 Disconnection Logical Link Complete Event 853 0x0000000000000080 Flow Spec Modify Complete Event 854 0x0000000000000100 Number of Completed Data Blocks Event 855 0x0000000000000200 AMP Start Test Event 856 0x0000000000000400 AMP Test End Event 857 0x0000000000000800 AMP Receiver Report Event 858 0x0000000000001000 Short Range Mode Change Complete Event 859 0x0000000000002000 AMP Status Change Event 860 */ 861 862 /* the event mask page 2 (CLB + CSA4) for BR/EDR controller */ 863 #define HCI_PAGE_2_EVENT_MASK "\x00\x00\x00\x00\x00\x7F\xC0\x00" 864 /* 0x0000000000004000 Triggered Clock Capture Event 865 0x0000000000008000 Sync Train Complete Event 866 0x0000000000010000 Sync Train Received Event 867 0x0000000000020000 Connectionless Broadcast Receive Event 868 0x0000000000040000 Connectionless Broadcast Timeout Event 869 0x0000000000080000 Truncated Page Complete Event 870 0x0000000000100000 Salve Page Response Timeout Event 871 0x0000000000200000 Connectionless Broadcast Channel Map Change Event 872 0x0000000000400000 Inquiry Response Notification Event 873 */ 874 875 /* 876 ** Definitions for packet type masks (BT1.2 and BT2.0 definitions) 877 */ 878 #define HCI_PKT_TYPES_MASK_NO_2_DH1 0x0002 879 #define HCI_PKT_TYPES_MASK_NO_3_DH1 0x0004 880 #define HCI_PKT_TYPES_MASK_DM1 0x0008 881 #define HCI_PKT_TYPES_MASK_DH1 0x0010 882 #define HCI_PKT_TYPES_MASK_HV1 0x0020 883 #define HCI_PKT_TYPES_MASK_HV2 0x0040 884 #define HCI_PKT_TYPES_MASK_HV3 0x0080 885 #define HCI_PKT_TYPES_MASK_NO_2_DH3 0x0100 886 #define HCI_PKT_TYPES_MASK_NO_3_DH3 0x0200 887 #define HCI_PKT_TYPES_MASK_DM3 0x0400 888 #define HCI_PKT_TYPES_MASK_DH3 0x0800 889 #define HCI_PKT_TYPES_MASK_NO_2_DH5 0x1000 890 #define HCI_PKT_TYPES_MASK_NO_3_DH5 0x2000 891 #define HCI_PKT_TYPES_MASK_DM5 0x4000 892 #define HCI_PKT_TYPES_MASK_DH5 0x8000 893 894 /* Packet type should be one of valid but at least one should be specified */ 895 #define HCI_VALID_SCO_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_HV1 \ 896 | HCI_PKT_TYPES_MASK_HV2 \ 897 | HCI_PKT_TYPES_MASK_HV3)) == 0)) \ 898 && ((t) != 0)) 899 900 901 902 903 904 /* Packet type should not be invalid and at least one should be specified */ 905 #define HCI_VALID_ACL_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_DM1 \ 906 | HCI_PKT_TYPES_MASK_DH1 \ 907 | HCI_PKT_TYPES_MASK_DM3 \ 908 | HCI_PKT_TYPES_MASK_DH3 \ 909 | HCI_PKT_TYPES_MASK_DM5 \ 910 | HCI_PKT_TYPES_MASK_DH5 \ 911 | HCI_PKT_TYPES_MASK_NO_2_DH1 \ 912 | HCI_PKT_TYPES_MASK_NO_3_DH1 \ 913 | HCI_PKT_TYPES_MASK_NO_2_DH3 \ 914 | HCI_PKT_TYPES_MASK_NO_3_DH3 \ 915 | HCI_PKT_TYPES_MASK_NO_2_DH5 \ 916 | HCI_PKT_TYPES_MASK_NO_3_DH5 )) == 0)) \ 917 && (((t) & (HCI_PKT_TYPES_MASK_DM1 \ 918 | HCI_PKT_TYPES_MASK_DH1 \ 919 | HCI_PKT_TYPES_MASK_DM3 \ 920 | HCI_PKT_TYPES_MASK_DH3 \ 921 | HCI_PKT_TYPES_MASK_DM5 \ 922 | HCI_PKT_TYPES_MASK_DH5)) != 0)) 923 924 /* 925 ** Definitions for eSCO packet type masks (BT1.2 and BT2.0 definitions) 926 */ 927 #define HCI_ESCO_PKT_TYPES_MASK_HV1 0x0001 928 #define HCI_ESCO_PKT_TYPES_MASK_HV2 0x0002 929 #define HCI_ESCO_PKT_TYPES_MASK_HV3 0x0004 930 #define HCI_ESCO_PKT_TYPES_MASK_EV3 0x0008 931 #define HCI_ESCO_PKT_TYPES_MASK_EV4 0x0010 932 #define HCI_ESCO_PKT_TYPES_MASK_EV5 0x0020 933 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV3 0x0040 934 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV3 0x0080 935 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV5 0x0100 936 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV5 0x0200 937 938 /* Packet type should be one of valid but at least one should be specified for 1.2 */ 939 #define HCI_VALID_ESCO_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_EV3 \ 940 | HCI_ESCO_PKT_TYPES_MASK_EV4 \ 941 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \ 942 && ((t) != 0))/* Packet type should be one of valid but at least one should be specified */ 943 944 #define HCI_VALID_ESCO_SCOPKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 \ 945 | HCI_ESCO_PKT_TYPES_MASK_HV2 \ 946 | HCI_ESCO_PKT_TYPES_MASK_HV3)) == 0)) \ 947 && ((t) != 0)) 948 949 #define HCI_VALID_SCO_ALL_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 \ 950 | HCI_ESCO_PKT_TYPES_MASK_HV2 \ 951 | HCI_ESCO_PKT_TYPES_MASK_HV3 \ 952 | HCI_ESCO_PKT_TYPES_MASK_EV3 \ 953 | HCI_ESCO_PKT_TYPES_MASK_EV4 \ 954 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \ 955 && ((t) != 0)) 956 957 /* 958 ** Define parameters to allow role switch during create connection 959 */ 960 #define HCI_CR_CONN_NOT_ALLOW_SWITCH 0x00 961 #define HCI_CR_CONN_ALLOW_SWITCH 0x01 962 963 /* 964 ** Hold Mode command destination 965 */ 966 #define HOLD_MODE_DEST_LOCAL_DEVICE 0x00 967 #define HOLD_MODE_DEST_RMT_DEVICE 0x01 968 969 /* 970 ** Definitions for different HCI parameters 971 */ 972 #define HCI_PER_INQ_MIN_MAX_PERIOD 0x0003 973 #define HCI_PER_INQ_MAX_MAX_PERIOD 0xFFFF 974 #define HCI_PER_INQ_MIN_MIN_PERIOD 0x0002 975 #define HCI_PER_INQ_MAX_MIN_PERIOD 0xFFFE 976 977 #define HCI_MAX_INQUIRY_LENGTH 0x30 978 979 #define HCI_MIN_INQ_LAP 0x9E8B00 980 #define HCI_MAX_INQ_LAP 0x9E8B3F 981 982 /* HCI role defenitions */ 983 #define HCI_ROLE_MASTER 0x00 984 #define HCI_ROLE_SLAVE 0x01 985 #define HCI_ROLE_UNKNOWN 0xff 986 987 /* HCI mode defenitions */ 988 #define HCI_MODE_ACTIVE 0x00 989 #define HCI_MODE_HOLD 0x01 990 #define HCI_MODE_SNIFF 0x02 991 #define HCI_MODE_PARK 0x03 992 993 /* HCI Flow Control Mode defenitions */ 994 #define HCI_PACKET_BASED_FC_MODE 0x00 995 #define HCI_BLOCK_BASED_FC_MODE 0x01 996 997 /* Define Packet types as requested by the Host */ 998 #define HCI_ACL_PKT_TYPE_NONE 0x0000 999 #define HCI_ACL_PKT_TYPE_DM1 0x0008 1000 #define HCI_ACL_PKT_TYPE_DH1 0x0010 1001 #define HCI_ACL_PKT_TYPE_AUX1 0x0200 1002 #define HCI_ACL_PKT_TYPE_DM3 0x0400 1003 #define HCI_ACL_PKT_TYPE_DH3 0x0800 1004 #define HCI_ACL_PKT_TYPE_DM5 0x4000 1005 #define HCI_ACL_PKT_TYPE_DH5 0x8000 1006 1007 /* Define key type in the Master Link Key command */ 1008 #define HCI_USE_SEMI_PERMANENT_KEY 0x00 1009 #define HCI_USE_TEMPORARY_KEY 0x01 1010 1011 /* Page scan period modes */ 1012 #define HCI_PAGE_SCAN_REP_MODE_R0 0x00 1013 #define HCI_PAGE_SCAN_REP_MODE_R1 0x01 1014 #define HCI_PAGE_SCAN_REP_MODE_R2 0x02 1015 1016 /* Define limits for page scan repetition modes */ 1017 #define HCI_PAGE_SCAN_R1_LIMIT 0x0800 1018 #define HCI_PAGE_SCAN_R2_LIMIT 0x1000 1019 1020 /* Page scan period modes */ 1021 #define HCI_PAGE_SCAN_PER_MODE_P0 0x00 1022 #define HCI_PAGE_SCAN_PER_MODE_P1 0x01 1023 #define HCI_PAGE_SCAN_PER_MODE_P2 0x02 1024 1025 /* Page scan modes */ 1026 #define HCI_MANDATARY_PAGE_SCAN_MODE 0x00 1027 #define HCI_OPTIONAL_PAGE_SCAN_MODE1 0x01 1028 #define HCI_OPTIONAL_PAGE_SCAN_MODE2 0x02 1029 #define HCI_OPTIONAL_PAGE_SCAN_MODE3 0x03 1030 1031 /* Page and inquiry scan types */ 1032 #define HCI_SCAN_TYPE_STANDARD 0x00 1033 #define HCI_SCAN_TYPE_INTERLACED 0x01 /* 1.2 devices or later */ 1034 #define HCI_DEF_SCAN_TYPE HCI_SCAN_TYPE_STANDARD 1035 1036 /* Definitions for quality of service service types */ 1037 #define HCI_SERVICE_NO_TRAFFIC 0x00 1038 #define HCI_SERVICE_BEST_EFFORT 0x01 1039 #define HCI_SERVICE_GUARANTEED 0x02 1040 1041 #define HCI_QOS_LATENCY_DO_NOT_CARE 0xFFFFFFFF 1042 #define HCI_QOS_DELAY_DO_NOT_CARE 0xFFFFFFFF 1043 1044 /* Definitions for Flow Specification */ 1045 #define HCI_FLOW_SPEC_LATENCY_DO_NOT_CARE 0xFFFFFFFF 1046 1047 /* Definitions for AFH Channel Map */ 1048 #define HCI_AFH_CHANNEL_MAP_LEN 10 1049 1050 /* Definitions for Extended Inquiry Response */ 1051 #define HCI_EXT_INQ_RESPONSE_LEN 240 1052 #define HCI_EIR_FLAGS_TYPE BT_EIR_FLAGS_TYPE 1053 #define HCI_EIR_MORE_16BITS_UUID_TYPE BT_EIR_MORE_16BITS_UUID_TYPE 1054 #define HCI_EIR_COMPLETE_16BITS_UUID_TYPE BT_EIR_COMPLETE_16BITS_UUID_TYPE 1055 #define HCI_EIR_MORE_32BITS_UUID_TYPE BT_EIR_MORE_32BITS_UUID_TYPE 1056 #define HCI_EIR_COMPLETE_32BITS_UUID_TYPE BT_EIR_COMPLETE_32BITS_UUID_TYPE 1057 #define HCI_EIR_MORE_128BITS_UUID_TYPE BT_EIR_MORE_128BITS_UUID_TYPE 1058 #define HCI_EIR_COMPLETE_128BITS_UUID_TYPE BT_EIR_COMPLETE_128BITS_UUID_TYPE 1059 #define HCI_EIR_SHORTENED_LOCAL_NAME_TYPE BT_EIR_SHORTENED_LOCAL_NAME_TYPE 1060 #define HCI_EIR_COMPLETE_LOCAL_NAME_TYPE BT_EIR_COMPLETE_LOCAL_NAME_TYPE 1061 #define HCI_EIR_TX_POWER_LEVEL_TYPE BT_EIR_TX_POWER_LEVEL_TYPE 1062 #define HCI_EIR_MANUFACTURER_SPECIFIC_TYPE BT_EIR_MANUFACTURER_SPECIFIC_TYPE 1063 #define HCI_EIR_OOB_BD_ADDR_TYPE BT_EIR_OOB_BD_ADDR_TYPE 1064 #define HCI_EIR_OOB_COD_TYPE BT_EIR_OOB_COD_TYPE 1065 #define HCI_EIR_OOB_SSP_HASH_C_TYPE BT_EIR_OOB_SSP_HASH_C_TYPE 1066 #define HCI_EIR_OOB_SSP_RAND_R_TYPE BT_EIR_OOB_SSP_RAND_R_TYPE 1067 1068 /* Definitions for Write Simple Pairing Mode */ 1069 #define HCI_SP_MODE_UNDEFINED 0x00 1070 #define HCI_SP_MODE_ENABLED 0x01 1071 1072 /* Definitions for Write Simple Pairing Debug Mode */ 1073 #define HCI_SPD_MODE_DISABLED 0x00 1074 #define HCI_SPD_MODE_ENABLED 0x01 1075 1076 /* Definitions for IO Capability Response/Command */ 1077 #define HCI_IO_CAP_DISPLAY_ONLY 0x00 1078 #define HCI_IO_CAP_DISPLAY_YESNO 0x01 1079 #define HCI_IO_CAP_KEYBOARD_ONLY 0x02 1080 #define HCI_IO_CAP_NO_IO 0x03 1081 1082 #define HCI_OOB_AUTH_DATA_NOT_PRESENT 0x00 1083 #define HCI_OOB_REM_AUTH_DATA_PRESENT 0x01 1084 1085 #define HCI_MITM_PROTECT_NOT_REQUIRED 0x00 1086 #define HCI_MITM_PROTECT_REQUIRED 0x01 1087 1088 1089 /* Policy settings status */ 1090 #define HCI_DISABLE_ALL_LM_MODES 0x0000 1091 #define HCI_ENABLE_MASTER_SLAVE_SWITCH 0x0001 1092 #define HCI_ENABLE_HOLD_MODE 0x0002 1093 #define HCI_ENABLE_SNIFF_MODE 0x0004 1094 #define HCI_ENABLE_PARK_MODE 0x0008 1095 1096 /* By default allow switch, because host can not allow that */ 1097 /* that until he created the connection */ 1098 #define HCI_DEFAULT_POLICY_SETTINGS HCI_DISABLE_ALL_LM_MODES 1099 1100 /* Filters that are sent in set filter command */ 1101 #define HCI_FILTER_TYPE_CLEAR_ALL 0x00 1102 #define HCI_FILTER_INQUIRY_RESULT 0x01 1103 #define HCI_FILTER_CONNECTION_SETUP 0x02 1104 1105 #define HCI_FILTER_COND_NEW_DEVICE 0x00 1106 #define HCI_FILTER_COND_DEVICE_CLASS 0x01 1107 #define HCI_FILTER_COND_BD_ADDR 0x02 1108 1109 #define HCI_DO_NOT_AUTO_ACCEPT_CONNECT 1 1110 #define HCI_DO_AUTO_ACCEPT_CONNECT 2 /* role switch disabled */ 1111 #define HCI_DO_AUTO_ACCEPT_CONNECT_RS 3 /* role switch enabled (1.1 errata 1115) */ 1112 1113 /* Auto accept flags */ 1114 #define HCI_AUTO_ACCEPT_OFF 0x00 1115 #define HCI_AUTO_ACCEPT_ACL_CONNECTIONS 0x01 1116 #define HCI_AUTO_ACCEPT_SCO_CONNECTIONS 0x02 1117 1118 /* PIN type */ 1119 #define HCI_PIN_TYPE_VARIABLE 0 1120 #define HCI_PIN_TYPE_FIXED 1 1121 1122 /* Loopback Modes */ 1123 #define HCI_LOOPBACK_MODE_DISABLED 0 1124 #define HCI_LOOPBACK_MODE_LOCAL 1 1125 #define HCI_LOOPBACK_MODE_REMOTE 2 1126 1127 #define SLOTS_PER_10MS 16 /* 0.625 ms slots in a 10 ms tick */ 1128 1129 /* Maximum connection accept timeout in 0.625msec */ 1130 #define HCI_MAX_CONN_ACCEPT_TOUT 0xB540 /* 29 sec */ 1131 #define HCI_DEF_CONN_ACCEPT_TOUT 0x1F40 /* 5 sec */ 1132 1133 /* Page timeout is used in LC only and LC is counting down slots not using OS */ 1134 #define HCI_DEFAULT_PAGE_TOUT 0x2000 /* 5.12 sec (in slots) */ 1135 1136 /* Scan enable flags */ 1137 #define HCI_NO_SCAN_ENABLED 0x00 1138 #define HCI_INQUIRY_SCAN_ENABLED 0x01 1139 #define HCI_PAGE_SCAN_ENABLED 0x02 1140 1141 /* Pagescan timer definitions in 0.625 ms */ 1142 #define HCI_MIN_PAGESCAN_INTERVAL 0x12 /* 11.25 ms */ 1143 #define HCI_MAX_PAGESCAN_INTERVAL 0x1000 /* 2.56 sec */ 1144 #define HCI_DEF_PAGESCAN_INTERVAL 0x0800 /* 1.28 sec */ 1145 1146 /* Parameter for pagescan window is passed to LC and is kept in slots */ 1147 #define HCI_MIN_PAGESCAN_WINDOW 0x11 /* 10.625 ms */ 1148 #define HCI_MAX_PAGESCAN_WINDOW 0x1000 /* 2.56 sec */ 1149 #define HCI_DEF_PAGESCAN_WINDOW 0x12 /* 11.25 ms */ 1150 1151 /* Inquiryscan timer definitions in 0.625 ms */ 1152 #define HCI_MIN_INQUIRYSCAN_INTERVAL 0x12 /* 11.25 ms */ 1153 #define HCI_MAX_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 1154 #define HCI_DEF_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 1155 1156 /* Parameter for inquiryscan window is passed to LC and is kept in slots */ 1157 #define HCI_MIN_INQUIRYSCAN_WINDOW 0x11 /* 10.625 ms */ 1158 #define HCI_MAX_INQUIRYSCAN_WINDOW 0x1000 /* 2.56 sec */ 1159 #define HCI_DEF_INQUIRYSCAN_WINDOW 0x12 /* 11.25 ms */ 1160 1161 /* Encryption modes */ 1162 #define HCI_ENCRYPT_MODE_DISABLED 0x00 1163 #define HCI_ENCRYPT_MODE_POINT_TO_POINT 0x01 1164 #define HCI_ENCRYPT_MODE_ALL 0x02 1165 1166 /* Voice settings */ 1167 #define HCI_INP_CODING_LINEAR 0x0000 /* 0000000000 */ 1168 #define HCI_INP_CODING_U_LAW 0x0100 /* 0100000000 */ 1169 #define HCI_INP_CODING_A_LAW 0x0200 /* 1000000000 */ 1170 #define HCI_INP_CODING_MASK 0x0300 /* 1100000000 */ 1171 1172 #define HCI_INP_DATA_FMT_1S_COMPLEMENT 0x0000 /* 0000000000 */ 1173 #define HCI_INP_DATA_FMT_2S_COMPLEMENT 0x0040 /* 0001000000 */ 1174 #define HCI_INP_DATA_FMT_SIGN_MAGNITUDE 0x0080 /* 0010000000 */ 1175 #define HCI_INP_DATA_FMT_UNSIGNED 0x00c0 /* 0011000000 */ 1176 #define HCI_INP_DATA_FMT_MASK 0x00c0 /* 0011000000 */ 1177 1178 #define HCI_INP_SAMPLE_SIZE_8BIT 0x0000 /* 0000000000 */ 1179 #define HCI_INP_SAMPLE_SIZE_16BIT 0x0020 /* 0000100000 */ 1180 #define HCI_INP_SAMPLE_SIZE_MASK 0x0020 /* 0000100000 */ 1181 1182 #define HCI_INP_LINEAR_PCM_BIT_POS_MASK 0x001c /* 0000011100 */ 1183 #define HCI_INP_LINEAR_PCM_BIT_POS_OFFS 2 1184 1185 #define HCI_AIR_CODING_FORMAT_CVSD 0x0000 /* 0000000000 */ 1186 #define HCI_AIR_CODING_FORMAT_U_LAW 0x0001 /* 0000000001 */ 1187 #define HCI_AIR_CODING_FORMAT_A_LAW 0x0002 /* 0000000010 */ 1188 #define HCI_AIR_CODING_FORMAT_TRANSPNT 0x0003 /* 0000000011 */ 1189 #define HCI_AIR_CODING_FORMAT_MASK 0x0003 /* 0000000011 */ 1190 1191 /* default 0001100000 */ 1192 #define HCI_DEFAULT_VOICE_SETTINGS (HCI_INP_CODING_LINEAR \ 1193 | HCI_INP_DATA_FMT_2S_COMPLEMENT \ 1194 | HCI_INP_SAMPLE_SIZE_16BIT \ 1195 | HCI_AIR_CODING_FORMAT_CVSD) 1196 1197 #define HCI_CVSD_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_CVSD) 1198 #define HCI_U_LAW_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_U_LAW) 1199 #define HCI_A_LAW_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_A_LAW) 1200 #define HCI_TRANSPNT_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_TRANSPNT) 1201 1202 /* Retransmit timer definitions in 0.625 */ 1203 #define HCI_MAX_AUTO_FLUSH_TOUT 0x07FF 1204 #define HCI_DEFAULT_AUTO_FLUSH_TOUT 0 /* No auto flush */ 1205 1206 /* Broadcast retransmitions */ 1207 #define HCI_DEFAULT_NUM_BCAST_RETRAN 1 1208 1209 /* Define broadcast data types as passed in the hci data packet */ 1210 #define HCI_DATA_POINT_TO_POINT 0x00 1211 #define HCI_DATA_ACTIVE_BCAST 0x01 1212 #define HCI_DATA_PICONET_BCAST 0x02 1213 1214 /* Hold mode activity */ 1215 #define HCI_MAINTAIN_CUR_POWER_STATE 0x00 1216 #define HCI_SUSPEND_PAGE_SCAN 0x01 1217 #define HCI_SUSPEND_INQUIRY_SCAN 0x02 1218 #define HCI_SUSPEND_PERIODIC_INQUIRIES 0x04 1219 1220 /* Default Link Supervision timeoout */ 1221 #define HCI_DEFAULT_INACT_TOUT 0x7D00 /* BR/EDR (20 seconds) */ 1222 #define HCI_DEFAULT_AMP_INACT_TOUT 0x3E80 /* AMP (10 seconds) */ 1223 1224 /* Read transmit power level parameter */ 1225 #define HCI_READ_CURRENT 0x00 1226 #define HCI_READ_MAXIMUM 0x01 1227 1228 /* Link types for connection complete event */ 1229 #define HCI_LINK_TYPE_SCO 0x00 1230 #define HCI_LINK_TYPE_ACL 0x01 1231 #define HCI_LINK_TYPE_ESCO 0x02 1232 1233 /* Link Key Notification Event (Key Type) definitions */ 1234 #define HCI_LKEY_TYPE_COMBINATION 0x00 1235 #define HCI_LKEY_TYPE_LOCAL_UNIT 0x01 1236 #define HCI_LKEY_TYPE_REMOTE_UNIT 0x02 1237 #define HCI_LKEY_TYPE_DEBUG_COMB 0x03 1238 #define HCI_LKEY_TYPE_UNAUTH_COMB 0x04 1239 #define HCI_LKEY_TYPE_AUTH_COMB 0x05 1240 #define HCI_LKEY_TYPE_CHANGED_COMB 0x06 1241 1242 /* Internal definitions - not used over HCI */ 1243 #define HCI_LKEY_TYPE_AMP_WIFI 0x80 1244 #define HCI_LKEY_TYPE_AMP_UWB 0x81 1245 #define HCI_LKEY_TYPE_UNKNOWN 0xff 1246 1247 /* Read Local Version HCI Version return values (Command Complete Event) */ 1248 #define HCI_VERSION_1_0B 0x00 1249 #define HCI_VERSION_1_1 0x01 1250 1251 /* Define an invalid value for a handle */ 1252 #define HCI_INVALID_HANDLE 0xFFFF 1253 1254 /* Define max ammount of data in the HCI command */ 1255 #define HCI_COMMAND_SIZE 255 1256 1257 /* Define the preamble length for all HCI Commands. 1258 ** This is 2-bytes for opcode and 1 byte for length 1259 */ 1260 #define HCIC_PREAMBLE_SIZE 3 1261 1262 /* Define the preamble length for all HCI Events 1263 ** This is 1-byte for opcode and 1 byte for length 1264 */ 1265 #define HCIE_PREAMBLE_SIZE 2 1266 #define HCI_SCO_PREAMBLE_SIZE 3 1267 #define HCI_DATA_PREAMBLE_SIZE 4 1268 1269 /* local Bluetooth controller id for AMP HCI */ 1270 #define LOCAL_BR_EDR_CONTROLLER_ID 0 1271 1272 /* controller id types for AMP HCI */ 1273 #define HCI_CONTROLLER_TYPE_BR_EDR 0 1274 #define HCI_CONTROLLER_TYPE_802_11 1 1275 #define HCI_CONTROLLER_TYPE_ECMA 2 1276 #define HCI_MAX_CONTROLLER_TYPES 3 1277 1278 /* ConnectionLess Broadcast */ 1279 #define HCI_CLB_DISABLE 0x00 1280 #define HCI_CLB_ENABLE 0x01 1281 1282 /* ConnectionLess Broadcast Data fragment */ 1283 #define HCI_CLB_FRAGMENT_CONT 0x00 1284 #define HCI_CLB_FRAGMENT_START 0x01 1285 #define HCI_CLB_FRAGMENT_END 0x02 1286 #define HCI_CLB_FRAGMENT_SINGLE 0x03 1287 1288 /* AMP Controller Status codes 1289 */ 1290 #define HCI_AMP_CTRLR_PHYSICALLY_DOWN 0 1291 #define HCI_AMP_CTRLR_USABLE_BY_BT 1 1292 #define HCI_AMP_CTRLR_UNUSABLE_FOR_BT 2 1293 #define HCI_AMP_CTRLR_LOW_CAP_FOR_BT 3 1294 #define HCI_AMP_CTRLR_MED_CAP_FOR_BT 4 1295 #define HCI_AMP_CTRLR_HIGH_CAP_FOR_BT 5 1296 #define HCI_AMP_CTRLR_FULL_CAP_FOR_BT 6 1297 1298 #define HCI_MAX_AMP_STATUS_TYPES 7 1299 1300 1301 /* Define the extended flow specification fields used by AMP */ 1302 typedef struct 1303 { 1304 UINT8 id; 1305 UINT8 stype; 1306 UINT16 max_sdu_size; 1307 UINT32 sdu_inter_time; 1308 UINT32 access_latency; 1309 UINT32 flush_timeout; 1310 } tHCI_EXT_FLOW_SPEC; 1311 1312 1313 /* HCI message type definitions (for H4 messages) */ 1314 #define HCIT_TYPE_COMMAND 1 1315 #define HCIT_TYPE_ACL_DATA 2 1316 #define HCIT_TYPE_SCO_DATA 3 1317 #define HCIT_TYPE_EVENT 4 1318 #define HCIT_TYPE_LM_DIAG 7 1319 #define HCIT_TYPE_NFC 16 1320 1321 #define HCIT_LM_DIAG_LENGTH 63 1322 1323 /* Parameter information for HCI_BRCM_SET_ACL_PRIORITY */ 1324 #define HCI_BRCM_ACL_PRIORITY_PARAM_SIZE 3 1325 #define HCI_BRCM_ACL_PRIORITY_LOW 0x00 1326 #define HCI_BRCM_ACL_PRIORITY_HIGH 0xFF 1327 #define HCI_BRCM_SET_ACL_PRIORITY (0x0057 | HCI_GRP_VENDOR_SPECIFIC) 1328 1329 /* Define values for LMP Test Control parameters 1330 ** Test Scenario, Hopping Mode, Power Control Mode 1331 */ 1332 #define LMP_TESTCTL_TESTSC_PAUSE 0 1333 #define LMP_TESTCTL_TESTSC_TXTEST_0 1 1334 #define LMP_TESTCTL_TESTSC_TXTEST_1 2 1335 #define LMP_TESTCTL_TESTSC_TXTEST_1010 3 1336 #define LMP_TESTCTL_TESTSC_PSRND_BITSEQ 4 1337 #define LMP_TESTCTL_TESTSC_CLOSEDLB_ACL 5 1338 #define LMP_TESTCTL_TESTSC_CLOSEDLB_SCO 6 1339 #define LMP_TESTCTL_TESTSC_ACL_NOWHIT 7 1340 #define LMP_TESTCTL_TESTSC_SCO_NOWHIT 8 1341 #define LMP_TESTCTL_TESTSC_TXTEST_11110000 9 1342 #define LMP_TESTCTL_TESTSC_EXITTESTMODE 255 1343 1344 #define LMP_TESTCTL_HOPMOD_RXTX1FREQ 0 1345 #define LMP_TESTCTL_HOPMOD_HOP_EURUSA 1 1346 #define LMP_TESTCTL_HOPMOD_HOP_JAPAN 2 1347 #define LMP_TESTCTL_HOPMOD_HOP_FRANCE 3 1348 #define LMP_TESTCTL_HOPMOD_HOP_SPAIN 4 1349 #define LMP_TESTCTL_HOPMOD_REDUCED_HOP 5 1350 1351 #define LMP_TESTCTL_POWCTL_FIXEDTX_OP 0 1352 #define LMP_TESTCTL_POWCTL_ADAPTIVE 1 1353 1354 1355 /* 1356 ** Define company IDs (from Bluetooth Assigned Numbers v1.1, section 2.2) 1357 */ 1358 #define LMP_COMPID_ERICSSON 0 1359 #define LMP_COMPID_NOKIA 1 1360 #define LMP_COMPID_INTEL 2 1361 #define LMP_COMPID_IBM 3 1362 #define LMP_COMPID_TOSHIBA 4 1363 #define LMP_COMPID_3COM 5 1364 #define LMP_COMPID_MICROSOFT 6 1365 #define LMP_COMPID_LUCENT 7 1366 #define LMP_COMPID_MOTOROLA 8 1367 #define LMP_COMPID_INFINEON 9 1368 #define LMP_COMPID_CSR 10 1369 #define LMP_COMPID_SILICON_WAVE 11 1370 #define LMP_COMPID_DIGIANSWER 12 1371 #define LMP_COMPID_TEXAS_INSTRUMENTS 13 1372 #define LMP_COMPID_PARTHUS 14 1373 #define LMP_COMPID_BROADCOM 15 1374 #define LMP_COMPID_MITEL_SEMI 16 1375 #define LMP_COMPID_WIDCOMM 17 1376 #define LMP_COMPID_ZEEVO 18 1377 #define LMP_COMPID_ATMEL 19 1378 #define LMP_COMPID_MITSUBISHI 20 1379 #define LMP_COMPID_RTX_TELECOM 21 1380 #define LMP_COMPID_KC_TECH 22 1381 #define LMP_COMPID_NEWLOGIC 23 1382 #define LMP_COMPID_TRANSILICA 24 1383 #define LMP_COMPID_ROHDE_SCHWARZ 25 1384 #define LMP_COMPID_TTPCOM 26 1385 #define LMP_COMPID_SIGNIA 27 1386 #define LMP_COMPID_CONEXANT 28 1387 #define LMP_COMPID_QUALCOMM 29 1388 #define LMP_COMPID_INVENTEL 30 1389 #define LMP_COMPID_AVM 31 1390 #define LMP_COMPID_BANDSPEED 32 1391 #define LMP_COMPID_MANSELLA 33 1392 #define LMP_COMPID_NEC_CORP 34 1393 #define LMP_COMPID_WAVEPLUS 35 1394 #define LMP_COMPID_ALCATEL 36 1395 #define LMP_COMPID_PHILIPS 37 1396 #define LMP_COMPID_C_TECHNOLOGIES 38 1397 #define LMP_COMPID_OPEN_INTERFACE 39 1398 #define LMP_COMPID_RF_MICRO 40 1399 #define LMP_COMPID_HITACHI 41 1400 #define LMP_COMPID_SYMBOL_TECH 42 1401 #define LMP_COMPID_TENOVIS 43 1402 #define LMP_COMPID_MACRONIX 44 1403 #define LMP_COMPID_GCT_SEMI 45 1404 #define LMP_COMPID_NORWOOD_SYSTEMS 46 1405 #define LMP_COMPID_MEWTEL_TECH 47 1406 #define LMP_COMPID_STM 48 1407 #define LMP_COMPID_SYNOPSYS 49 1408 #define LMP_COMPID_RED_M_LTD 50 1409 #define LMP_COMPID_COMMIL_LTD 51 1410 #define LMP_COMPID_CATC 52 1411 #define LMP_COMPID_ECLIPSE 53 1412 #define LMP_COMPID_RENESAS_TECH 54 1413 #define LMP_COMPID_MOBILIAN_CORP 55 1414 #define LMP_COMPID_TERAX 56 1415 #define LMP_COMPID_ISSC 57 1416 #define LMP_COMPID_MATSUSHITA 58 1417 #define LMP_COMPID_GENNUM_CORP 59 1418 #define LMP_COMPID_RESEARCH_IN_MOTION 60 1419 #define LMP_COMPID_IPEXTREME 61 1420 #define LMP_COMPID_SYSTEMS_AND_CHIPS 62 1421 #define LMP_COMPID_BLUETOOTH_SIG 63 1422 #define LMP_COMPID_SEIKO_EPSON_CORP 64 1423 #define LMP_COMPID_ISS_TAIWAN 65 1424 #define LMP_COMPID_CONWISE_TECHNOLOGIES 66 1425 #define LMP_COMPID_PARROT_SA 67 1426 #define LMP_COMPID_SOCKET_COMM 68 1427 #define LMP_COMPID_ALTHEROS 69 1428 #define LMP_COMPID_MEDIATEK 70 1429 #define LMP_COMPID_BLUEGIGA 71 1430 #define LMP_COMPID_MARVELL 72 1431 #define LMP_COMPID_3DSP_CORP 73 1432 #define LMP_COMPID_ACCEL_SEMICONDUCTOR 74 1433 #define LMP_COMPID_CONTINENTAL_AUTO 75 1434 #define LMP_COMPID_APPLE 76 1435 #define LMP_COMPID_STACCATO 77 1436 #define LMP_COMPID_AVAGO_TECHNOLOGIES 78 1437 #define LMP_COMPID_APT_LTD 79 1438 #define LMP_COMPID_SIRF_TECHNOLOGY 80 1439 #define LMP_COMPID_TZERO_TECHNOLOGY 81 1440 #define LMP_COMPID_J_AND_M_CORP 82 1441 #define LMP_COMPID_FREE_2_MOVE 83 1442 #define LMP_COMPID_3DIJOY_CORP 84 1443 #define LMP_COMPID_PLANTRONICS 85 1444 #define LMP_COMPID_SONY_ERICSSON_MOBILE 86 1445 #define LMP_COMPID_HARMON_INTL_IND 87 1446 #define LMP_COMPID_VIZIO 88 1447 #define LMP_COMPID_NORDIC SEMI 89 1448 #define LMP_COMPID_EM MICRO 90 1449 #define LMP_COMPID_RALINK TECH 91 1450 #define LMP_COMPID_BELKIN INC 92 1451 #define LMP_COMPID_REALTEK SEMI 93 1452 #define LMP_COMPID_STONESTREET ONE 94 1453 #define LMP_COMPID_WICENTRIC 95 1454 #define LMP_COMPID_RIVIERAWAVES 96 1455 #define LMP_COMPID_RDA MICRO 97 1456 #define LMP_COMPID_GIBSON GUITARS 98 1457 #define LMP_COMPID_MICOMMAND INC 99 1458 #define LMP_COMPID_BAND XI 100 1459 #define LMP_COMPID_HP COMPANY 101 1460 #define LMP_COMPID_9SOLUTIONS OY 102 1461 #define LMP_COMPID_GN NETCOM 103 1462 #define LMP_COMPID_GENERAL MOTORS 104 1463 #define LMP_COMPID_AD ENGINEERING 105 1464 #define LMP_COMPID_MINDTREE LTD 106 1465 #define LMP_COMPID_POLAR ELECTRO 107 1466 #define LMP_COMPID_BEAUTIFUL ENTERPRISE 108 1467 #define LMP_COMPID_BRIARTEK 109 1468 #define LMP_COMPID_SUMMIT DATA COMM 110 1469 #define LMP_COMPID_SOUND ID 111 1470 #define LMP_COMPID_MONSTER LLC 112 1471 #define LMP_COMPID_CONNECTBLU 113 1472 1473 #define LMP_COMPID_SHANGHAI_SSE 114 1474 #define LMP_COMPID_GROUP_SENSE 115 1475 #define LMP_COMPID_ZOMM 116 1476 #define LMP_COMPID_SAMSUNG 117 1477 #define LMP_COMPID_CREATIVE_TECH 118 1478 #define LMP_COMPID_LAIRD_TECH 119 1479 #define LMP_COMPID_NIKE 120 1480 #define LMP_COMPID_LESSWIRE 121 1481 #define LMP_COMPID_MSTAR_SEMI 122 1482 #define LMP_COMPID_HANLYNN_TECH 123 1483 #define LMP_COMPID_AR_CAMBRIDGE 124 1484 #define LMP_COMPID_SEERS_TECH 125 1485 #define LMP_COMPID_SPORTS_TRACKING 126 1486 #define LMP_COMPID_AUTONET_MOBILE 127 1487 #define LMP_COMPID_DELORME_PUBLISH 128 1488 #define LMP_COMPID_WUXI_VIMICRO 129 1489 #define LMP_COMPID_SENNHEISER 130 1490 #define LMP_COMPID_TIME_KEEPING_SYS 131 1491 #define LMP_COMPID_LUDUS_HELSINKI 132 1492 #define LMP_COMPID_BLUE_RADIOS 133 1493 #define LMP_COMPID_EQUINUX 134 1494 #define LMP_COMPID_GARMIN_INTL 135 1495 #define LMP_COMPID_ECOTEST 136 1496 #define LMP_COMPID_GN_RESOUND 137 1497 #define LMP_COMPID_JAWBONE 138 1498 #define LMP_COMPID_TOPCON_POSITIONING 139 1499 #define LMP_COMPID_QUALCOMM_LABS 140 1500 #define LMP_COMPID_ZSCAN_SOFTWARE 141 1501 #define LMP_COMPID_QUINTIC 142 1502 #define LMP_COMPID_STOLLMAN_EV 143 1503 #define LMP_COMPID_FUNAI_ELECTRONIC 144 1504 #define LMP_COMPID_ADV_PANMOBILE 145 1505 #define LMP_COMPID_THINK_OPTICS 146 1506 #define LMP_COMPID_UNIVERSAL_ELEC 147 1507 #define LMP_COMPID_AIROHA_TECH 148 1508 #define LMP_COMPID_MAX_ID 149 /* this is a place holder */ 1509 #define LMP_COMPID_INTERNAL 65535 1510 1511 #define MAX_LMP_COMPID (LMP_COMPID_MAX_ID) 1512 /* 1513 ** Define the packet types in the packet header, and a couple extra 1514 */ 1515 #define PKT_TYPE_NULL 0x00 1516 #define PKT_TYPE_POLL 0x01 1517 #define PKT_TYPE_FHS 0x02 1518 #define PKT_TYPE_DM1 0x03 1519 1520 #define PKT_TYPE_DH1 0x04 1521 #define PKT_TYPE_HV1 0x05 1522 #define PKT_TYPE_HV2 0x06 1523 #define PKT_TYPE_HV3 0x07 1524 #define PKT_TYPE_DV 0x08 1525 #define PKT_TYPE_AUX1 0x09 1526 1527 #define PKT_TYPE_DM3 0x0a 1528 #define PKT_TYPE_DH3 0x0b 1529 1530 #define PKT_TYPE_DM5 0x0e 1531 #define PKT_TYPE_DH5 0x0f 1532 1533 1534 #define PKT_TYPE_ID 0x10 /* Internally used packet types */ 1535 #define PKT_TYPE_BAD 0x11 1536 #define PKT_TYPE_NONE 0x12 1537 1538 /* 1539 ** Define packet size 1540 */ 1541 #define HCI_DM1_PACKET_SIZE 17 1542 #define HCI_DH1_PACKET_SIZE 27 1543 #define HCI_DM3_PACKET_SIZE 121 1544 #define HCI_DH3_PACKET_SIZE 183 1545 #define HCI_DM5_PACKET_SIZE 224 1546 #define HCI_DH5_PACKET_SIZE 339 1547 #define HCI_AUX1_PACKET_SIZE 29 1548 #define HCI_HV1_PACKET_SIZE 10 1549 #define HCI_HV2_PACKET_SIZE 20 1550 #define HCI_HV3_PACKET_SIZE 30 1551 #define HCI_DV_PACKET_SIZE 9 1552 #define HCI_EDR2_DH1_PACKET_SIZE 54 1553 #define HCI_EDR2_DH3_PACKET_SIZE 367 1554 #define HCI_EDR2_DH5_PACKET_SIZE 679 1555 #define HCI_EDR3_DH1_PACKET_SIZE 83 1556 #define HCI_EDR3_DH3_PACKET_SIZE 552 1557 #define HCI_EDR3_DH5_PACKET_SIZE 1021 1558 1559 /* Feature Pages */ 1560 #define HCI_EXT_FEATURES_PAGE_0 0 /* Extended Feature Page 0 (regular features) */ 1561 #define HCI_EXT_FEATURES_PAGE_1 1 /* Extended Feature Page 1 */ 1562 #define HCI_EXT_FEATURES_PAGE_2 2 /* Extended Feature Page 2 */ 1563 #define HCI_EXT_FEATURES_PAGE_MAX HCI_EXT_FEATURES_PAGE_2 1564 1565 #define HCI_FEATURE_BYTES_PER_PAGE 8 1566 1567 #define HCI_FEATURES_KNOWN(x) ((x[0] | x[1] | x[2] | x[3] | x[4] | x[5] | x[6] | x[7]) != 0) 1568 1569 /* 1570 ** LMP features encoding - page 0 1571 */ 1572 #define HCI_FEATURE_3_SLOT_PACKETS_MASK 0x01 1573 #define HCI_FEATURE_3_SLOT_PACKETS_OFF 0 1574 #define HCI_3_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_PACKETS_OFF] & HCI_FEATURE_3_SLOT_PACKETS_MASK) 1575 1576 #define HCI_FEATURE_5_SLOT_PACKETS_MASK 0x02 1577 #define HCI_FEATURE_5_SLOT_PACKETS_OFF 0 1578 #define HCI_5_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_PACKETS_OFF] & HCI_FEATURE_5_SLOT_PACKETS_MASK) 1579 1580 #define HCI_FEATURE_ENCRYPTION_MASK 0x04 1581 #define HCI_FEATURE_ENCRYPTION_OFF 0 1582 #define HCI_ENCRYPTION_SUPPORTED(x) ((x)[HCI_FEATURE_ENCRYPTION_OFF] & HCI_FEATURE_ENCRYPTION_MASK) 1583 1584 #define HCI_FEATURE_SLOT_OFFSET_MASK 0x08 1585 #define HCI_FEATURE_SLOT_OFFSET_OFF 0 1586 #define HCI_SLOT_OFFSET_SUPPORTED(x) ((x)[HCI_FEATURE_SLOT_OFFSET_OFF] & HCI_FEATURE_SLOT_OFFSET_MASK) 1587 1588 #define HCI_FEATURE_TIMING_ACC_MASK 0x10 1589 #define HCI_FEATURE_TIMING_ACC_OFF 0 1590 #define HCI_TIMING_ACC_SUPPORTED(x) ((x)[HCI_FEATURE_TIMING_ACC_OFF] & HCI_FEATURE_TIMING_ACC_MASK) 1591 1592 #define HCI_FEATURE_SWITCH_MASK 0x20 1593 #define HCI_FEATURE_SWITCH_OFF 0 1594 #define HCI_SWITCH_SUPPORTED(x) ((x)[HCI_FEATURE_SWITCH_OFF] & HCI_FEATURE_SWITCH_MASK) 1595 1596 #define HCI_FEATURE_HOLD_MODE_MASK 0x40 1597 #define HCI_FEATURE_HOLD_MODE_OFF 0 1598 #define HCI_HOLD_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_HOLD_MODE_OFF] & HCI_FEATURE_HOLD_MODE_MASK) 1599 1600 #define HCI_FEATURE_SNIFF_MODE_MASK 0x80 1601 #define HCI_FEATURE_SNIFF_MODE_OFF 0 1602 #define HCI_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_MODE_OFF] & HCI_FEATURE_SNIFF_MODE_MASK) 1603 1604 #define HCI_FEATURE_PARK_MODE_MASK 0x01 1605 #define HCI_FEATURE_PARK_MODE_OFF 1 1606 #define HCI_PARK_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_PARK_MODE_OFF] & HCI_FEATURE_PARK_MODE_MASK) 1607 1608 #define HCI_FEATURE_RSSI_MASK 0x02 1609 #define HCI_FEATURE_RSSI_OFF 1 1610 #define HCI_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_RSSI_OFF] & HCI_FEATURE_RSSI_MASK) 1611 1612 #define HCI_FEATURE_CQM_DATA_RATE_MASK 0x04 1613 #define HCI_FEATURE_CQM_DATA_RATE_OFF 1 1614 #define HCI_CQM_DATA_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_CQM_DATA_RATE_OFF] & HCI_FEATURE_CQM_DATA_RATE_MASK) 1615 1616 #define HCI_FEATURE_SCO_LINK_MASK 0x08 1617 #define HCI_FEATURE_SCO_LINK_OFF 1 1618 #define HCI_SCO_LINK_SUPPORTED(x) ((x)[HCI_FEATURE_SCO_LINK_OFF] & HCI_FEATURE_SCO_LINK_MASK) 1619 1620 #define HCI_FEATURE_HV2_PACKETS_MASK 0x10 1621 #define HCI_FEATURE_HV2_PACKETS_OFF 1 1622 #define HCI_HV2_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV2_PACKETS_OFF] & HCI_FEATURE_HV2_PACKETS_MASK) 1623 1624 #define HCI_FEATURE_HV3_PACKETS_MASK 0x20 1625 #define HCI_FEATURE_HV3_PACKETS_OFF 1 1626 #define HCI_HV3_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV3_PACKETS_OFF] & HCI_FEATURE_HV3_PACKETS_MASK) 1627 1628 #define HCI_FEATURE_U_LAW_MASK 0x40 1629 #define HCI_FEATURE_U_LAW_OFF 1 1630 #define HCI_LMP_U_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_U_LAW_OFF] & HCI_FEATURE_U_LAW_MASK) 1631 1632 #define HCI_FEATURE_A_LAW_MASK 0x80 1633 #define HCI_FEATURE_A_LAW_OFF 1 1634 #define HCI_LMP_A_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_A_LAW_OFF] & HCI_FEATURE_A_LAW_MASK) 1635 1636 #define HCI_FEATURE_CVSD_MASK 0x01 1637 #define HCI_FEATURE_CVSD_OFF 2 1638 #define HCI_LMP_CVSD_SUPPORTED(x) ((x)[HCI_FEATURE_CVSD_OFF] & HCI_FEATURE_CVSD_MASK) 1639 1640 #define HCI_FEATURE_PAGING_SCHEME_MASK 0x02 1641 #define HCI_FEATURE_PAGING_SCHEME_OFF 2 1642 #define HCI_PAGING_SCHEME_SUPPORTED(x) ((x)[HCI_FEATURE_PAGING_SCHEME_OFF] & HCI_FEATURE_PAGING_SCHEME_MASK) 1643 1644 #define HCI_FEATURE_POWER_CTRL_MASK 0x04 1645 #define HCI_FEATURE_POWER_CTRL_OFF 2 1646 #define HCI_POWER_CTRL_SUPPORTED(x) ((x)[HCI_FEATURE_POWER_CTRL_OFF] & HCI_FEATURE_POWER_CTRL_MASK) 1647 1648 #define HCI_FEATURE_TRANSPNT_MASK 0x08 1649 #define HCI_FEATURE_TRANSPNT_OFF 2 1650 #define HCI_LMP_TRANSPNT_SUPPORTED(x) ((x)[HCI_FEATURE_TRANSPNT_OFF] & HCI_FEATURE_TRANSPNT_MASK) 1651 1652 #define HCI_FEATURE_FLOW_CTRL_LAG_MASK 0x70 1653 #define HCI_FEATURE_FLOW_CTRL_LAG_OFF 2 1654 #define HCI_FLOW_CTRL_LAG_VALUE(x) (((x)[HCI_FEATURE_FLOW_CTRL_LAG_OFF] & HCI_FEATURE_FLOW_CTRL_LAG_MASK) >> 4) 1655 1656 #define HCI_FEATURE_BROADCAST_ENC_MASK 0x80 1657 #define HCI_FEATURE_BROADCAST_ENC_OFF 2 1658 #define HCI_LMP_BCAST_ENC_SUPPORTED(x) ((x)[HCI_FEATURE_BROADCAST_ENC_OFF] & HCI_FEATURE_BROADCAST_ENC_MASK) 1659 1660 #define HCI_FEATURE_SCATTER_MODE_MASK 0x01 1661 #define HCI_FEATURE_SCATTER_MODE_OFF 3 1662 #define HCI_LMP_SCATTER_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SCATTER_MODE_OFF] & HCI_FEATURE_SCATTER_MODE_MASK) 1663 1664 #define HCI_FEATURE_EDR_ACL_2MPS_MASK 0x02 1665 #define HCI_FEATURE_EDR_ACL_2MPS_OFF 3 1666 #define HCI_EDR_ACL_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_2MPS_OFF] & HCI_FEATURE_EDR_ACL_2MPS_MASK) 1667 1668 #define HCI_FEATURE_EDR_ACL_3MPS_MASK 0x04 1669 #define HCI_FEATURE_EDR_ACL_3MPS_OFF 3 1670 #define HCI_EDR_ACL_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_3MPS_OFF] & HCI_FEATURE_EDR_ACL_3MPS_MASK) 1671 1672 #define HCI_FEATURE_ENHANCED_INQ_MASK 0x08 1673 #define HCI_FEATURE_ENHANCED_INQ_OFF 3 1674 #define HCI_ENHANCED_INQ_SUPPORTED(x) ((x)[HCI_FEATURE_ENHANCED_INQ_OFF] & HCI_FEATURE_ENHANCED_INQ_MASK) 1675 1676 #define HCI_FEATURE_INTERLACED_INQ_SCAN_MASK 0x10 1677 #define HCI_FEATURE_INTERLACED_INQ_SCAN_OFF 3 1678 #define HCI_LMP_INTERLACED_INQ_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_INQ_SCAN_OFF] & HCI_FEATURE_INTERLACED_INQ_SCAN_MASK) 1679 1680 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK 0x20 1681 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF 3 1682 #define HCI_LMP_INTERLACED_PAGE_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF] & HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK) 1683 1684 #define HCI_FEATURE_INQ_RSSI_MASK 0x40 1685 #define HCI_FEATURE_INQ_RSSI_OFF 3 1686 #define HCI_LMP_INQ_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RSSI_OFF] & HCI_FEATURE_INQ_RSSI_MASK) 1687 1688 #define HCI_FEATURE_ESCO_EV3_MASK 0x80 1689 #define HCI_FEATURE_ESCO_EV3_OFF 3 1690 #define HCI_ESCO_EV3_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV3_OFF] & HCI_FEATURE_ESCO_EV3_MASK) 1691 1692 #define HCI_FEATURE_ESCO_EV4_MASK 0x01 1693 #define HCI_FEATURE_ESCO_EV4_OFF 4 1694 #define HCI_ESCO_EV4_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV4_OFF] & HCI_FEATURE_ESCO_EV4_MASK) 1695 1696 #define HCI_FEATURE_ESCO_EV5_MASK 0x02 1697 #define HCI_FEATURE_ESCO_EV5_OFF 4 1698 #define HCI_ESCO_EV5_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV5_OFF] & HCI_FEATURE_ESCO_EV5_MASK) 1699 1700 #define HCI_FEATURE_ABSENCE_MASKS_MASK 0x04 1701 #define HCI_FEATURE_ABSENCE_MASKS_OFF 4 1702 #define HCI_LMP_ABSENCE_MASKS_SUPPORTED(x) ((x)[HCI_FEATURE_ABSENCE_MASKS_OFF] & HCI_FEATURE_ABSENCE_MASKS_MASK) 1703 1704 #define HCI_FEATURE_AFH_CAP_SLAVE_MASK 0x08 1705 #define HCI_FEATURE_AFH_CAP_SLAVE_OFF 4 1706 #define HCI_LMP_AFH_CAP_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_SLAVE_OFF] & HCI_FEATURE_AFH_CAP_SLAVE_MASK) 1707 1708 #define HCI_FEATURE_AFH_CLASS_SLAVE_MASK 0x10 1709 #define HCI_FEATURE_AFH_CLASS_SLAVE_OFF 4 1710 #define HCI_LMP_AFH_CLASS_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_SLAVE_OFF] & HCI_FEATURE_AFH_CLASS_SLAVE_MASK) 1711 1712 #if 1 1713 #define HCI_FEATURE_BREDR_NOT_SPT_MASK 0x20 1714 #define HCI_FEATURE_BREDR_NOT_SPT_OFF 4 1715 #define HCI_BREDR_NOT_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_BREDR_NOT_SPT_OFF] & HCI_FEATURE_BREDR_NOT_SPT_MASK) 1716 1717 #define HCI_FEATURE_LE_SPT_MASK 0x40 1718 #define HCI_FEATURE_LE_SPT_OFF 4 1719 #define HCI_LE_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_LE_SPT_OFF] & HCI_FEATURE_LE_SPT_MASK) 1720 #else 1721 1722 #define HCI_FEATURE_ALIAS_AUTH_MASK 0x20 1723 #define HCI_FEATURE_ALIAS_AUTH_OFF 4 1724 #define HCI_LMP_ALIAS_AUTH_SUPPORTED(x) ((x)[HCI_FEATURE_ALIAS_AUTH_OFF] & HCI_FEATURE_ALIAS_AUTH_MASK) 1725 1726 #define HCI_FEATURE_ANON_MODE_MASK 0x40 1727 #define HCI_FEATURE_ANON_MODE_OFF 4 1728 #define HCI_LMP_ANON_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_ANON_MODE_OFF] & HCI_FEATURE_ANON_MODE_MASK) 1729 #endif 1730 1731 #define HCI_FEATURE_3_SLOT_EDR_ACL_MASK 0x80 1732 #define HCI_FEATURE_3_SLOT_EDR_ACL_OFF 4 1733 #define HCI_3_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ACL_OFF] & HCI_FEATURE_3_SLOT_EDR_ACL_MASK) 1734 1735 #define HCI_FEATURE_5_SLOT_EDR_ACL_MASK 0x01 1736 #define HCI_FEATURE_5_SLOT_EDR_ACL_OFF 5 1737 #define HCI_5_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_EDR_ACL_OFF] & HCI_FEATURE_5_SLOT_EDR_ACL_MASK) 1738 1739 #define HCI_FEATURE_SNIFF_SUB_RATE_MASK 0x02 1740 #define HCI_FEATURE_SNIFF_SUB_RATE_OFF 5 1741 #define HCI_SNIFF_SUB_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_SUB_RATE_OFF] & HCI_FEATURE_SNIFF_SUB_RATE_MASK) 1742 1743 #define HCI_FEATURE_ATOMIC_ENCRYPT_MASK 0x04 1744 #define HCI_FEATURE_ATOMIC_ENCRYPT_OFF 5 1745 #define HCI_ATOMIC_ENCRYPT_SUPPORTED(x) ((x)[HCI_FEATURE_ATOMIC_ENCRYPT_OFF] & HCI_FEATURE_ATOMIC_ENCRYPT_MASK) 1746 1747 #define HCI_FEATURE_AFH_CAP_MASTR_MASK 0x08 1748 #define HCI_FEATURE_AFH_CAP_MASTR_OFF 5 1749 #define HCI_LMP_AFH_CAP_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_MASTR_OFF] & HCI_FEATURE_AFH_CAP_MASTR_MASK) 1750 1751 #define HCI_FEATURE_AFH_CLASS_MASTR_MASK 0x10 1752 #define HCI_FEATURE_AFH_CLASS_MASTR_OFF 5 1753 #define HCI_LMP_AFH_CLASS_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_MASTR_OFF] & HCI_FEATURE_AFH_CLASS_MASTR_MASK) 1754 1755 #define HCI_FEATURE_EDR_ESCO_2MPS_MASK 0x20 1756 #define HCI_FEATURE_EDR_ESCO_2MPS_OFF 5 1757 #define HCI_EDR_ESCO_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_2MPS_OFF] & HCI_FEATURE_EDR_ESCO_2MPS_MASK) 1758 1759 #define HCI_FEATURE_EDR_ESCO_3MPS_MASK 0x40 1760 #define HCI_FEATURE_EDR_ESCO_3MPS_OFF 5 1761 #define HCI_EDR_ESCO_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_3MPS_OFF] & HCI_FEATURE_EDR_ESCO_3MPS_MASK) 1762 1763 #define HCI_FEATURE_3_SLOT_EDR_ESCO_MASK 0x80 1764 #define HCI_FEATURE_3_SLOT_EDR_ESCO_OFF 5 1765 #define HCI_3_SLOT_EDR_ESCO_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ESCO_OFF] & HCI_FEATURE_3_SLOT_EDR_ESCO_MASK) 1766 1767 #define HCI_FEATURE_EXT_INQ_RSP_MASK 0x01 1768 #define HCI_FEATURE_EXT_INQ_RSP_OFF 6 1769 #define HCI_EXT_INQ_RSP_SUPPORTED(x) ((x)[HCI_FEATURE_EXT_INQ_RSP_OFF] & HCI_FEATURE_EXT_INQ_RSP_MASK) 1770 1771 #if 1 /* TOKYO spec definition */ 1772 #define HCI_FEATURE_SIMUL_LE_BREDR_MASK 0x02 1773 #define HCI_FEATURE_SIMUL_LE_BREDR_OFF 6 1774 #define HCI_SIMUL_LE_BREDR_SUPPORTED(x) ((x)[HCI_FEATURE_SIMUL_LE_BREDR_OFF] & HCI_FEATURE_SIMUL_LE_BREDR_MASK) 1775 1776 #else 1777 #define HCI_FEATURE_ANUM_PIN_AWARE_MASK 0x02 1778 #define HCI_FEATURE_ANUM_PIN_AWARE_OFF 6 1779 #define HCI_ANUM_PIN_AWARE_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_AWARE_OFF] & HCI_FEATURE_ANUM_PIN_AWARE_MASK) 1780 #endif 1781 1782 #define HCI_FEATURE_ANUM_PIN_CAP_MASK 0x04 1783 #define HCI_FEATURE_ANUM_PIN_CAP_OFF 6 1784 #define HCI_ANUM_PIN_CAP_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_CAP_OFF] & HCI_FEATURE_ANUM_PIN_CAP_MASK) 1785 1786 #define HCI_FEATURE_SIMPLE_PAIRING_MASK 0x08 1787 #define HCI_FEATURE_SIMPLE_PAIRING_OFF 6 1788 #define HCI_SIMPLE_PAIRING_SUPPORTED(x) ((x)[HCI_FEATURE_SIMPLE_PAIRING_OFF] & HCI_FEATURE_SIMPLE_PAIRING_MASK) 1789 1790 #define HCI_FEATURE_ENCAP_PDU_MASK 0x10 1791 #define HCI_FEATURE_ENCAP_PDU_OFF 6 1792 #define HCI_ENCAP_PDU_SUPPORTED(x) ((x)[HCI_FEATURE_ENCAP_PDU_OFF] & HCI_FEATURE_ENCAP_PDU_MASK) 1793 1794 #define HCI_FEATURE_ERROR_DATA_MASK 0x20 1795 #define HCI_FEATURE_ERROR_DATA_OFF 6 1796 #define HCI_ERROR_DATA_SUPPORTED(x) ((x)[HCI_FEATURE_ERROR_DATA_OFF] & HCI_FEATURE_ERROR_DATA_MASK) 1797 1798 #define HCI_FEATURE_NON_FLUSHABLE_PB_MASK 0x40 1799 #define HCI_FEATURE_NON_FLUSHABLE_PB_OFF 6 1800 1801 // btla-specific ++ 1802 #ifdef ANDROID_APP_INCLUDED 1803 /* This feature is causing frequent link drops when doing call switch with certain av/hfp headsets */ 1804 #define HCI_NON_FLUSHABLE_PB_SUPPORTED(x) (0)//((x)[HCI_FEATURE_NON_FLUSHABLE_PB_OFF] & HCI_FEATURE_NON_FLUSHABLE_PB_MASK) 1805 #else 1806 #define HCI_NON_FLUSHABLE_PB_SUPPORTED(x) ((x)[HCI_FEATURE_NON_FLUSHABLE_PB_OFF] & HCI_FEATURE_NON_FLUSHABLE_PB_MASK) 1807 #endif 1808 // btla-specific -- 1809 1810 #define HCI_FEATURE_LINK_SUP_TO_EVT_MASK 0x01 1811 #define HCI_FEATURE_LINK_SUP_TO_EVT_OFF 7 1812 #define HCI_LINK_SUP_TO_EVT_SUPPORTED(x) ((x)[HCI_FEATURE_LINK_SUP_TO_EVT_OFF] & HCI_FEATURE_LINK_SUP_TO_EVT_MASK) 1813 1814 #define HCI_FEATURE_INQ_RESP_TX_MASK 0x02 1815 #define HCI_FEATURE_INQ_RESP_TX_OFF 7 1816 #define HCI_INQ_RESP_TX_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RESP_TX_OFF] & HCI_FEATURE_INQ_RESP_TX_MASK) 1817 1818 #define HCI_FEATURE_EXTENDED_MASK 0x80 1819 #define HCI_FEATURE_EXTENDED_OFF 7 1820 #define HCI_LMP_EXTENDED_SUPPORTED(x) ((x)[HCI_FEATURE_EXTENDED_OFF] & HCI_FEATURE_EXTENDED_MASK) 1821 1822 /* 1823 ** LMP features encoding - page 1 1824 */ 1825 #define HCI_EXT_FEATURE_SSP_HOST_MASK 0x01 1826 #define HCI_EXT_FEATURE_SSP_HOST_OFF 0 1827 #define HCI_SSP_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SSP_HOST_OFF] & HCI_EXT_FEATURE_SSP_HOST_MASK) 1828 1829 #define HCI_EXT_FEATURE_LE_HOST_MASK 0x02 1830 #define HCI_EXT_FEATURE_LE_HOST_OFF 0 1831 #define HCI_LE_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_LE_HOST_OFF] & HCI_EXT_FEATURE_LE_HOST_MASK) 1832 1833 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK 0x04 1834 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF 0 1835 #define HCI_SIMUL_DUMO_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF] & HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK) 1836 1837 #define HCI_EXT_FEATURE_SC_HOST_MASK 0x08 1838 #define HCI_EXT_FEATURE_SC_HOST_OFF 0 1839 #define HCI_SC_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SC_HOST_OFF] & HCI_EXT_FEATURE_SC_HOST_MASK) 1840 1841 /* 1842 ** LMP features encoding - page 2 1843 */ 1844 #define HCI_EXT_FEATURE_CSB_MASTER_MASK 0x01 1845 #define HCI_EXT_FEATURE_CSB_MASTER_OFF 0 1846 #define HCI_CSB_MASTER_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_MASTER_OFF] & HCI_EXT_FEATURE_CSB_MASTER_MASK) 1847 1848 #define HCI_EXT_FEATURE_CSB_SLAVE_MASK 0x02 1849 #define HCI_EXT_FEATURE_CSB_SLAVE_OFF 0 1850 #define HCI_CSB_SLAVE_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_SLAVE_OFF] & HCI_EXT_FEATURE_CSB_SLAVE_MASK) 1851 1852 #define HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_MASK 0x04 1853 #define HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_OFF 0 1854 #define HCI_SYNC_TRAIN_MASTER_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_OFF] & HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_MASK) 1855 1856 #define HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_MASK 0x08 1857 #define HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_OFF 0 1858 #define HCI_SYNC_SCAN_SLAVE_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_OFF] & HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_MASK) 1859 1860 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK 0x10 1861 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF 0 1862 #define HCI_INQ_RESP_NOTIF_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF] & HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK) 1863 1864 #define HCI_EXT_FEATURE_SC_CTRLR_MASK 0x01 1865 #define HCI_EXT_FEATURE_SC_CTRLR_OFF 1 1866 #define HCI_SC_CTRLR_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SC_CTRLR_OFF] & HCI_EXT_FEATURE_SC_CTRLR_MASK) 1867 1868 #define HCI_EXT_FEATURE_PING_MASK 0x02 1869 #define HCI_EXT_FEATURE_PING_OFF 1 1870 #define HCI_PING_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_PING_OFF] & HCI_EXT_FEATURE_PING_MASK) 1871 1872 /* 1873 ** LE features encoding - page 0 (the only page for now) 1874 */ 1875 /* LE Encryption */ 1876 #define HCI_LE_FEATURE_LE_ENCRYPTION_MASK 0x01 1877 #define HCI_LE_FEATURE_LE_ENCRYPTION_OFF 0 1878 #define HCI_LE_ENCRYPTION_SUPPORTED(x) ((x)[HCI_LE_FEATURE_LE_ENCRYPTION_OFF] & HCI_LE_FEATURE_LE_ENCRYPTION_MASK) 1879 1880 /* Connection Parameters Request Procedure */ 1881 #define HCI_LE_FEATURE_CONN_PARAM_REQ_MASK 0x02 1882 #define HCI_LE_FEATURE_CONN_PARAM_REQ_OFF 0 1883 #define HCI_LE_CONN_PARAM_REQ_SUPPORTED(x) ((x)[HCI_LE_FEATURE_CONN_PARAM_REQ_OFF] & HCI_LE_FEATURE_CONN_PARAM_REQ_MASK) 1884 1885 /* Extended Reject Indication */ 1886 #define HCI_LE_FEATURE_EXT_REJ_IND_MASK 0x04 1887 #define HCI_LE_FEATURE_EXT_REJ_IND_OFF 0 1888 #define HCI_LE_EXT_REJ_IND_SUPPORTED(x) ((x)[HCI_LE_FEATURE_EXT_REJ_IND_OFF] & HCI_LE_FEATURE_EXT_REJ_IND_MASK) 1889 1890 /* Slave-initiated Features Exchange */ 1891 #define HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_MASK 0x08 1892 #define HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_OFF 0 1893 #define HCI_LE_SLAVE_INIT_FEAT_EXC_SUPPORTED(x) ((x)[HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_OFF] & HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_MASK) 1894 1895 /* 1896 ** Local Supported Commands encoding 1897 */ 1898 #define HCI_NUM_SUPP_COMMANDS_BYTES 64 1899 1900 /* Supported Commands Byte 0 */ 1901 #define HCI_SUPP_COMMANDS_INQUIRY_MASK 0x01 1902 #define HCI_SUPP_COMMANDS_INQUIRY_OFF 0 1903 #define HCI_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_OFF] & HCI_SUPP_COMMANDS_INQUIRY_MASK) 1904 1905 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK 0x02 1906 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF 0 1907 #define HCI_INQUIRY_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF] & HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK) 1908 1909 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK 0x04 1910 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF 0 1911 #define HCI_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK) 1912 1913 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK 0x08 1914 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF 0 1915 #define HCI_EXIT_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK) 1916 1917 #define HCI_SUPP_COMMANDS_CREATE_CONN_MASK 0x10 1918 #define HCI_SUPP_COMMANDS_CREATE_CONN_OFF 0 1919 #define HCI_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CREATE_CONN_MASK) 1920 1921 #define HCI_SUPP_COMMANDS_DISCONNECT_MASK 0x20 1922 #define HCI_SUPP_COMMANDS_DISCONNECT_OFF 0 1923 #define HCI_DISCONNECT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_MASK) 1924 1925 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK 0x40 1926 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF 0 1927 #define HCI_ADD_SCO_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF] & HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK) 1928 1929 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK 0x80 1930 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF 0 1931 #define HCI_CANCEL_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK) 1932 1933 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK 0x01 1934 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF 1 1935 #define HCI_ACCEPT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK) 1936 1937 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK 0x02 1938 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF 1 1939 #define HCI_REJECT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK) 1940 1941 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK 0x04 1942 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF 1 1943 #define HCI_LINK_KEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK) 1944 1945 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK 0x08 1946 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF 1 1947 #define HCI_LINK_KEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK) 1948 1949 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK 0x10 1950 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF 1 1951 #define HCI_PIN_CODE_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK) 1952 1953 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK 0x20 1954 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF 1 1955 #define HCI_PIN_CODE_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK) 1956 1957 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK 0x40 1958 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF 1 1959 #define HCI_CHANGE_CONN_PKT_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK) 1960 1961 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK 0x80 1962 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF 1 1963 #define HCI_AUTH_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF] & HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK) 1964 1965 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK 0x01 1966 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF 2 1967 #define HCI_SET_CONN_ENCRYPTION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF] & HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK) 1968 1969 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK 0x02 1970 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF 2 1971 #define HCI_CHANGE_CONN_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK) 1972 1973 #define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK 0x04 1974 #define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF 2 1975 #define HCI_MASTER_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK) 1976 1977 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK 0x08 1978 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF 2 1979 #define HCI_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK) 1980 1981 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK 0x10 1982 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF 2 1983 #define HCI_CANCEL_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK) 1984 1985 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK 0x20 1986 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF 2 1987 #define HCI_READ_REMOTE_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK) 1988 1989 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK 0x40 1990 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF 2 1991 #define HCI_READ_REMOTE_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK) 1992 1993 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK 0x80 1994 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF 2 1995 #define HCI_READ_REMOTE_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK) 1996 1997 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK 0x01 1998 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF 3 1999 #define HCI_READ_CLOCK_OFFSET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF] & HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK) 2000 2001 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK 0x02 2002 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF 3 2003 #define HCI_READ_LMP_HANDLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF] & HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK) 2004 2005 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK 0x02 2006 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF 4 2007 #define HCI_HOLD_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK) 2008 2009 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK 0x04 2010 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF 4 2011 #define HCI_SNIFF_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK) 2012 2013 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK 0x08 2014 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF 4 2015 #define HCI_EXIT_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF] & HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK) 2016 2017 #define HCI_SUPP_COMMANDS_PARK_STATE_MASK 0x10 2018 #define HCI_SUPP_COMMANDS_PARK_STATE_OFF 4 2019 #define HCI_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_PARK_STATE_MASK) 2020 2021 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK 0x20 2022 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF 4 2023 #define HCI_EXIT_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK) 2024 2025 #define HCI_SUPP_COMMANDS_QOS_SETUP_MASK 0x40 2026 #define HCI_SUPP_COMMANDS_QOS_SETUP_OFF 4 2027 #define HCI_QOS_SETUP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_QOS_SETUP_OFF] & HCI_SUPP_COMMANDS_QOS_SETUP_MASK) 2028 2029 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK 0x80 2030 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF 4 2031 #define HCI_ROLE_DISCOVERY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF] & HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK) 2032 2033 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK 0x01 2034 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF 5 2035 #define HCI_SWITCH_ROLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF] & HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK) 2036 2037 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK 0x02 2038 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF 5 2039 #define HCI_READ_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK) 2040 2041 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK 0x04 2042 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF 5 2043 #define HCI_WRITE_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK) 2044 2045 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK 0x08 2046 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF 5 2047 #define HCI_READ_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK) 2048 2049 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK 0x10 2050 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF 5 2051 #define HCI_WRITE_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK) 2052 2053 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK 0x20 2054 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF 5 2055 #define HCI_FLOW_SPECIFICATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF] & HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK) 2056 2057 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK 0x40 2058 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF 5 2059 #define HCI_SET_EVENT_MASK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK) 2060 2061 #define HCI_SUPP_COMMANDS_RESET_MASK 0x80 2062 #define HCI_SUPP_COMMANDS_RESET_OFF 5 2063 #define HCI_RESET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_OFF] & HCI_SUPP_COMMANDS_RESET_MASK) 2064 2065 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK 0x01 2066 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF 6 2067 #define HCI_SET_EVENT_FILTER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK) 2068 2069 #define HCI_SUPP_COMMANDS_FLUSH_MASK 0x02 2070 #define HCI_SUPP_COMMANDS_FLUSH_OFF 6 2071 #define HCI_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLUSH_OFF] & HCI_SUPP_COMMANDS_FLUSH_MASK) 2072 2073 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK 0x04 2074 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF 6 2075 #define HCI_READ_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK) 2076 2077 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK 0x08 2078 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF 6 2079 #define HCI_WRITE_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK) 2080 2081 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK 0x10 2082 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF 6 2083 #define HCI_CREATE_NEW_UNIT_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF] & HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK) 2084 2085 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK 0x20 2086 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF 6 2087 #define HCI_READ_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK) 2088 2089 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK 0x40 2090 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF 6 2091 #define HCI_WRITE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK) 2092 2093 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK 0x80 2094 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF 6 2095 #define HCI_DELETE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK) 2096 2097 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK 0x01 2098 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF 7 2099 #define HCI_WRITE_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK) 2100 2101 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK 0x02 2102 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF 7 2103 #define HCI_READ_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK) 2104 2105 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK 0x04 2106 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF 7 2107 #define HCI_READ_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK) 2108 2109 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK 0x08 2110 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF 7 2111 #define HCI_WRITE_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK) 2112 2113 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK 0x10 2114 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF 7 2115 #define HCI_READ_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK) 2116 2117 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK 0x20 2118 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF 7 2119 #define HCI_WRITE_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK) 2120 2121 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK 0x40 2122 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF 7 2123 #define HCI_READ_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK) 2124 2125 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK 0x80 2126 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF 7 2127 #define HCI_WRITE_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK) 2128 2129 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK 0x01 2130 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF 8 2131 #define HCI_READ_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK) 2132 2133 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK 0x02 2134 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF 8 2135 #define HCI_WRITE_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK) 2136 2137 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK 0x04 2138 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF 8 2139 #define HCI_READ_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK) 2140 2141 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK 0x08 2142 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF 8 2143 #define HCI_WRITE_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK) 2144 2145 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK 0x10 2146 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF 8 2147 #define HCI_READ_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK) 2148 2149 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK 0x20 2150 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF 8 2151 #define HCI_WRITE_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK) 2152 2153 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK 0x40 2154 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF 8 2155 #define HCI_READ_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK) 2156 2157 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK 0x80 2158 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF 8 2159 #define HCI_WRITE_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK) 2160 2161 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK 0x01 2162 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF 9 2163 #define HCI_READ_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK) 2164 2165 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK 0x02 2166 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF 9 2167 #define HCI_WRITE_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK) 2168 2169 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK 0x04 2170 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF 9 2171 #define HCI_READ_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK) 2172 2173 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK 0x08 2174 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF 9 2175 #define HCI_WRITE_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK) 2176 2177 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK 0x10 2178 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF 9 2179 #define HCI_READ_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK) 2180 2181 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK 0x20 2182 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF 9 2183 #define HCI_WRITE_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK) 2184 2185 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK 0x40 2186 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF 9 2187 #define HCI_READ_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK) 2188 2189 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK 0x80 2190 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF 9 2191 #define HCI_WRITE_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK) 2192 2193 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK 0x01 2194 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF 10 2195 #define HCI_READ_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK) 2196 2197 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK 0x02 2198 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF 10 2199 #define HCI_WRITE_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK) 2200 2201 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK 0x04 2202 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF 10 2203 #define HCI_READ_TRANS_PWR_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK) 2204 2205 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK 0x08 2206 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF 10 2207 #define HCI_READ_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK) 2208 2209 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK 0x10 2210 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF 10 2211 #define HCI_WRITE_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK) 2212 2213 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK 0x20 2214 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF 10 2215 #define HCI_SET_HOST_CTRLR_TO_HOST_FC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF] & HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK) 2216 2217 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK 0x40 2218 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF 10 2219 #define HCI_HOST_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK) 2220 2221 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK 0x80 2222 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF 10 2223 #define HCI_HOST_NUM_COMPLETED_PKTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF] & HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK) 2224 2225 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK 0x01 2226 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF 11 2227 #define HCI_READ_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK) 2228 2229 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK 0x02 2230 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF 11 2231 #define HCI_WRITE_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK) 2232 2233 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK 0x04 2234 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF 11 2235 #define HCI_READ_NUM_SUPP_IAC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF] & HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK) 2236 2237 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK 0x08 2238 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF 11 2239 #define HCI_READ_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK) 2240 2241 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK 0x10 2242 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF 11 2243 #define HCI_WRITE_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK) 2244 2245 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK 0x20 2246 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF 11 2247 #define HCI_READ_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK) 2248 2249 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK 0x40 2250 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF 11 2251 #define HCI_WRITE_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK) 2252 2253 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK 0x80 2254 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF 11 2255 #define HCI_READ_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK) 2256 2257 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK 0x01 2258 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF 12 2259 #define HCI_WRITE_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK) 2260 2261 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK 0x02 2262 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF 12 2263 #define HCI_SET_AFH_CHNL_CLASS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF] & HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK) 2264 2265 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK 0x10 2266 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF 12 2267 #define HCI_READ_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK) 2268 2269 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK 0x20 2270 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF 12 2271 #define HCI_WRITE_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK) 2272 2273 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK 0x40 2274 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF 12 2275 #define HCI_READ_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK) 2276 2277 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK 0x80 2278 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF 12 2279 #define HCI_WRITE_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK) 2280 2281 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK 0x01 2282 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF 13 2283 #define HCI_READ_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK) 2284 2285 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK 0x02 2286 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF 13 2287 #define HCI_WRITE_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK) 2288 2289 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK 0x04 2290 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF 13 2291 #define HCI_READ_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK) 2292 2293 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK 0x08 2294 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF 13 2295 #define HCI_WRITE_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK) 2296 2297 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK 0x08 2298 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF 14 2299 #define HCI_READ_LOCAL_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK) 2300 2301 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK 0x10 2302 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF 14 2303 #define HCI_READ_LOCAL_SUP_CMDS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK) 2304 2305 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK 0x20 2306 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF 14 2307 #define HCI_READ_LOCAL_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK) 2308 2309 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK 0x40 2310 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF 14 2311 #define HCI_READ_LOCAL_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK) 2312 2313 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK 0x80 2314 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF 14 2315 #define HCI_READ_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK) 2316 2317 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK 0x01 2318 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF 15 2319 #define HCI_READ_COUNTRY_CODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF] & HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK) 2320 2321 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK 0x02 2322 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF 15 2323 #define HCI_READ_BD_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF] & HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK) 2324 2325 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK 0x04 2326 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF 15 2327 #define HCI_READ_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK) 2328 2329 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK 0x08 2330 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF 15 2331 #define HCI_RESET_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK) 2332 2333 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK 0x10 2334 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF 15 2335 #define HCI_GET_LINK_QUALITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF] & HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK) 2336 2337 #define HCI_SUPP_COMMANDS_READ_RSSI_MASK 0x20 2338 #define HCI_SUPP_COMMANDS_READ_RSSI_OFF 15 2339 #define HCI_READ_RSSI_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_RSSI_OFF] & HCI_SUPP_COMMANDS_READ_RSSI_MASK) 2340 2341 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK 0x40 2342 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF 15 2343 #define HCI_READ_AFH_CH_MAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK) 2344 2345 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK 0x80 2346 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF 15 2347 #define HCI_READ_BD_CLOCK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF] & HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK) 2348 2349 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK 0x01 2350 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF 16 2351 #define HCI_READ_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK) 2352 2353 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK 0x02 2354 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF 16 2355 #define HCI_WRITE_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK) 2356 2357 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK 0x04 2358 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF 16 2359 #define HCI_ENABLE_DEV_UNDER_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF] & HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK) 2360 2361 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK 0x08 2362 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF 16 2363 #define HCI_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK) 2364 2365 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK 0x10 2366 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF 16 2367 #define HCI_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK) 2368 2369 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK 0x20 2370 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF 16 2371 #define HCI_REJECT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK) 2372 2373 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK 0x01 2374 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF 17 2375 #define HCI_READ_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK) 2376 2377 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK 0x02 2378 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF 17 2379 #define HCI_WRITE_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK) 2380 2381 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK 0x04 2382 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF 17 2383 #define HCI_REFRESH_ENCRYPTION_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF] & HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK) 2384 2385 /* Octet 17, bit 3 is reserved */ 2386 2387 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK 0x10 2388 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF 17 2389 #define HCI_SNIFF_SUB_RATE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF] & HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK) 2390 2391 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK 0x20 2392 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF 17 2393 #define HCI_READ_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK) 2394 2395 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK 0x40 2396 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF 17 2397 #define HCI_WRITE_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK) 2398 2399 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK 0x80 2400 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF 17 2401 #define HCI_READ_LOCAL_OOB_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK) 2402 2403 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK 0x01 2404 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF 18 2405 #define HCI_READ_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK) 2406 2407 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK 0x02 2408 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF 18 2409 #define HCI_WRITE_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK) 2410 2411 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x04 2412 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2413 #define HCI_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2414 2415 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x08 2416 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2417 #define HCI_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2418 2419 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_MASK 0x80 2420 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_OFF 18 2421 #define HCI_IO_CAPABILITY_RESPONSE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_OFF] & HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_MASK) 2422 2423 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK 0x01 2424 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF 19 2425 #define HCI_USER_CONFIRMATION_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK) 2426 2427 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK 0x02 2428 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF 19 2429 #define HCI_USER_CONFIRMATION_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK) 2430 2431 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK 0x04 2432 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF 19 2433 #define HCI_USER_PASSKEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK) 2434 2435 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK 0x08 2436 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF 19 2437 #define HCI_USER_PASSKEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK) 2438 2439 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK 0x10 2440 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF 19 2441 #define HCI_REMOTE_OOB_DATA_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK) 2442 2443 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK 0x20 2444 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF 19 2445 #define HCI_WRITE_SIMPLE_PAIRING_DBG_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK) 2446 2447 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK 0x40 2448 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF 19 2449 #define HCI_ENHANCED_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF] & HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK) 2450 2451 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK 0x80 2452 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF 19 2453 #define HCI_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK) 2454 2455 /* Supported Commands (Byte 20) */ 2456 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK 0x04 2457 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF 20 2458 #define HCI_SEND_NOTIF_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF] & HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK) 2459 2460 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK 0x08 2461 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF 20 2462 #define HCI_IO_CAP_REQ_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK) 2463 2464 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK 0x10 2465 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF 20 2466 #define HCI_READ_ENCR_KEY_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK) 2467 2468 /* Supported Commands (Byte 21) */ 2469 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK 0x01 2470 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF 21 2471 #define HCI_CREATE_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK) 2472 2473 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK 0x02 2474 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF 21 2475 #define HCI_ACCEPT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK) 2476 2477 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK 0x04 2478 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF 21 2479 #define HCI_DISCONNECT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK) 2480 2481 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK 0x08 2482 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF 21 2483 #define HCI_CREATE_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK) 2484 2485 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK 0x10 2486 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF 21 2487 #define HCI_ACCEPT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK) 2488 2489 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK 0x20 2490 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF 21 2491 #define HCI_DISCONNECT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK) 2492 2493 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK 0x40 2494 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF 21 2495 #define HCI_LOGICAL_LINK_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF] & HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK) 2496 2497 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK 0x80 2498 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF 21 2499 #define HCI_FLOW_SPEC_MODIFY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF] & HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK) 2500 2501 /* Supported Commands (Byte 22) */ 2502 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x01 2503 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2504 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2505 2506 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x02 2507 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2508 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2509 2510 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK 0x04 2511 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF 22 2512 #define HCI_SET_EVENT_MASK_PAGE_2_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK) 2513 2514 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK 0x08 2515 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF 22 2516 #define HCI_READ_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK) 2517 2518 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK 0x10 2519 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF 22 2520 #define HCI_WRITE_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK) 2521 2522 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK 0x20 2523 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF 22 2524 #define HCI_READ_LOCAL_AMP_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK) 2525 2526 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK 0x40 2527 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF 22 2528 #define HCI_READ_LOCAL_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK) 2529 2530 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK 0x80 2531 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF 22 2532 #define HCI_WRITE_REMOTE_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK) 2533 2534 /* Supported Commands (Byte 23) */ 2535 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK 0x01 2536 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF 23 2537 #define HCI_READ_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK) 2538 2539 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK 0x02 2540 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF 23 2541 #define HCI_WRITE_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK) 2542 2543 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK 0x04 2544 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF 23 2545 #define HCI_READ_DATA_BLOCK_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK) 2546 2547 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK 0x20 2548 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF 23 2549 #define HCI_ENABLE_AMP_RCVR_REPORTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF] & HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK) 2550 2551 #define HCI_SUPP_COMMANDS_AMP_TEST_END_MASK 0x40 2552 #define HCI_SUPP_COMMANDS_AMP_TEST_END_OFF 23 2553 #define HCI_AMP_TEST_END_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_END_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_END_MASK) 2554 2555 #define HCI_SUPP_COMMANDS_AMP_TEST_MASK 0x80 2556 #define HCI_SUPP_COMMANDS_AMP_TEST_OFF 23 2557 #define HCI_AMP_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_MASK) 2558 2559 /* Supported Commands (Byte 24) */ 2560 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK 0x01 2561 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF 24 2562 #define HCI_READ_TRANSMIT_POWER_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK) 2563 2564 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK 0x04 2565 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF 24 2566 #define HCI_READ_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK) 2567 2568 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK 0x08 2569 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF 24 2570 #define HCI_WRITE_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK) 2571 2572 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK 0x10 2573 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF 24 2574 #define HCI_SHORT_RANGE_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF] & HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK) 2575 2576 /* LE commands TBD 2577 ** Supported Commands (Byte 24 continued) 2578 ** Supported Commands (Byte 25) 2579 ** Supported Commands (Byte 26) 2580 ** Supported Commands (Byte 27) 2581 ** Supported Commands (Byte 28) 2582 */ 2583 2584 /* Supported Commands (Byte 29) */ 2585 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK 0x08 2586 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF 29 2587 #define HCI_READ_ENH_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK) 2588 2589 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK 0x10 2590 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF 29 2591 #define HCI_READ_ENH_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK) 2592 2593 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK 0x20 2594 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF 29 2595 #define HCI_READ_LOCAL_CODECS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK) 2596 2597 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK 0x40 2598 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF 29 2599 #define HCI_SET_MWS_CHANNEL_PARAMETERS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF] & HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK) 2600 2601 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK 0x80 2602 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF 29 2603 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF] & HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK) 2604 2605 2606 /* Supported Commands (Byte 30) */ 2607 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK 0x01 2608 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF 30 2609 #define HCI_SET_MWS_SIGNALING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK) 2610 2611 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK 0x02 2612 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF 30 2613 #define HCI_SET_MWS_TRANSPORT_LAYER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF] & HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK) 2614 2615 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK 0x04 2616 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF 30 2617 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK) 2618 2619 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK 0x08 2620 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF 30 2621 #define HCI_GET_MWS_TRANS_LAYER_CFG_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF] & HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK) 2622 2623 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK 0x10 2624 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF 30 2625 #define HCI_SET_MWS_PATTERN_CONFIGURATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF] & HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK) 2626 2627 /* Supported Commands (Byte 30 bit 5) */ 2628 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK 0x20 2629 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF 30 2630 #define HCI_SET_TRIG_CLK_CAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF] & HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK) 2631 2632 2633 /* Supported Commands (Byte 30 bit 6-7) */ 2634 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE 0x06 2635 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF 30 2636 #define HCI_TRUNCATED_PAGE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE) 2637 2638 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL 0x07 2639 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF 30 2640 #define HCI_TRUNCATED_PAGE_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL) 2641 2642 /* Supported Commands (Byte 31 bit 6-7) */ 2643 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST 0x00 2644 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_OFF 31 2645 #define HCI_SET_CONLESS_SLAVE_BRCST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST) 2646 2647 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE 0x01 2648 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE_OFF 31 2649 #define HCI_SET_CONLESS_SLAVE_BRCST_RECEIVE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE) 2650 2651 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN 0x02 2652 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF 31 2653 #define HCI_START_SYNC_TRAIN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_START_SYNC_TRAIN) 2654 2655 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN 0x03 2656 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF 31 2657 #define HCI_RECEIVE_SYNC_TRAIN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN) 2658 2659 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR 0x04 2660 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF 31 2661 #define HCI_SET_RESERVED_LT_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR) 2662 2663 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR 0x05 2664 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF 31 2665 #define HCI_DELETE_RESERVED_LT_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR) 2666 2667 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA 0x06 2668 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA_OFF 31 2669 #define HCI_SET_CONLESS_SLAVE_BRCST_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA) 2670 2671 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM 0x07 2672 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF 31 2673 #define HCI_READ_SYNC_TRAIN_PARAM_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM) 2674 2675 /* Supported Commands (Byte 32 bit 0) */ 2676 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM 0x00 2677 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF 32 2678 #define HCI_WRITE_SYNC_TRAIN_PARAM_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM) 2679 2680 #define HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_MASK 0x02 2681 #define HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_OFF 32 2682 #define HCI_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_MASK) 2683 2684 #define HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_MASK 0x04 2685 #define HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_OFF 32 2686 #define HCI_READ_SECURE_CONNS_SUPPORT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_OFF] & HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_MASK) 2687 2688 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_MASK 0x08 2689 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_OFF 32 2690 #define HCI_WRITE_SECURE_CONNS_SUPPORT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_OFF] & HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_MASK) 2691 2692 #define HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_MASK 0x10 2693 #define HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_OFF 32 2694 #define HCI_READ_AUTHENT_PAYLOAD_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_MASK) 2695 2696 #define HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_MASK 0x20 2697 #define HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_OFF 32 2698 #define HCI_WRITE_AUTHENT_PAYLOAD_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_MASK) 2699 2700 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_MASK 0x40 2701 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_OFF 32 2702 #define HCI_READ_LOCAL_OOB_EXTENDED_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_MASK) 2703 2704 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_MASK 0x80 2705 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_OFF 32 2706 #define HCI_WRITE_SECURE_CONNECTIONS_TEST_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_MASK) 2707 2708 /* supported LE remote control connection parameter request reply */ 2709 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_MASK 0x10 2710 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_OFF 33 2711 #define HCI_LE_RC_CONN_PARAM_UPD_RPY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_OFF] & HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_MASK) 2712 2713 #define HCI_SUPP_COMMANDS_RLE_RC_CONN_PARAM_UPD_NEG_RPY_MASK 0x20 2714 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_NEG_RPY_OFF 33 2715 #define HCI_LE_RC_CONN_PARAM_UPD_NEG_RPY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_NEG_RPY_OFF] & HCI_SUPP_COMMANDS_RLE_RC_CONN_PARAM_UPD_NEG_RPY_MASK) 2716 2717 /* 2718 Commands of HCI_GRP_VENDOR_SPECIFIC group for WIDCOMM SW LM Simulator 2719 */ 2720 #ifdef _WIDCOMM 2721 2722 #define HCI_SET_HCI_TRACE (0x0001 | HCI_GRP_VENDOR_SPECIFIC) 2723 #define HCI_SET_LM_TRACE (0x0002 | HCI_GRP_VENDOR_SPECIFIC) 2724 #define HCI_WRITE_COUNTRY_CODE (0x0004 | HCI_GRP_VENDOR_SPECIFIC) 2725 #define HCI_READ_LM_HISTORY (0x0005 | HCI_GRP_VENDOR_SPECIFIC) 2726 #define HCI_WRITE_BD_ADDR (0x0006 | HCI_GRP_VENDOR_SPECIFIC) 2727 #define HCI_DISABLE_ENCRYPTION (0x0007 | HCI_GRP_VENDOR_SPECIFIC) 2728 #define HCI_DISABLE_AUTHENTICATION (0x0008 | HCI_GRP_VENDOR_SPECIFIC) 2729 #define HCI_GENERIC_LC_CMD (0x000A | HCI_GRP_VENDOR_SPECIFIC) 2730 #define HCI_INCR_POWER (0x000B | HCI_GRP_VENDOR_SPECIFIC) 2731 #define HCI_DECR_POWER (0x000C | HCI_GRP_VENDOR_SPECIFIC) 2732 2733 /* Definitions for the local transactions */ 2734 #define LM_DISCONNECT (0x00D0 | HCI_GRP_VENDOR_SPECIFIC) 2735 #define LM_AUTHENTICATION_REQUESTED (0x00D1 | HCI_GRP_VENDOR_SPECIFIC) 2736 #define LM_SET_CONN_ENCRYPTION (0x00D2 | HCI_GRP_VENDOR_SPECIFIC) 2737 #define LM_START_ENCRYPT_KEY_SIZE (0x00D3 | HCI_GRP_VENDOR_SPECIFIC) 2738 #define LM_START_ENCRYPTION (0x00D4 | HCI_GRP_VENDOR_SPECIFIC) 2739 #define LM_STOP_ENCRYPTION (0x00D5 | HCI_GRP_VENDOR_SPECIFIC) 2740 #define LM_CHANGE_CONN_PACKET_TYPE (0x00D6 | HCI_GRP_VENDOR_SPECIFIC) 2741 #define LM_RMT_NAME_REQUEST (0x00D7 | HCI_GRP_VENDOR_SPECIFIC) 2742 #define LM_READ_RMT_FEATURES (0x00D8 | HCI_GRP_VENDOR_SPECIFIC) 2743 #define LM_READ_RMT_VERSION_INFO (0x00D9 | HCI_GRP_VENDOR_SPECIFIC) 2744 #define LM_READ_RMT_TIMING_INFO (0x00DA | HCI_GRP_VENDOR_SPECIFIC) 2745 #define LM_READ_RMT_CLOCK_OFFSET (0x00DB | HCI_GRP_VENDOR_SPECIFIC) 2746 #define LM_HOLD_MODE (0x00DC | HCI_GRP_VENDOR_SPECIFIC) 2747 #define LM_EXIT_PARK_MODE (0x00DD | HCI_GRP_VENDOR_SPECIFIC) 2748 2749 #define LM_SCO_LINK_REQUEST (0x00E0 | HCI_GRP_VENDOR_SPECIFIC) 2750 #define LM_SCO_CHANGE (0x00E4 | HCI_GRP_VENDOR_SPECIFIC) 2751 #define LM_SCO_REMOVE (0x00E8 | HCI_GRP_VENDOR_SPECIFIC) 2752 #define LM_MAX_SLOTS (0x00F1 | HCI_GRP_VENDOR_SPECIFIC) 2753 #define LM_MAX_SLOTS_REQUEST (0x00F2 | HCI_GRP_VENDOR_SPECIFIC) 2754 2755 #ifdef INCLUDE_OPTIONAL_PAGING_SCHEME 2756 #define LM_OPTIONAL_PAGE_REQUEST (0x00F3 | HCI_GRP_VENDOR_SPECIFIC) 2757 #define LM_OPTIONAL_PAGESCAN_REQUEST (0x00F4 | HCI_GRP_VENDOR_SPECIFIC) 2758 #endif 2759 2760 #define LM_SETUP_COMPLETE (0x00FF | HCI_GRP_VENDOR_SPECIFIC) 2761 2762 #define LM_HIST_SEND_LMP_FRAME (0x0100 | HCI_GRP_VENDOR_SPECIFIC) 2763 #define LM_HIST_RECV_LMP_FRAME (0x0101 | HCI_GRP_VENDOR_SPECIFIC) 2764 #define LM_HIST_HCIT_ERROR (0x0102 | HCI_GRP_VENDOR_SPECIFIC) 2765 #define LM_HIST_PER_INQ_TOUT (0x0103 | HCI_GRP_VENDOR_SPECIFIC) 2766 #define LM_HIST_INQ_SCAN_TOUT (0x0104 | HCI_GRP_VENDOR_SPECIFIC) 2767 #define LM_HIST_PAGE_SCAN_TOUT (0x0105 | HCI_GRP_VENDOR_SPECIFIC) 2768 #define LM_HIST_RESET_TOUT (0x0106 | HCI_GRP_VENDOR_SPECIFIC) 2769 #define LM_HIST_MANDAT_PSCAN_TOUT (0x0107 | HCI_GRP_VENDOR_SPECIFIC) 2770 #define LM_HIST_ACL_START_TRANS (0x0108 | HCI_GRP_VENDOR_SPECIFIC) 2771 #define LM_HIST_ACL_HOST_REPLY (0x0109 | HCI_GRP_VENDOR_SPECIFIC) 2772 #define LM_HIST_ACL_TIMEOUT (0x010A | HCI_GRP_VENDOR_SPECIFIC) 2773 #define LM_HIST_ACL_TX_COMP (0x010B | HCI_GRP_VENDOR_SPECIFIC) 2774 #define LM_HIST_ACL_HCID_SUSPENDED (0x010C | HCI_GRP_VENDOR_SPECIFIC) 2775 #define LM_HIST_ACL_FAILED (0x010D | HCI_GRP_VENDOR_SPECIFIC) 2776 #define LM_HIST_HCI_COMMAND (0x010E | HCI_GRP_VENDOR_SPECIFIC) 2777 2778 #define LM_HIST_HCI_EVENT (0x010F | HCI_GRP_VENDOR_SPECIFIC) 2779 #define LM_HIST_HCI_UPDATA (0x0110 | HCI_GRP_VENDOR_SPECIFIC) 2780 #define LM_HIST_HCI_DNDATA (0x0111 | HCI_GRP_VENDOR_SPECIFIC) 2781 2782 #define HCI_ENTER_TEST_MODE (0x0300 | HCI_GRP_VENDOR_SPECIFIC) 2783 #define HCI_LMP_TEST_CNTRL (0x0301 | HCI_GRP_VENDOR_SPECIFIC) 2784 #define HCI_DEBUG_LC_CMD_MIN (0x0300 | HCI_GRP_VENDOR_SPECIFIC) 2785 #define HCI_DEBUG_LC_CMD_MAX (0x03FF | HCI_GRP_VENDOR_SPECIFIC) 2786 #define HCI_DEBUG_LC_COMMAND HCI_DEBUG_LC_CMD_MAX 2787 2788 #endif 2789 2790 2791 /* AMP VSE events 2792 */ 2793 #define AMP_VSE_CHANSPEC_CHAN_MASK 0x00ff 2794 2795 #define AMP_VSE_CHANSPEC_CTL_SB_MASK 0x0300 2796 #define AMP_VSE_CHANSPEC_CTL_SB_LOWER 0x0100 2797 #define AMP_VSE_CHANSPEC_CTL_SB_UPPER 0x0200 2798 #define AMP_VSE_CHANSPEC_CTL_SB_NONE 0x0300 2799 2800 #define AMP_VSE_CHANSPEC_BW_MASK 0x0C00 2801 #define AMP_VSE_CHANSPEC_BW_10 0x0400 2802 #define AMP_VSE_CHANSPEC_BW_20 0x0800 2803 #define AMP_VSE_CHANSPEC_BW_40 0x0C00 2804 2805 #define AMP_VSE_CHANSPEC_BAND_MASK 0xf000 2806 #define AMP_VSE_CHANSPEC_BAND_5G 0x1000 2807 #define AMP_VSE_CHANSPEC_BAND_2G 0x2000 2808 2809 2810 #endif 2811 2812