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1  /*
2   * Copyright (c) 2011 Intel Corporation. All Rights Reserved.
3   * Copyright (c) Imagination Technologies Limited, UK
4   *
5   * Permission is hereby granted, free of charge, to any person obtaining a
6   * copy of this software and associated documentation files (the
7   * "Software"), to deal in the Software without restriction, including
8   * without limitation the rights to use, copy, modify, merge, publish,
9   * distribute, sub license, and/or sell copies of the Software, and to
10   * permit persons to whom the Software is furnished to do so, subject to
11   * the following conditions:
12   *
13   * The above copyright notice and this permission notice (including the
14   * next paragraph) shall be included in all copies or substantial portions
15   * of the Software.
16   *
17   * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18   * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19   * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
20   * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
21   * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
22   * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
23   * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24   *
25   * Authors:
26   *    Elaine Wang <elaine.wang@intel.com>
27   *    Zeng Li <zeng.li@intel.com>
28   *
29   */
30  
31  #include "img_types.h"
32  #include "psb_drv_video.h"
33  #include "psb_surface.h"
34  #include "pnw_cmdbuf.h"
35  #include "pnw_hostjpeg.h"
36  #include "pnw_hostheader.h"
37  
38  #define TOPAZ_PIC_PARAMS_VERBOSE 0
39  
40  #define MAX_SLICES_PER_PICTURE 72
41  #define MAX_TOPAZ_CORES        4
42  #define MAX_TOPAZ_CMD_COUNT    (0x1000)
43  
44  #define TH_SKIP_IPE                     6
45  #define TH_INTER                        60
46  #define TH_INTER_QP                     10
47  #define TH_INTER_MAX_LEVEL      1500
48  #define TH_SKIP_SPE                     6
49  #define SPE_ZERO_THRESHOLD      6
50  
51  #define MAX_NUM_CORES 2
52  
53  
54  /* defines used for the second 32 bit word of the coded data header */
55  /* the average Qp used in this frame */
56  #define RC_STATUS_FRAME_AVE_QP_MASK             0x0ff
57  /* At least one slice in this frame was large enough for the firmware to
58   * try to reduce it by increasing Qp or skipping MBs */
59  #define RC_STATUS_FLAG_LARGE_SLICE              0x100
60  /* At least one slice in this frame was larger than the slice limit */
61  #define RC_STATUS_FLAG_SLICE_OVERFLOW   0x200
62  /* The peak bitrate was exceeded for this frame (VCM only) */
63  #define RC_STATUS_FLAG_BITRATE_OVERFLOW 0x400
64  #define SKIP_NEXT_FRAME                 0x800   /* The next frame should be skipped */
65  
66  #define IS_H264_ENC(codec) \
67      (IMG_CODEC_H264_CBR == (codec) || IMG_CODEC_H264_VCM == (codec))
68  
69  /* commands for topaz,shared with user space driver */
70  enum drm_pnw_topaz_cmd {
71      /* Common Commands */
72      MTX_CMDID_NULL,
73      MTX_CMDID_SHUTDOWN,
74  
75      /* Video Commands */
76      MTX_CMDID_START_PIC,
77      MTX_CMDID_DO_HEADER,
78      MTX_CMDID_ENCODE_SLICE,
79      MTX_CMDID_END_PIC,
80      MTX_CMDID_FLUSH,
81  
82      /* JPEG Commands */
83      MTX_CMDID_SETQUANT,  //!< (data: #JPEG_MTX_QUANT_TABLE)\n
84      MTX_CMDID_RESET_ENCODE, //!< (no data)\n
85      MTX_CMDID_ISSUEBUFF, //!< (data: #MTX_ISSUE_BUFFERS)\n
86      MTX_CMDID_SETUP,    //!< (data: #JPEG_MTX_DMA_SETUP)\n\n
87  
88      /* SW Commands */
89      MTX_CMDID_PAD = 0x7a, //!< Will be ignored by kernel
90      MTX_CMDID_SW_WRITEREG = 0x7b,
91      MTX_CMDID_SW_LEAVE_LOWPOWER = 0x7c,
92      MTX_CMDID_SW_ENTER_LOWPOWER = 0x7e,
93      MTX_CMDID_SW_NEW_CODEC = 0x7f
94  };
95  
96  
97  /* codecs topaz supports,shared with user space driver */
98  enum drm_pnw_topaz_codec {
99      IMG_CODEC_JPEG = 0,
100      IMG_CODEC_H264_NO_RC,
101      IMG_CODEC_H264_VBR,
102      IMG_CODEC_H264_CBR,
103      IMG_CODEC_H263_NO_RC,
104      IMG_CODEC_H263_VBR,
105      IMG_CODEC_H263_CBR,
106      IMG_CODEC_MPEG4_NO_RC,
107      IMG_CODEC_MPEG4_VBR,
108      IMG_CODEC_MPEG4_CBR,
109      IMG_CODEC_H264_VCM,     //!< H264 low constant bitrate (video conferencing mode)
110      IMG_CODEC_NUM
111  };
112  
113  typedef struct _RC_PARAMS_ {
114      IMG_UINT32  BitsPerSecond;
115      IMG_UINT32  InitialQp;
116      IMG_UINT32  BUSize;
117      IMG_UINT32  FrameRate;
118      IMG_UINT32  BufferSize;
119      IMG_UINT32  IntraFreq;
120      IMG_UINT16  IDRFreq;
121      IMG_UINT16   MinQP;
122      IMG_BOOL    RCEnable;
123      IMG_BOOL    FrameSkip;
124  
125      IMG_UINT8   Slices;
126      IMG_UINT32   InitialLevel;
127      IMG_INT32   InitialDelay;
128      IMG_INT8    QCPOffset;
129  
130      IMG_BOOL    bDisableFrameSkipping;
131      IMG_BOOL    bDisableBitStuffing;
132      IMG_BOOL    bBitrateChanged;
133  } IMG_RC_PARAMS;
134  
135  /*!
136  *****************************************************************************
137  *
138  * @Description    Struct describing rate control input parameters
139  *
140  * @Brief          Rate control input parameters
141  *
142  ****************************************************************************/
143  typedef struct {
144      IMG_UINT8   SeInitQP;               /* Initial QP for Sequence */
145      IMG_UINT8   MinQPVal;               /* Minimum QP value to use */
146      IMG_UINT8   MaxQPVal;               /* Maximum QP value to use */
147  
148      IMG_UINT8   MBPerRow;               /* Number of MBs Per Row */
149      IMG_UINT16  MBPerFrm;               /* Number of MBs Per Frame */
150      IMG_UINT16  MBPerBU;                /* Number of MBs Per BU */
151      IMG_UINT16  BUPerFrm;               /* Number of BUs Per Frame */
152  
153      IMG_UINT16  IntraPeriod;    /* Intra frame frequency */
154  
155      IMG_INT32   BitsPerFrm;             /* Bits Per Frame */
156      IMG_INT32   BitsPerBU;              /* Bits Per BU */
157      IMG_INT32   BitsPerMB;              /* Bits Per MB */
158  
159      IMG_INT32   BitRate;                        /* Bit Rate (bps) */
160      IMG_INT32   BufferSize;             /* Size of Buffer */
161      IMG_INT32   InitialLevel;   /* Initial Level of Buffer */
162      IMG_INT32   InitialDelay;   /* Initial Delay of Buffer */
163  
164      IMG_UINT8   ScaleFactor;            /* Scale Factor (H264 only) */
165  
166      /* Bitrate that should be targetted as a fraction of 128
167       * relative to maximum bitrate i32BitRate (VCM mode only)*/
168      IMG_UINT8   VCMBitrateMargin;
169  
170      IMG_UINT8   HalfFrameRate;  /* Half Frame Rate (MP4 only) */
171      IMG_UINT8   FCode;                  /* F Code (MP4 only) */
172  
173      /* TO BE DELETED -- ONCE MP4 RC CODE IS OPTIMISED */
174      IMG_INT32   BitsPerGOP;             /* Bits Per GOP (MP4 only) */
175      IMG_UINT16  AvQPVal;                /* Average QP in Current Picture */
176      IMG_UINT16  MyInitQP;               /* Initial Quantizer */
177  
178      /* The number of bits of margin to leave before forcing
179       * skipped macroblocks (VCM mode only)*/
180      IMG_INT32   ForeceSkipMargin;
181  
182      /* A constant used in rate control =
183       * (GopSize/(BufferSize-InitialLevel))*256 */
184      IMG_UINT32  RCScaleFactor;
185  
186      /* Only used in peak constrained VBR */
187      IMG_INT32 TransferRate;
188      IMG_INT32 MaxFrameSize;
189  } IN_RC_PARAMS;
190  
191  typedef enum _TH_SKIP_SCALE_ {
192      TH_SKIP_0 = 0,
193      TH_SKIP_12 = 1,
194      TH_SKIP_24 = 2
195  } TH_SKIP_SCALE;
196  
197  struct context_ENC_s {
198      object_context_p obj_context; /* back reference */
199  
200      IMG_UINT32       NumCores; /* Number of encode cores in Penwell */
201      IMG_UINT32       ParallelCores; /* Number of cores to use */
202      IMG_INT32       BelowParamsBufIdx;
203      IMG_INT16       RawWidth;
204      IMG_INT16       RawHeight;
205  
206      IMG_UINT16       Width;  /* ~0xf & (RawWidth + 0xf)*/
207      IMG_UINT16       Height;     /* ~0xf & (RawHeight + 0xf */
208  
209      IMG_UINT16       Slices;
210      enum drm_pnw_topaz_codec eCodec;
211      IMG_FORMAT      eFormat;
212      unsigned int    FCode;
213      IMG_RC_PARAMS   sRCParams;
214      IMG_INT32       AccessUnitNum;
215      IMG_UINT32      CmdCount;
216      IMG_UINT32      LastSync[2][MAX_TOPAZ_CORES];
217      IMG_INT32       FrmIdx;
218      IMG_BOOL        SliceHeaderReady[MAX_SLICES_PER_PICTURE];
219  
220      IMG_UINT32      InBuffer; /* total coded data in Byte */
221  
222      IMG_INT16       HeightMinus16MinusLRBTopOffset;
223      IMG_INT16       HeightMinus32MinusLRBTopOffset;
224      IMG_INT16       HeightMinusLRB_TopAndBottom_OffsetsPlus16;
225      IMG_INT16       HeightMinusLRBSearchHeight;
226      IMG_UINT32      IPEControl;
227      IMG_BOOL        SyncSequencer;
228  
229      IMG_UINT32       SliceToCore;  /* Core number to send current slice to */
230      IMG_INT32       LastSliceNum[MAX_TOPAZ_CORES]; /* Slice number of last slice sent to core */
231  
232      object_surface_p    src_surface;
233      object_surface_p    ref_surface;
234      object_surface_p    dest_surface;/* reconstructed surface */
235      object_buffer_p     coded_buf;
236  
237      /* save previous settings */
238      object_surface_p    previous_src_surface;
239      object_surface_p    previous_ref_surface;
240      object_surface_p    previous_dest_surface; /* reconstructed surface */
241  
242      /* point to the place in cmdbuf following START_PIC, the initial_qp will fill into it later */
243      uint32_t *initial_qp_in_cmdbuf;
244  
245  
246      /* global topaz_params buffer shared by every cmdbuffer
247       * it is because filling InParams for every MB is very time-consuming
248       * and in most cases, we can reuse previous frames buffer
249       */
250      /* 0 and 1 are for in_parms, 2 is for bellow and above params*/
251  
252      struct psb_buffer_s topaz_in_params_I;
253      struct psb_buffer_s topaz_in_params_P;
254  
255      struct psb_buffer_s topaz_below_params; /* MB MVs read & written by HW */
256      struct psb_buffer_s topaz_above_params; /* MB MVs read & written by HW */
257  
258      uint32_t topaz_buffer_size;
259      uint32_t in_params_size;
260      uint32_t below_params_size;
261      uint32_t above_params_size;
262  
263      /* offset in topaz_param buffer */
264      uint32_t in_params_ofs;
265  
266      uint32_t below_params_ofs;
267      uint32_t above_params_ofs;
268  
269      uint32_t pic_params_size;
270  
271      uint32_t header_buffer_size;
272  
273      uint32_t seq_header_ofs;
274      uint32_t pic_header_ofs;
275      uint32_t eoseq_header_ofs;
276      uint32_t eostream_header_ofs;
277      uint32_t slice_header_ofs;
278      /*HRD SEI header*/
279      uint32_t aud_header_ofs;
280      uint32_t sei_buf_prd_ofs;
281      uint32_t sei_pic_tm_ofs;
282      uint32_t sei_pic_fpa_ofs;
283      uint32_t sei_pic_data_size;
284  
285      uint32_t sliceparam_buffer_size;
286  
287      IN_RC_PARAMS in_params_cache; /* following frames reuse the first frame's IN_RC_PARAMS, cache it */
288      TH_SKIP_SCALE THSkip;
289      uint32_t pic_params_flags;
290  
291      VAEncSliceParameterBuffer *slice_param_cache;
292      uint16_t slice_param_num;
293  
294      IMG_UINT16 MPEG4_vop_time_increment_resolution;
295  
296      /* saved information for FrameSkip redo */
297      uint32_t MPEG4_vop_time_increment_frameskip;
298      uint32_t MPEG4_picture_type_frameskip;
299      uint8_t profile_idc;
300  
301      uint8_t force_idr_h264;
302  
303      /*If only one slice, it's zero. Otherwise it indicates size of parted coded_buf per slice*/
304      uint32_t coded_buf_per_slice;
305  
306      /*JPEG context*/
307      TOPAZSC_JPEG_ENCODER_CONTEXT *jpeg_ctx;
308  
309      /*H264 SEI_INSERTION*/
310      IMG_BOOL bInserHRDParams;
311  
312      uint32_t max_slice_size;
313      unsigned char *save_seq_header_p;
314  
315      IMG_INT16 num_air_mbs;
316      IMG_INT16 air_threshold;
317  
318      uint32_t buffer_size;
319      uint32_t initial_buffer_fullness;
320  
321      H264_VUI_PARAMS VUI_Params;
322      IMG_BOOL bInsertVUI;
323  
324      /*H264 idr_pic_id field in slice header*/
325      uint16_t idr_pic_id;
326      unsigned char none_vcl_nal;
327  
328      /*Keep growing and won't be reset on IDR frame*/
329      uint32_t raw_frame_count;
330  };
331  
332  typedef struct context_ENC_s *context_ENC_p;
333  
334  /*#define BELOW_PARAMS_SIZE 8*/
335  
336  #define HEADER_SIZE             128*2
337  
338  #define BELOW_PARAMS_SIZE       16
339  #define REGION_TYPE_2D          1
340  #define REGION_TYPE_LINEAR      0
341  #define REGION_TYPE_2DREF       3
342  
343  
344  #define MAX_RESIDUAL_PER_MB_H264        1260
345  #define ISINTER_FLAGS           0x1
346  #define ISH264_FLAGS            0x2
347  #define ISMPEG4_FLAGS           0x4
348  #define ISH263_FLAGS            0x8
349  #define DEBLOCK_FRAME           0x10
350  #define ISRC_FLAGS              0x20
351  #define ISCBR_FLAGS             0x40
352  #define ISVCM_FLAGS             0x80
353  #define ISVBR_FLAGS             0x100
354  #define ISCFS_FLAGS             0x200
355  #define INTERLEAVE_TARGET       0x400
356  #define FIRST_FRAME             0x800
357  #define SYNC_SEQUENCER          0x1000
358  #define DEBLOCK_SLICE           0x2000
359  #define DISABLE_FRAME_SKIPPING  0x4000 //!< Flag indicatest that frame skipping should be disabled.
360  #define DISABLE_BIT_STUFFING    0x8000 //!< Flag indicates that bit stuffing should be disabled.
361  
362  #define SPE_EDGE_LEFT   1       /* ->bMinXRealEdge*/
363  #define SPE_EDGE_RIGHT  2       /* ->bMaxXRealEdge*/
364  #define SPE_EDGE_TOP    4   /* ->bMinYRealEdge*/
365  #define SPE_EDGE_BOTTOM 8       /* ->bMaxYRealEdge*/
366  
367  #define BPH_SEI_NAL_INITIAL_CPB_REMOVAL_DELAY_SIZE 23
368  #define PTH_SEI_NAL_CPB_REMOVAL_DELAY_SIZE 23
369  #define PTH_SEI_NAL_DPB_OUTPUT_DELAY_SIZE 7
370  
371  #define FW_TOKEN_USED 0
372  #define NOT_USED_BY_TOPAZ 0
373  
374  typedef struct {
375      /* Transferred into the input params area of the macroblock parameter structure*/
376      IMG_BYTE    CurBlockAddr;
377      IMG_BYTE    IPEMin[2];
378      IMG_BYTE    IPEMax[2];
379      IMG_BYTE    RealEdge;  /*bMinXRealEdge, bMaxXRealEdge, bMinXRealEdge and bMinYRealEdge*/
380      /* Surrounding block availability */
381      IMG_BYTE    MVValid;
382      IMG_BYTE    ParamsValid;
383      IMG_BYTE     bySliceQP;
384      IMG_BYTE     bySliceQPC;
385  
386      IMG_BYTE     Reserved[6]; /* This is padding to make the transfers 16 bytes aligned*/
387      /* Transferred into the SW communication section of the macroblock
388       * parameter structure We shall EDMA the whole lot of this into eiob
389       * in one go, and then use two TDMA's to put it into seperate locations
390       * within the macroblock structure
391       */
392      IMG_UINT32   IPEControl;
393      IMG_UINT32   SPEControl;
394      IMG_UINT32   JMCompControl;
395      IMG_UINT32   VLCControl;
396  } MTX_CURRENT_IN_PARAMS;
397  
398  typedef struct { /* corresponding bytes inside the MB_IN structure: */
399      IMG_BYTE    BlockSizes;              /****************/
400      IMG_BYTE    IntraMode;               /*              */
401      IMG_BYTE    Intra4x4ModesBottom[2];  /*              */
402      IMG_BYTE    CodeType;                /*  [64 : 71]   */
403      IMG_BYTE    Reserved2;               /*              */
404      /*IMG_BYTE   SAD;*/
405      IMG_BYTE    QPy;                     /*              */
406      IMG_BYTE    QPc;                     /****************/
407  
408      IMG_BYTE    Reserved3[8];    /* This is padding to make the transfers 16 byte aligned*/
409  
410      IMG_UINT16  LumaSubBlockCoded;      /****************/
411      IMG_BYTE    ChromaSubBlockCoded;    /*              */
412      IMG_BYTE    LumaChromaDCCoded;      /*              */
413      /*  [129 : 143] */
414      IMG_BYTE    Lambda;                 /*              */
415      IMG_BYTE    Reserved[3];            /*              */
416      /*              */
417      IMG_BYTE    Intra4x4ModeDeltas[8];  /****************/
418  
419      /* Motion vectors */
420      IMG_UINT16  IntegerMV[16][2];      /* [207 : 144]  */
421      /* input region from host */
422  } MTX_CURRENT_OUT_PARAMS;
423  
424  
425  typedef struct _PIC_PARAMS_ {
426      IMG_UINT32          SrcYBase;
427      IMG_UINT32          SrcUBase;
428      IMG_UINT32          SrcVBase;
429      IMG_UINT32          DstYBase;
430      IMG_UINT32          DstUVBase;
431  
432      IMG_UINT16          SrcYStride;
433      IMG_UINT16          SrcUVStride;
434      IMG_UINT16          SrcYRowStride;
435      IMG_UINT16          SrcUVRowStride;
436  
437      IMG_UINT16          DstYStride;
438      IMG_UINT16          DstUVStride;
439  
440      IMG_UINT32          CodedBase;
441  
442      IMG_UINT32          BelowParamsInBase;
443      IMG_UINT32          BelowParamsOutBase;
444  
445      IMG_UINT32          AboveParamsBase;
446  
447      IMG_UINT16          Width;
448      IMG_UINT16          Height;
449      IMG_UINT32          Flags;
450  
451      IN_RC_PARAMS        sInParams;
452  
453      IMG_UINT16          SearchWidth;
454      IMG_UINT16          SearchHeight;
455  
456      IMG_UINT16          NumSlices;                      //!< Number of slices in the picture
457  
458      IMG_BOOL16 		IsPerSliceOutput;
459      // SEI_INSERTION
460      IMG_UINT64          ClockDivBitrate;
461      IMG_UINT32          MaxBufferMultClockDivBitrate;
462  } PIC_PARAMS;
463  
464  typedef enum {
465      INTRA_MB_OFF = 0,
466      INTRA_MB_AIR = 1,
467      INTRA_MB_SCANNING = 2
468  } INTRA_MB_OPERATION_MODE;
469  
470  /* ScanningIntraParams */
471  #define SCANNING_INTRA_MODE_MASK        (0x0000000f)
472  #define SCANNING_INTRA_MODE_SHIFT       (0)
473  #define SCANNING_INTRA_WIDTH_MASK       (0x000000f0)
474  #define SCANNING_INTRA_WIDTH_SHIFT      (4)
475  #define SCANNING_INTRA_WIDTH_MAX        (15)
476  #define SCANNING_INTRA_STEP_MASK        (0x00000f00)
477  #define SCANNING_INTRA_STEP_SHIFT       (8)
478  #define SCANNING_INTRA_STEP_MAX         (15)
479  
480  #define MTX_FLAG_WB_SKIPFRAME   (0x00000002)
481  #define MTX_FLAG_RC_MASK                (0xFFFF0000)
482  #define MTX_FLAG_RC_PICPARAM    (0x00010000)
483  #define MTX_FLAG_RC_SLICEPARAM  (0x00020000)
484  #define MTX_FLAG_RC_BUPARAM             (0x00040000)
485  #define MTX_FLAG_RC_GETBUPARAM  (0x00080000)
486  #define MTX_FLAG_RC_FRM_LEN         (0x00100000)
487  
488  
489  /* This holds the data that is needed at the start of a slice
490   */
491  typedef struct _SLICE_PARAMS_ {
492  
493      IMG_UINT16  SliceStartRowNum;
494      IMG_UINT16  SliceHeight; /*Height of slice in pixels*/
495  
496      IMG_UINT32  RefYBase;
497      IMG_UINT32  RefUVBase;
498      IMG_UINT16  RefYStride;
499      IMG_UINT16  RefUVStride;
500      IMG_UINT16  RefYRowStride;
501      IMG_UINT16  RefUVRowStride;
502  
503      IMG_UINT32  HostCtx;  /*Host context to insert into coded data header*/
504      IMG_UINT32  Flags;
505      IMG_UINT32  MaxSliceSize;
506      IMG_UINT32  FCode; /*FCode value MP4 only*/
507  
508      /*Pointer to array of MTX_CURRENT_IN_PARAMS for each MB*/
509      IMG_UINT32  InParamsBase;
510  
511      /*Maximum number of Adaptive intra refresh macroblocks for this slice*/
512      IMG_INT16   NumAirMBs;
513  
514      /*Theshold value used in Adaptive intra refresh calculation.*/
515      IMG_INT16   AirThreshold;
516      IMG_UINT32  ScanningIntraParams;
517  } SLICE_PARAMS;
518  
519  enum {
520      CBR = 0,
521      VBR
522  } eRCMode;
523  
524  enum {
525      EH263 = 0,
526      EMpeg4 = 1,
527      EH264 = 2,
528      EHJpeg = 3
529  } eEncodingFormat;
530  #define VAEncSliceParameter_Equal(src, dst)                             \
531      (((src)->start_row_number == (dst)->start_row_number)               \
532       && ((src)->slice_height == (dst)->slice_height)                    \
533       && ((src)->slice_flags.bits.is_intra == (dst)->slice_flags.bits.is_intra) \
534       && ((src)->slice_flags.bits.disable_deblocking_filter_idc == (dst)->slice_flags.bits.disable_deblocking_filter_idc))
535  
536  #define VAEncSliceParameter_LightEqual(src, dst)                             \
537      (((src)->start_row_number == (dst)->start_row_number)               \
538       && ((src)->slice_height == (dst)->slice_height)                    \
539       && ((src)->slice_flags.bits.disable_deblocking_filter_idc == (dst)->slice_flags.bits.disable_deblocking_filter_idc))
540  
541  
542  
543  #define SURFACE_INFO_SKIP_FLAG_SETTLED 0X80000000
544  #define GET_SURFACE_INFO_skipped_flag(psb_surface) ((int) (psb_surface->extra_info[5]))
545  #define SET_SURFACE_INFO_skipped_flag(psb_surface, value) psb_surface->extra_info[5] = (SURFACE_INFO_SKIP_FLAG_SETTLED | value)
546  #define CLEAR_SURFACE_INFO_skipped_flag(psb_surface) psb_surface->extra_info[5] = 0
547  
548  VAStatus pnw_CreateContext(object_context_p obj_context,
549                             object_config_p obj_config,
550                             unsigned char is_JPEG);
551  
552  
553  void pnw__setup_rcdata(context_ENC_p ctx, PIC_PARAMS *psPicParams, IMG_RC_PARAMS *rc_params);
554  
555  void pnw_DestroyContext(
556      object_context_p obj_context
557  );
558  
559  VAStatus pnw_BeginPicture(context_ENC_p ctx);
560  VAStatus pnw_EndPicture(context_ENC_p ctx);
561  
562  void pnw_setup_slice_params(
563      context_ENC_p  ctx, IMG_UINT16 YSliceStartPos,
564      IMG_UINT16 SliceHeight, IMG_BOOL IsIntra,
565      IMG_BOOL  VectorsValid, int bySliceQP);
566  
567  IMG_UINT32 pnw__send_encode_slice_params(
568      context_ENC_p ctx,
569      IMG_BOOL IsIntra,
570      IMG_UINT16 CurrentRow,
571      IMG_UINT8  DeblockIDC,
572      IMG_UINT32 FrameNum,
573      IMG_UINT16 SliceHeight,
574      IMG_UINT16 CurrentSlice);
575  
576  VAStatus pnw_RenderPictureParameter(context_ENC_p ctx, int core);
577  
578  
579  void pnw_reset_encoder_params(context_ENC_p ctx);
580  unsigned int pnw__get_ipe_control(enum drm_pnw_topaz_codec  eEncodingFormat);
581  
582  
583  VAStatus pnw_set_bias(context_ENC_p ctx, int core);
584  
585