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1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef POWERPCSUBTARGET_H
15 #define POWERPCSUBTARGET_H
16 
17 #include "PPCFrameLowering.h"
18 #include "PPCInstrInfo.h"
19 #include "PPCISelLowering.h"
20 #include "PPCJITInfo.h"
21 #include "PPCSelectionDAGInfo.h"
22 #include "llvm/ADT/Triple.h"
23 #include "llvm/IR/DataLayout.h"
24 #include "llvm/MC/MCInstrItineraries.h"
25 #include "llvm/Target/TargetSubtargetInfo.h"
26 #include <string>
27 
28 #define GET_SUBTARGETINFO_HEADER
29 #include "PPCGenSubtargetInfo.inc"
30 
31 // GCC #defines PPC on Linux but we use it as our namespace name
32 #undef PPC
33 
34 namespace llvm {
35 class StringRef;
36 
37 namespace PPC {
38   // -m directive values.
39   enum {
40     DIR_NONE,
41     DIR_32,
42     DIR_440,
43     DIR_601,
44     DIR_602,
45     DIR_603,
46     DIR_7400,
47     DIR_750,
48     DIR_970,
49     DIR_A2,
50     DIR_E500mc,
51     DIR_E5500,
52     DIR_PWR3,
53     DIR_PWR4,
54     DIR_PWR5,
55     DIR_PWR5X,
56     DIR_PWR6,
57     DIR_PWR6X,
58     DIR_PWR7,
59     DIR_PWR8,
60     DIR_64
61   };
62 }
63 
64 class GlobalValue;
65 class TargetMachine;
66 
67 class PPCSubtarget : public PPCGenSubtargetInfo {
68 protected:
69   /// stackAlignment - The minimum alignment known to hold of the stack frame on
70   /// entry to the function and which must be maintained by every function.
71   unsigned StackAlignment;
72 
73   /// Selected instruction itineraries (one entry per itinerary class.)
74   InstrItineraryData InstrItins;
75 
76   /// Which cpu directive was used.
77   unsigned DarwinDirective;
78 
79   /// Used by the ISel to turn in optimizations for POWER4-derived architectures
80   bool HasMFOCRF;
81   bool Has64BitSupport;
82   bool Use64BitRegs;
83   bool UseCRBits;
84   bool IsPPC64;
85   bool HasAltivec;
86   bool HasQPX;
87   bool HasVSX;
88   bool HasFCPSGN;
89   bool HasFSQRT;
90   bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
91   bool HasRecipPrec;
92   bool HasSTFIWX;
93   bool HasLFIWAX;
94   bool HasFPRND;
95   bool HasFPCVT;
96   bool HasISEL;
97   bool HasPOPCNTD;
98   bool HasLDBRX;
99   bool IsBookE;
100   bool DeprecatedMFTB;
101   bool DeprecatedDST;
102   bool HasLazyResolverStubs;
103   bool IsJITCodeModel;
104   bool IsLittleEndian;
105 
106   /// TargetTriple - What processor and OS we're targeting.
107   Triple TargetTriple;
108 
109   /// OptLevel - What default optimization level we're emitting code for.
110   CodeGenOpt::Level OptLevel;
111 
112   PPCFrameLowering FrameLowering;
113   const DataLayout DL;
114   PPCInstrInfo InstrInfo;
115   PPCJITInfo JITInfo;
116   PPCTargetLowering TLInfo;
117   PPCSelectionDAGInfo TSInfo;
118 
119 public:
120   /// This constructor initializes the data members to match that
121   /// of the specified triple.
122   ///
123   PPCSubtarget(const std::string &TT, const std::string &CPU,
124                const std::string &FS, PPCTargetMachine &TM, bool is64Bit,
125                CodeGenOpt::Level OptLevel);
126 
127   /// ParseSubtargetFeatures - Parses features string setting specified
128   /// subtarget options.  Definition of function is auto generated by tblgen.
129   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
130 
131   /// SetJITMode - This is called to inform the subtarget info that we are
132   /// producing code for the JIT.
133   void SetJITMode();
134 
135   /// getStackAlignment - Returns the minimum alignment known to hold of the
136   /// stack frame on entry to the function and which must be maintained by every
137   /// function for this subtarget.
getStackAlignment()138   unsigned getStackAlignment() const { return StackAlignment; }
139 
140   /// getDarwinDirective - Returns the -m directive specified for the cpu.
141   ///
getDarwinDirective()142   unsigned getDarwinDirective() const { return DarwinDirective; }
143 
144   /// getInstrItins - Return the instruction itineraries based on subtarget
145   /// selection.
getInstrItineraryData()146   const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
147 
getFrameLowering()148   const PPCFrameLowering *getFrameLowering() const { return &FrameLowering; }
getDataLayout()149   const DataLayout *getDataLayout() const { return &DL; }
getInstrInfo()150   const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; }
getJITInfo()151   PPCJITInfo *getJITInfo() { return &JITInfo; }
getTargetLowering()152   const PPCTargetLowering *getTargetLowering() const { return &TLInfo; }
getSelectionDAGInfo()153   const PPCSelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
154 
155   /// initializeSubtargetDependencies - Initializes using a CPU and feature string
156   /// so that we can use initializer lists for subtarget initialization.
157   PPCSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
158 
159   /// \brief Reset the features for the PowerPC target.
160   void resetSubtargetFeatures(const MachineFunction *MF) override;
161 private:
162   void initializeEnvironment();
163   void resetSubtargetFeatures(StringRef CPU, StringRef FS);
164 
165 public:
166   /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
167   ///
isPPC64()168   bool isPPC64() const { return IsPPC64; }
169 
170   /// has64BitSupport - Return true if the selected CPU supports 64-bit
171   /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
has64BitSupport()172   bool has64BitSupport() const { return Has64BitSupport; }
173 
174   /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
175   /// registers in 32-bit mode when possible.  This can only true if
176   /// has64BitSupport() returns true.
use64BitRegs()177   bool use64BitRegs() const { return Use64BitRegs; }
178 
179   /// useCRBits - Return true if we should store and manipulate i1 values in
180   /// the individual condition register bits.
useCRBits()181   bool useCRBits() const { return UseCRBits; }
182 
183   /// hasLazyResolverStub - Return true if accesses to the specified global have
184   /// to go through a dyld lazy resolution stub.  This means that an extra load
185   /// is required to get the address of the global.
186   bool hasLazyResolverStub(const GlobalValue *GV,
187                            const TargetMachine &TM) const;
188 
189   // isJITCodeModel - True if we're generating code for the JIT
isJITCodeModel()190   bool isJITCodeModel() const { return IsJITCodeModel; }
191 
192   // isLittleEndian - True if generating little-endian code
isLittleEndian()193   bool isLittleEndian() const { return IsLittleEndian; }
194 
195   // Specific obvious features.
hasFCPSGN()196   bool hasFCPSGN() const { return HasFCPSGN; }
hasFSQRT()197   bool hasFSQRT() const { return HasFSQRT; }
hasFRE()198   bool hasFRE() const { return HasFRE; }
hasFRES()199   bool hasFRES() const { return HasFRES; }
hasFRSQRTE()200   bool hasFRSQRTE() const { return HasFRSQRTE; }
hasFRSQRTES()201   bool hasFRSQRTES() const { return HasFRSQRTES; }
hasRecipPrec()202   bool hasRecipPrec() const { return HasRecipPrec; }
hasSTFIWX()203   bool hasSTFIWX() const { return HasSTFIWX; }
hasLFIWAX()204   bool hasLFIWAX() const { return HasLFIWAX; }
hasFPRND()205   bool hasFPRND() const { return HasFPRND; }
hasFPCVT()206   bool hasFPCVT() const { return HasFPCVT; }
hasAltivec()207   bool hasAltivec() const { return HasAltivec; }
hasQPX()208   bool hasQPX() const { return HasQPX; }
hasVSX()209   bool hasVSX() const { return HasVSX; }
hasMFOCRF()210   bool hasMFOCRF() const { return HasMFOCRF; }
hasISEL()211   bool hasISEL() const { return HasISEL; }
hasPOPCNTD()212   bool hasPOPCNTD() const { return HasPOPCNTD; }
hasLDBRX()213   bool hasLDBRX() const { return HasLDBRX; }
isBookE()214   bool isBookE() const { return IsBookE; }
isDeprecatedMFTB()215   bool isDeprecatedMFTB() const { return DeprecatedMFTB; }
isDeprecatedDST()216   bool isDeprecatedDST() const { return DeprecatedDST; }
217 
getTargetTriple()218   const Triple &getTargetTriple() const { return TargetTriple; }
219 
220   /// isDarwin - True if this is any darwin platform.
isDarwin()221   bool isDarwin() const { return TargetTriple.isMacOSX(); }
222   /// isBGQ - True if this is a BG/Q platform.
isBGQ()223   bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
224 
isDarwinABI()225   bool isDarwinABI() const { return isDarwin(); }
isSVR4ABI()226   bool isSVR4ABI() const { return !isDarwin(); }
227 
228   /// enablePostRAScheduler - True at 'More' optimization.
229   bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
230                              TargetSubtargetInfo::AntiDepBreakMode& Mode,
231                              RegClassVector& CriticalPathRCs) const override;
232 
enableEarlyIfConversion()233   bool enableEarlyIfConversion() const override { return hasISEL(); }
234 
235   // Scheduling customization.
236   bool enableMachineScheduler() const override;
237   void overrideSchedPolicy(MachineSchedPolicy &Policy,
238                            MachineInstr *begin,
239                            MachineInstr *end,
240                            unsigned NumRegionInstrs) const override;
241   bool useAA() const override;
242 };
243 } // End llvm namespace
244 
245 #endif
246